Some notes and papers, VHDL or FPU related

[ipdf/documents.git] / LiteratureNotes.tex

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@@ -379,6 +379,8 @@ Performance was much improved over the software rasterization and over XRender a
 on all except nVidia hardware. However, nVidia's XRender implementation did slow down significantly when
 some transformations were applied.
 
+%% Sam again
+
 \section{Boost Multiprecision Library\cite{boost_multiprecision}}
 
 \begin{itemize}
@@ -387,6 +389,84 @@ some transformations were applied.
        \item Precision is fixed... {\bf possible approach to project:} Use \verb/boost::mpf_float<N>/ and increase \verb/N/ as more precision is required?
 \end{itemize}
 
+
+% Some hardware related sounding stuff...
+
+\section{A CMOS Floating Point Unit\cite{kelley1997acmos}}
+
+The paper describes the implentation of a FPU for PowerPC using a particular Hewlett Packard process (HP14B 0.5$\mu$m, 3M, 3.3V).
+It implements a ``subset of the most commonly used double precision floating point instructions''. The unimplemented operations are compiled for the CPU.
+
+The paper gives a description of the architecture and design methods.
+This appears to be an entry to a student design competition.
+
+Standard is IEEE 754, but the multiplier tree is a 64-bit tree instead of a 54 bit tree.
+`` The primary reason for implementing a larger tree is for future additions of SIMD [Single Instruction Multiple Data (?)] instructions similar to Intel's MMX and Sun's VIS instructions''.
+
+HSPICE simulations used to determine transistor sizing.
+
+Paper has a block diagram that sort of vaguely makes sense to me.
+The rest requires more background knowledge.
+
+\section{Simply FPU\cite{filiatreault2003simply}}
+
+This is a webpage at one degree of seperation from wikipedia.
+
+It talks about FPU internals, but mostly focuses on the instruction sets.
+It includes FPU assembly code examples (!)
+
+It is probably not that useful, I don't think we'll end up writing FPU assembly?
+
+FPU's typically have 80 bit registers so they can support REAL4, REAL8 and REAL10 (single, double, extended precision).
+
+
+\section{Floating Point Package User's Guide\cite{bishop2008floating}}
+
+This is a technical report describing floating point VHDL packages \url{http://www.vhdl.org/fphdl/vhdl.html}
+
+In theory I know VHDL (cough) so I am interested in looking at this further to see how FPU hardware works.
+It might be getting a bit sidetracked from the ``document formats'' scope though.
+
+The report does talk briefly about the IEEE standard and normalised / denormalised numbers as well.
+
+See also: Java Optimized Processor\cite{jop} (it has a VHDL implementation of a FPU).
+
+\section{Low-Cost Microarchitectural Support for Improved Floating-Point Accuracy\cite{dieter2007lowcost}}
+
+Mentions how GPUs offer very good floating point performance but only for single precision floats.
+
+Has a diagram of a Floating Point adder.
+
+Talks about some magical technique called "Native-pair Arithmetic" that somehow makes 32-bit floating point accuracy ``competitive'' with 64-bit floating point numbers.
+
+\section{Accurate Floating Point Arithmetic through Hardware Error-Free Transformations\cite{kadric2013accurate}}
+
+From the abstract: ``This paper presents a hardware approach to performing ac-
+curate floating point addition and multiplication using the idea of error-
+free transformations. Specialized iterative algorithms are implemented
+for computing arbitrarily accurate sums and dot products.''
+
+The references for this look useful.
+
+It also mentions VHDL.
+
+So whenever hardware papers come up, VHDL gets involved...
+I guess it's time to try and work out how to use the Opensource VHDL implementations.
+
+This is about reduction of error in hardware operations rather than the precision or range of floats.
+But it is probably still relevant.
+
+\section{Floating Point Unit from JOP\cite{jop}}
+
+This is a 32 bit floating point unit developed for JOP in VHDL.
+I have been able to successfully compile it and the test program using GHDL\cite{ghdl}. 
+
+% Back to software
+\section{Basic Issues in Floating Point Arithmetic and Error Analysis\cite{demmel1996basic}}
+
+These are lecture notes from U.C Berkelye CS267 in 1996.
+
+
 \pagebreak
 \bibliographystyle{unsrt}
 \bibliography{papers}