Tidy File I/O in mainloop I tried really hard to do binary file I/O but failed. Guess how VHDL represents a file of "bits"? As an ASCII text file of "0" or "1" (!) So looks like ASCII string -> hex -> std_logic_vector is best we can do. I guess what people don't know won't hurt them... much. Fixed some mistakes, mainloop was still trying to read the comparison output, also I called the file "input_file" and there was a variable called "input" still that was getting read -_-
Start to adapt so we can change the representation Specifically, remove the magic 8 bit exponent / 23 bit mantissa (32 bit IEEE) numbers. There are *a lot* of them. A lot are still there. => Don't run this vfpu it is probably broken. At the very least do not change any of the constants in fpupack.vhd
Add Makefile, change original tester to be the vfpu
Initial Commit (steal code from https://github.com/jop-devel/jop) All code in the initial commit is as it was in the jop repo at the time. jop is under GPL 3.0 Note we are only taking the fpu from /vhdl/fpu - jop is a much larger project implementing the full JVM. From this point onwards all changes are by the commit author(s).