This is a virtual floating point unit (FPU) implemented in VHDL.

It is (or was as of the initial commit) stolen from the Java Optimised Processor https://github.com/jop-devel/jop

A test bench is used to compile a simulator executable for the FPU that reads from stdin and writes results to stdout.

The VFPU namespace in the ipdf/code repository (git://git.ucc.asn.au/ipdf/code.git) can be used to send floating
point operations to this executable. This is in the files ipdf/code/src/vhdl.cpp and ipdf/code/src/vhdl.h

In theory this will allow us to test different hardware representations of floating point numbers.
In practice it might be beyond the scope of our project to do much with this.