3 * - By John Hodge (thePowersGang)
5 * Universal Host Controller Interface
8 #define VERSION VER2(0,5)
18 #define MAX_CONTROLLERS 4
22 int UHCI_Initialise(char **Arguments);
24 tUHCI_TD *UHCI_int_AllocateTD(tUHCI_Controller *Cont);
25 void UHCI_int_AppendTD(tUHCI_Controller *Cont, tUHCI_TD *TD);
26 void *UHCI_int_SendTransaction(tUHCI_Controller *Cont, int Addr, Uint8 Type, int bTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
27 void *UHCI_DataIN(void *Ptr, int Dest, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
28 void *UHCI_DataOUT(void *Ptr, int Dest, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
29 void *UHCI_SendSetup(void *Ptr, int Dest, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
30 int UHCI_IsTransferComplete(void *Ptr, void *Handle);
31 int UHCI_Int_InitHost(tUHCI_Controller *Host);
32 void UHCI_CheckPortUpdate(void *Ptr);
33 void UHCI_InterruptHandler(int IRQ, void *Ptr);
35 static void _OutByte(tUHCI_Controller *Host, int Reg, Uint8 Value);
36 static void _OutWord(tUHCI_Controller *Host, int Reg, Uint16 Value);
37 static void _OutDWord(tUHCI_Controller *Host, int Reg, Uint32 Value);
38 static Uint16 _InWord(tUHCI_Controller *Host, int Reg);
41 MODULE_DEFINE(0, VERSION, USB_UHCI, UHCI_Initialise, NULL, "USB_Core", NULL);
42 tUHCI_TD gaUHCI_TDPool[NUM_TDs];
43 tUHCI_Controller gUHCI_Controllers[MAX_CONTROLLERS];
44 tUSBHostDef gUHCI_HostDef = {
45 .SendIN = UHCI_DataIN,
46 .SendOUT = UHCI_DataOUT,
47 .SendSETUP = UHCI_SendSetup,
48 .IsOpComplete = UHCI_IsTransferComplete,
49 .CheckPorts = UHCI_CheckPortUpdate
54 * \fn int UHCI_Initialise()
55 * \brief Called to initialise the UHCI Driver
57 int UHCI_Initialise(char **Arguments)
64 // Enumerate PCI Bus, getting a maximum of `MAX_CONTROLLERS` devices
65 while( (id = PCI_GetDeviceByClass(0x0C0300, 0xFFFFFF, id)) >= 0 && i < MAX_CONTROLLERS )
67 tUHCI_Controller *cinfo = &gUHCI_Controllers[i];
69 // NOTE: Check "protocol" from PCI?
72 base_addr = PCI_GetBAR(id, 4);
76 cinfo->IOBase = base_addr & ~1;
77 cinfo->MemIOMap = NULL;
81 cinfo->MemIOMap = (void*)MM_MapHWPages(base_addr, 1);
83 cinfo->IRQNum = PCI_GetIRQ(id);
85 Log_Debug("UHCI", "Controller PCI #%i: IO Base = 0x%x, IRQ %i",
86 id, base_addr, cinfo->IRQNum);
88 IRQ_AddHandler(cinfo->IRQNum, UHCI_InterruptHandler, cinfo);
91 ret = UHCI_Int_InitHost(&gUHCI_Controllers[i]);
98 cinfo->RootHub = USB_RegisterHost(&gUHCI_HostDef, cinfo, 2);
99 LOG("cinfo->RootHub = %p", cinfo->RootHub);
105 LEAVE('i', MODULE_ERR_NOTNEEDED);
106 return MODULE_ERR_NOTNEEDED;
109 if(i == MAX_CONTROLLERS) {
110 Log_Warning("UHCI", "Over "EXPAND_STR(MAX_CONTROLLERS)" UHCI controllers detected, ignoring rest");
112 LEAVE('i', MODULE_ERR_OK);
113 return MODULE_ERR_OK;
117 * \fn void UHCI_Cleanup()
118 * \brief Called just before module is unloaded
124 tUHCI_TD *UHCI_int_AllocateTD(tUHCI_Controller *Cont)
127 for(i = 0; i < NUM_TDs; i ++)
129 if(gaUHCI_TDPool[i].Link == 0) {
130 gaUHCI_TDPool[i].Link = 1;
131 gaUHCI_TDPool[i].Control = 1 << 23;
132 return &gaUHCI_TDPool[i];
134 // Still in use? Skip
135 if( gaUHCI_TDPool[i].Control & (1 << 23) )
137 // Is there a callback on it? Skip
138 if( gaUHCI_TDPool[i]._info.Callback )
140 // TODO: Garbage collect, but that means removing from the list too
142 // Ok, this is actually unused
143 gaUHCI_TDPool[i].Link = 1;
144 gaUHCI_TDPool[i].Control = 1 << 23;
145 return &gaUHCI_TDPool[i];
151 tUHCI_TD *UHCI_int_GetTDFromPhys(tPAddr PAddr)
153 // TODO: Fix this to work with a non-contiguous pool
154 static tPAddr td_pool_base;
155 const int pool_size = NUM_TDs;
157 if(!td_pool_base) td_pool_base = MM_GetPhysAddr( (tVAddr)gaUHCI_TDPool );
158 offset = (PAddr - td_pool_base) / sizeof(gaUHCI_TDPool[0]);
159 if( offset < 0 || offset >= pool_size )
161 Log_Error("UHCI", "TD PAddr %P not from pool", PAddr);
164 return gaUHCI_TDPool + offset;
167 void UHCI_int_AppendTD(tUHCI_Controller *Cont, tUHCI_TD *TD)
169 int next_frame = (_InWord(Cont, FRNUM) + 2) & (1024-1);
173 // TODO: How to handle FRNUM incrementing while we are in this function?
176 if( Cont->FrameList[next_frame] & 1 )
178 // TODO: Ensure 32-bit paddr
179 Cont->FrameList[next_frame] = MM_GetPhysAddr( (tVAddr)TD );
180 TD->Control |= (1 << 24); // Ensure that there is an interrupt for each used frame
181 LOG("next_frame = %i", next_frame);
185 // Find the end of the list
186 link = Cont->FrameList[next_frame];
188 prev_td = UHCI_int_GetTDFromPhys(link);
189 link = prev_td->Link;
190 } while( !(link & 1) );
193 prev_td->Link = MM_GetPhysAddr( (tVAddr)TD );
195 LOG("next_frame = %i, prev_td = %p", next_frame, prev_td);
199 * \brief Send a transaction to the USB bus
200 * \param Cont Controller pointer
201 * \param Addr Function Address * 16 + Endpoint
202 * \param bTgl Data toggle value
204 void *UHCI_int_SendTransaction(
205 tUHCI_Controller *Cont, int Addr, Uint8 Type, int bTgl,
206 tUSBHostCb Cb, void *CbData, void *Data, size_t Length)
210 if( Length > 0x400 ) return NULL; // Controller allows up to 0x500, but USB doesn't
212 td = UHCI_int_AllocateTD(Cont);
215 // TODO: Wait for one to free?
216 Log_Error("UHCI", "No avaliable TDs, transaction dropped");
221 td->Control = (Length - 1) & 0x7FF;
222 td->Control |= (1 << 23);
223 td->Token = ((Length - 1) & 0x7FF) << 21;
224 td->Token |= (bTgl & 1) << 19;
225 td->Token |= (Addr & 0xF) << 15;
226 td->Token |= ((Addr/16) & 0xFF) << 8;
229 // TODO: Ensure 32-bit paddr
230 if( ((tVAddr)Data & (PAGE_SIZE-1)) + Length > PAGE_SIZE ) {
231 Log_Warning("UHCI", "TODO: Support non single page transfers (%x + %x > %x)",
232 (tVAddr)Data & (PAGE_SIZE-1), Length, PAGE_SIZE
234 // TODO: Need to enable IOC to copy the data back
235 // td->BufferPointer =
236 td->_info.bCopyData = 1;
240 td->BufferPointer = MM_GetPhysAddr( (tVAddr)Data );
241 td->_info.bCopyData = 0;
244 // Interrupt on completion
246 td->Control |= (1 << 24);
247 LOG("IOC Cb=%p CbData=%p", Cb, CbData);
248 td->_info.Callback = Cb; // NOTE: if ERRPTR then the TD is kept allocated until checked
249 td->_info.CallbackPtr = CbData;
252 td->_info.DataPtr = Data;
254 UHCI_int_AppendTD(Cont, td);
259 void *UHCI_DataIN(void *Ptr, int Dest, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
261 return UHCI_int_SendTransaction(Ptr, Dest, 0x69, DataTgl, Cb, CbData, Buf, Length);
264 void *UHCI_DataOUT(void *Ptr, int Dest, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
266 return UHCI_int_SendTransaction(Ptr, Dest, 0xE1, DataTgl, Cb, CbData, Buf, Length);
269 void *UHCI_SendSetup(void *Ptr, int Dest, int DataTgl, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
271 return UHCI_int_SendTransaction(Ptr, Dest, 0x2D, DataTgl, Cb, CbData, Buf, Length);
274 int UHCI_IsTransferComplete(void *Ptr, void *Handle)
276 tUHCI_TD *td = Handle;
278 ret = !(td->Control & (1 << 23));
280 td->_info.Callback = NULL;
286 // === INTERNAL FUNCTIONS ===
288 * \fn int UHCI_Int_InitHost(tUCHI_Controller *Host)
289 * \brief Initialises a UHCI host controller
290 * \param Host Pointer - Host to initialise
292 int UHCI_Int_InitHost(tUHCI_Controller *Host)
294 ENTER("pHost", Host);
296 _OutWord( Host, USBCMD, 4 ); // GRESET
297 // TODO: Wait for at least 10ms
298 _OutWord( Host, USBCMD, 0 ); // GRESET
300 // Allocate Frame List
301 // - 1 Page, 32-bit address
302 // - 1 page = 1024 4 byte entries
303 Host->FrameList = (void *) MM_AllocDMA(1, 32, &Host->PhysFrameList);
304 if( !Host->FrameList ) {
305 Log_Warning("UHCI", "Unable to allocate frame list, aborting");
309 LOG("Allocated frame list 0x%x (0x%x)", Host->FrameList, Host->PhysFrameList);
310 memsetd( Host->FrameList, 1, 1024 ); // Clear List (Disabling all entries)
312 //! \todo Properly fill frame list
314 // Set frame length to 1 ms
315 _OutByte( Host, SOFMOD, 64 );
318 _OutDWord( Host, FLBASEADD, Host->PhysFrameList );
319 _OutWord( Host, FRNUM, 0 );
322 _OutWord( Host, USBINTR, 0x000F );
323 PCI_ConfigWrite( Host->PciId, 0xC0, 2, 0x2000 );
326 _OutWord( Host, USBCMD, 0x0001 );
332 void UHCI_CheckPortUpdate(void *Ptr)
334 tUHCI_Controller *Host = Ptr;
336 for( int i = 0; i < 2; i ++ )
338 int port = PORTSC1 + i*2;
341 status = _InWord(Host, port);
342 // Check for port change
343 if( !(status & 0x0002) ) continue;
344 _OutWord(Host, port, 0x0002);
346 // Check if the port is connected
349 // Tell the USB code it's gone.
350 USB_DeviceDisconnected(Host->RootHub, i);
355 LOG("Port %i has something", i);
356 // Reset port (set bit 9)
358 _OutWord(Host, port, 0x0200);
359 Time_Delay(50); // 50ms delay
360 _OutWord(Host, port, _InWord(Host, port) & ~0x0200);
363 Time_Delay(50); // 50ms delay
364 _OutWord(Host, port, _InWord(Host, port) | 0x0004);
365 // Tell USB there's a new device
366 USB_DeviceConnected(Host->RootHub, i);
371 void UHCI_InterruptHandler(int IRQ, void *Ptr)
373 tUHCI_Controller *Host = Ptr;
374 int frame = (_InWord(Host, FRNUM) - 1) & 0x3FF;
375 Uint16 status = _InWord(Host, USBSTS);
376 // Log_Debug("UHCI", "UHIC Interrupt, status = 0x%x, frame = %i", status, frame);
378 // Interrupt-on-completion
383 for( int i = 0; i < 10; i ++ )
385 link = Host->FrameList[frame];
386 Host->FrameList[frame] = 1;
387 while( link && !(link & 1) )
389 tUHCI_TD *td = UHCI_int_GetTDFromPhys(link);
390 int byte_count = (td->Control&0x7FF)+1;
391 LOG("link = 0x%x, td = %p, byte_count = %i", link, td, byte_count);
392 // Handle non-page aligned destination
393 // TODO: This will break if the destination is not in global memory
394 if(td->_info.bCopyData)
396 void *ptr = (void*)MM_MapTemp(td->BufferPointer);
397 Log_Debug("UHCI", "td->_info.DataPtr = %p", td->_info.DataPtr);
398 memcpy(td->_info.DataPtr, ptr, byte_count);
399 MM_FreeTemp((tVAddr)ptr);
402 if(td->_info.Callback && td->_info.Callback != INVLPTR)
404 LOG("Calling cb %p", td->_info.Callback);
405 td->_info.Callback(td->_info.CallbackPtr, td->_info.DataPtr, byte_count);
406 td->_info.Callback = NULL;
409 if( td->_info.Callback != INVLPTR )
419 // Host->LastCleanedFrame = frame;
422 LOG("status = 0x%02x", status);
423 _OutWord(Host, USBSTS, status);
426 void _OutByte(tUHCI_Controller *Host, int Reg, Uint8 Value)
429 ((Uint8*)Host->MemIOMap)[Reg] = Value;
431 outb(Host->IOBase + Reg, Value);
434 void _OutWord(tUHCI_Controller *Host, int Reg, Uint16 Value)
437 Host->MemIOMap[Reg/2] = Value;
439 outw(Host->IOBase + Reg, Value);
442 void _OutDWord(tUHCI_Controller *Host, int Reg, Uint32 Value)
445 ((Uint32*)Host->MemIOMap)[Reg/4] = Value;
447 outd(Host->IOBase + Reg, Value);
450 Uint16 _InWord(tUHCI_Controller *Host, int Reg)
453 return Host->MemIOMap[Reg/2];
455 return inw(Host->IOBase + Reg);