2 * UDI Ne2000 NIC Driver
3 * By John Hodge (thePowersGang)
8 #include "ne2000_common.h"
27 #define NE2K_NUM_INTR_EVENT_CBS 4
30 // --- Programmed IO ---
31 #include "ne2000_pio.h"
35 void ne2k_usage_ind(udi_usage_cb_t *cb, udi_ubit8_t resource_level)
37 ne2k_rdata_t *rdata = UDI_GCB(cb)->context;
39 rdata->rx_next_page = NE2K_RX_FIRST_PG;
43 void ne2k_enumerate_req(udi_enumerate_cb_t *cb, udi_ubit8_t enumeration_level)
45 ne2k_rdata_t *rdata = UDI_GCB(cb)->context;
46 udi_instance_attr_list_t *attr_list = cb->attr_list;
48 switch(enumeration_level)
50 case UDI_ENUMERATE_START:
51 case UDI_ENUMERATE_START_RESCAN:
52 // Emit the ND binding
53 DPT_SET_ATTR32(attr_list, "if_num", 0);
55 DPT_SET_ATTR_STRING(attr_list, "if_media", "eth", 3);
57 NE2K_SET_ATTR_STRFMT(attr_list, "identifier", 2*6+1, "%02X%02X%02X%02X%02X%02X",
58 rdata->macaddr[0], rdata->macaddr[1], rdata->macaddr[2],
59 rdata->macaddr[3], rdata->macaddr[4], rdata->macaddr[5] );
61 cb->attr_valid_length = attr_list - cb->attr_list;
62 udi_enumerate_ack(cb, UDI_ENUMERATE_OK, NE2K_OPS_CTRL);
64 case UDI_ENUMERATE_NEXT:
65 udi_enumerate_ack(cb, UDI_ENUMERATE_DONE, 0);
68 udi_assert(!"invalid enumeration_level");
72 void ne2k_devmgmt_req(udi_mgmt_cb_t *cb, udi_ubit8_t mgmt_op, udi_ubit8_t parent_ID)
75 void ne2k_final_cleanup_req(udi_mgmt_cb_t *cb)
79 void ne2k_bus_dev_channel_event_ind(udi_channel_event_cb_t *cb)
81 udi_cb_t *gcb = UDI_GCB(cb);
82 ne2k_rdata_t *rdata = gcb->context;
86 case UDI_CHANNEL_CLOSED:
88 case UDI_CHANNEL_BOUND: {
89 rdata->active_cb = gcb;
90 udi_bus_bind_cb_t *bus_bind_cb = UDI_MCB(cb->params.parent_bound.bind_cb, udi_bus_bind_cb_t);
91 udi_bus_bind_req( bus_bind_cb );
92 // continue at ne2k_bus_dev_bus_bind_ack
95 udi_assert(!"invalid channel event");
99 void ne2k_bus_dev_bus_bind_ack(udi_bus_bind_cb_t *cb,
100 udi_dma_constraints_t dma_constraints, udi_ubit8_t perferred_endianness, udi_status_t status)
102 udi_cb_t *gcb = UDI_GCB(cb);
103 ne2k_rdata_t *rdata = gcb->context;
105 // Set up PIO handles
106 rdata->init.pio_index = -1;
107 ne2k_bus_dev_bind__pio_map(gcb, UDI_NULL_PIO_HANDLE);
109 void ne2k_bus_dev_bind__pio_map(udi_cb_t *gcb, udi_pio_handle_t new_pio_handle)
111 ne2k_rdata_t *rdata = gcb->context;
113 if( rdata->init.pio_index != (udi_index_t)-1 )
115 rdata->pio_handles[rdata->init.pio_index] = new_pio_handle;
116 udi_debug_printf("PIO %i = %p\n", rdata->init.pio_index, new_pio_handle);
118 rdata->init.pio_index ++;
119 if( rdata->init.pio_index < NE2K_NUM_PIO_OPS )
121 udi_pio_map(ne2k_bus_dev_bind__pio_map, gcb,
122 UDI_PCI_BAR_0, 0, 0x20,
123 ne2k_pio_ops[rdata->init.pio_index].trans_list,
124 ne2k_pio_ops[rdata->init.pio_index].list_length,
125 UDI_PIO_LITTLE_ENDIAN, 0, 0
130 // Next: Bind interrupt
131 // - spawn_idx = Interrupt number (0)
132 udi_channel_spawn(ne2k_bus_dev_bind__intr_chanel, gcb, gcb->channel,
133 0, NE2K_OPS_IRQ, rdata);
136 void ne2k_bus_dev_bind__intr_chanel(udi_cb_t *gcb, udi_channel_t new_channel)
138 ne2k_rdata_t *rdata = gcb->context;
140 rdata->interrupt_channel = new_channel;
142 udi_cb_alloc(ne2k_bus_dev_bind__intr_attach, gcb, NE2K_CB_INTR, gcb->channel);
145 void ne2k_bus_dev_bind__intr_attach(udi_cb_t *gcb, udi_cb_t *new_cb)
147 ne2k_rdata_t *rdata = gcb->context;
151 udi_channel_event_complete( UDI_MCB(rdata->active_cb, udi_channel_event_cb_t),
152 UDI_STAT_RESOURCE_UNAVAIL );
155 udi_intr_attach_cb_t *intr_cb = UDI_MCB(new_cb, udi_intr_attach_cb_t);
156 intr_cb->interrupt_idx = 0;
157 intr_cb->min_event_pend = 2;
158 intr_cb->preprocessing_handle = rdata->pio_handles[NE2K_PIO_IRQACK];
159 udi_intr_attach_req(intr_cb);
160 // continued in ne2k_bus_dev_intr_attach_ack
162 void ne2k_bus_dev_bus_unbind_ack(udi_bus_bind_cb_t *cb)
165 void ne2k_bus_dev_intr_attach_ack(udi_intr_attach_cb_t *intr_attach_cb, udi_status_t status)
167 udi_cb_t *gcb = UDI_GCB(intr_attach_cb);
168 ne2k_rdata_t *rdata = gcb->context;
169 // continuing from ne2k_bus_dev_bind__intr_attach
170 if( status != UDI_OK ) {
172 udi_cb_free( UDI_GCB(intr_attach_cb) );
176 rdata->intr_attach_cb = intr_attach_cb;
178 rdata->init.n_intr_event_cb = 0;
179 udi_cb_alloc(ne2k_bus_dev_bind__intr_event_cb, gcb, NE2K_CB_INTR_EVENT, rdata->interrupt_channel);
182 void ne2k_bus_dev_bind__intr_event_cb(udi_cb_t *gcb, udi_cb_t *new_cb)
184 ne2k_rdata_t *rdata = gcb->context;
186 udi_intr_event_cb_t *intr_event_cb = UDI_MCB(new_cb, udi_intr_event_cb_t);
187 udi_intr_event_rdy(intr_event_cb);
188 rdata->init.n_intr_event_cb ++;
190 if( rdata->init.n_intr_event_cb < NE2K_NUM_INTR_EVENT_CBS )
192 udi_cb_alloc(ne2k_bus_dev_bind__intr_event_cb, gcb,
193 NE2K_CB_INTR_EVENT, rdata->interrupt_channel);
198 udi_pio_trans(ne2k_bus_dev_bind__card_reset, gcb,
199 rdata->pio_handles[NE2K_PIO_RESET], 0, NULL, &rdata->macaddr);
203 void ne2k_bus_dev_bind__card_reset(udi_cb_t *gcb, udi_buf_t *new_buf, udi_status_t status, udi_ubit16_t result)
205 ne2k_rdata_t *rdata = gcb->context;
207 udi_channel_event_complete( UDI_MCB(rdata->active_cb, udi_channel_event_cb_t), UDI_OK );
210 void ne2k_bus_dev_intr_detach_ack(udi_intr_detach_cb_t *intr_detach_cb)
214 void ne2k_nd_ctrl_channel_event_ind(udi_channel_event_cb_t *cb)
217 void ne2k_nd_ctrl_bind_req(udi_nic_bind_cb_t *cb, udi_index_t tx_chan_index, udi_index_t rx_chan_index)
219 udi_cb_t *gcb = UDI_GCB(cb);
220 ne2k_rdata_t *rdata = gcb->context;
221 rdata->init.rx_chan_index = rx_chan_index;
222 udi_channel_spawn(ne2k_nd_ctrl_bind__tx_chan_ok, gcb, gcb->channel, tx_chan_index, NE2K_OPS_TX, rdata);
225 void ne2k_nd_ctrl_bind__tx_chan_ok(udi_cb_t *gcb, udi_channel_t new_channel)
227 ne2k_rdata_t *rdata = gcb->context;
228 rdata->tx_channel = new_channel;
229 udi_channel_spawn(ne2k_nd_ctrl_bind__rx_chan_ok, gcb, gcb->channel,
230 rdata->init.rx_chan_index, NE2K_OPS_RX, rdata);
233 void ne2k_nd_ctrl_bind__rx_chan_ok(udi_cb_t *gcb, udi_channel_t new_channel)
235 ne2k_rdata_t *rdata = gcb->context;
236 rdata->rx_channel = new_channel;
238 udi_nic_bind_cb_t *cb = UDI_MCB(gcb, udi_nic_bind_cb_t);
239 cb->media_type = UDI_NIC_ETHER;
240 cb->min_pdu_size = 0;
241 cb->max_pdu_size = 0;
242 cb->rx_hw_threshold = 2;
243 cb->capabilities = 0;
244 cb->max_perfect_multicast = 0;
245 cb->max_total_multicast = 0;
246 cb->mac_addr_len = 6;
247 udi_memcpy(cb->mac_addr, rdata->macaddr, 6);
248 udi_nsr_bind_ack( cb, UDI_OK );
251 void ne2k_nd_ctrl_unbind_req(udi_nic_cb_t *cb)
254 void ne2k_nd_ctrl_enable_req(udi_nic_cb_t *cb)
256 udi_cb_t *gcb = UDI_GCB(cb);
257 ne2k_rdata_t *rdata = gcb->context;
258 udi_pio_trans(ne2k_nd_ctrl_enable_req__trans_done, gcb,
259 rdata->pio_handles[NE2K_PIO_ENABLE], 0, NULL, NULL);
261 void ne2k_nd_ctrl_enable_req__trans_done(udi_cb_t *gcb, udi_buf_t *new_buf, udi_status_t status, udi_ubit16_t res)
263 udi_nsr_enable_ack( UDI_MCB(gcb, udi_nic_cb_t), status );
265 void ne2k_nd_ctrl_disable_req(udi_nic_cb_t *cb)
268 void ne2k_nd_ctrl_ctrl_req(udi_nic_ctrl_cb_t *cb)
271 void ne2k_nd_ctrl_info_req(udi_nic_info_cb_t *cb, udi_boolean_t reset_statistics)
275 void ne2k_bus_irq_channel_event_ind(udi_channel_event_cb_t *cb)
278 void ne2k_bus_irq_intr_event_ind(udi_intr_event_cb_t *cb, udi_ubit8_t flags)
280 udi_debug_printf("ne2k_bus_irq_intr_event_ind: flags=%x, intr_result=%x\n",
281 flags, cb->intr_result);
282 if( cb->intr_result & 0x01 )
284 ne2k_intr__rx_ok( UDI_GCB(cb) );
286 if( cb->intr_result & 0x40 )
288 // ne2k_intr__rdma( UDI_GCB(cb) );
291 udi_intr_event_rdy(cb);
294 // === Definition structures ===
295 udi_mgmt_ops_t ne2k_mgmt_ops = {
299 ne2k_final_cleanup_req
301 udi_ubit8_t ne2k_mgmt_op_flags[4] = {0,0,0,0};
302 udi_bus_device_ops_t ne2k_bus_dev_ops = {
303 ne2k_bus_dev_channel_event_ind,
304 ne2k_bus_dev_bus_bind_ack,
305 ne2k_bus_dev_bus_unbind_ack,
306 ne2k_bus_dev_intr_attach_ack,
307 ne2k_bus_dev_intr_detach_ack
309 udi_ubit8_t ne2k_bus_dev_ops_flags[5] = {0};
310 udi_nd_ctrl_ops_t ne2k_nd_ctrl_ops = {
311 ne2k_nd_ctrl_channel_event_ind,
312 ne2k_nd_ctrl_bind_req,
313 ne2k_nd_ctrl_unbind_req,
314 ne2k_nd_ctrl_enable_req,
315 ne2k_nd_ctrl_disable_req,
316 ne2k_nd_ctrl_ctrl_req,
317 ne2k_nd_ctrl_info_req
319 udi_ubit8_t ne2k_nd_ctrl_ops_flags[7] = {0};
320 udi_nd_tx_ops_t ne2k_nd_tx_ops = {
321 ne2k_nd_tx_channel_event_ind,
323 ne2k_nd_tx_exp_tx_req
325 udi_ubit8_t ne2k_nd_tx_ops_flags[3] = {0};
326 udi_nd_rx_ops_t ne2k_nd_rx_ops = {
327 ne2k_nd_rx_channel_event_ind,
330 udi_ubit8_t ne2k_nd_rx_ops_flags[2] = {0};
331 udi_intr_handler_ops_t ne2k_bus_irq_ops = {
332 ne2k_bus_irq_channel_event_ind,
333 ne2k_bus_irq_intr_event_ind
335 udi_ubit8_t ne2k_bus_irq_ops_flags[2] = {0};
337 udi_primary_init_t ne2k_pri_init = {
338 .mgmt_ops = &ne2k_mgmt_ops,
339 .mgmt_op_flags = ne2k_mgmt_op_flags,
340 .mgmt_scratch_requirement = 0,
341 .enumeration_attr_list_length = 4,
342 .rdata_size = sizeof(ne2k_rdata_t),
343 .child_data_size = 0,
344 .per_parent_paths = 0
346 udi_ops_init_t ne2k_ops_list[] = {
348 NE2K_OPS_DEV, NE2K_META_BUS, UDI_BUS_DEVICE_OPS_NUM,
350 (udi_ops_vector_t*)&ne2k_bus_dev_ops,
351 ne2k_bus_dev_ops_flags
354 NE2K_OPS_CTRL, NE2K_META_NIC, UDI_ND_CTRL_OPS_NUM,
356 (udi_ops_vector_t*)&ne2k_nd_ctrl_ops,
357 ne2k_nd_ctrl_ops_flags
360 NE2K_OPS_TX, NE2K_META_NIC, UDI_ND_TX_OPS_NUM,
362 (udi_ops_vector_t*)&ne2k_nd_tx_ops,
366 NE2K_OPS_RX, NE2K_META_NIC, UDI_ND_RX_OPS_NUM,
368 (udi_ops_vector_t*)&ne2k_nd_rx_ops,
372 NE2K_OPS_IRQ, NE2K_META_BUS, UDI_BUS_INTR_HANDLER_OPS_NUM,
374 (udi_ops_vector_t*)&ne2k_bus_irq_ops,
375 ne2k_bus_irq_ops_flags
379 udi_cb_init_t ne2k_cb_init_list[] = {
380 {NE2K_CB_BUS_BIND, NE2K_META_BUS, UDI_BUS_BIND_CB_NUM, 0, 0,NULL},
381 {NE2K_CB_INTR, NE2K_META_BUS, UDI_BUS_INTR_ATTACH_CB_NUM, 0, 0,NULL},
382 {NE2K_CB_INTR_EVENT, NE2K_META_BUS, UDI_BUS_INTR_EVENT_CB_NUM, 0, 0,NULL},
385 const udi_init_t udi_init_info = {
386 .primary_init_info = &ne2k_pri_init,
387 .ops_init_list = ne2k_ops_list,
388 .cb_init_list = ne2k_cb_init_list,