1 -------------------------------------------------------------------------------
3 -- Project: <Floating Point Unit Core>
5 -- Description: pre-normalization entity for the addition/subtraction unit
6 -------------------------------------------------------------------------------
8 -- 100101011010011100100
9 -- 110000111011100100000
10 -- 100000111011000101101
11 -- 100010111100101111001
12 -- 110000111011101101001
13 -- 010000001011101001010
14 -- 110100111001001100001
15 -- 110111010000001100111
16 -- 110110111110001011101
17 -- 101110110010111101000
18 -- 100000010111000000000
20 -- Author: Jidan Al-eryani
25 -- This source file may be used and distributed without
26 -- restriction provided that this copyright statement is not
27 -- removed from the file and that any derivative work contains
28 -- the original copyright notice and the associated disclaimer.
30 -- THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY
31 -- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
32 -- TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
33 -- FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR
34 -- OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
35 -- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 -- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
37 -- GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
38 -- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
39 -- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 -- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
41 -- OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
42 -- POSSIBILITY OF SUCH DAMAGE.
46 use ieee.std_logic_1164.all;
47 use ieee.std_logic_unsigned.all;
48 use ieee.std_logic_misc.all;
53 entity pre_norm_addsub is
56 opa_i : in std_logic_vector(FP_WIDTH-1 downto 0);
57 opb_i : in std_logic_vector(FP_WIDTH-1 downto 0);
58 fracta_28_o : out std_logic_vector(FRAC_WIDTH+4 downto 0); -- carry(1) & hidden(1) & fraction(23) & guard(1) & round(1) & sticky(1)
59 fractb_28_o : out std_logic_vector(FRAC_WIDTH+4 downto 0);
60 exp_o : out std_logic_vector(EXP_WIDTH-1 downto 0)
65 architecture rtl of pre_norm_addsub is
68 signal s_exp_o : std_logic_vector(EXP_WIDTH-1 downto 0);
69 signal s_fracta_28_o, s_fractb_28_o : std_logic_vector(FRAC_WIDTH+4 downto 0);
70 signal s_expa, s_expb : std_logic_vector(EXP_WIDTH-1 downto 0);
71 signal s_fracta, s_fractb : std_logic_vector(FRAC_WIDTH-1 downto 0);
73 signal s_fracta_28, s_fractb_28, s_fract_sm_28, s_fract_shr_28 : std_logic_vector(FRAC_WIDTH+4 downto 0);
75 signal s_exp_diff : std_logic_vector(EXP_WIDTH-1 downto 0);
76 signal s_rzeros : std_logic_vector(5 downto 0);
78 signal s_expa_eq_expb : std_logic;
79 signal s_expa_lt_expb : std_logic;
80 signal s_fracta_1 : std_logic;
81 signal s_fractb_1 : std_logic;
82 signal s_op_dn,s_opa_dn, s_opb_dn : std_logic;
83 signal s_mux_diff : std_logic_vector(1 downto 0);
84 signal s_mux_exp : std_logic;
85 signal s_sticky : std_logic;
91 -- if rising_edge(clk_i) then
92 s_expa <= opa_i(30 downto 23);
93 s_expb <= opb_i(30 downto 23);
94 s_fracta <= opa_i(22 downto 0);
95 s_fractb <= opb_i(22 downto 0);
102 if rising_edge(clk_i) then
104 fracta_28_o <= s_fracta_28_o;
105 fractb_28_o <= s_fractb_28_o;
109 s_expa_eq_expb <= '1' when s_expa = s_expb else '0';
110 s_expa_lt_expb <= '1' when s_expa > s_expb else '0';
112 -- '1' if fraction is not zero
113 s_fracta_1 <= or_reduce(s_fracta);
114 s_fractb_1 <= or_reduce(s_fractb);
116 -- opa or Opb is denormalized
117 s_op_dn <= s_opa_dn or s_opb_dn;
118 s_opa_dn <= not or_reduce(s_expa);
119 s_opb_dn <= not or_reduce(s_expb);
121 -- output the larger exponent
122 s_mux_exp <= s_expa_lt_expb;
125 if rising_edge(clk_i) then
127 when '0' => s_exp_o <= s_expb;
128 when '1' => s_exp_o <= s_expa;
129 when others => s_exp_o <= "11111111";
134 -- convert to an easy to handle floating-point format
135 s_fracta_28 <= "01" & s_fracta & "000" when s_opa_dn='0' else "00" & s_fracta & "000";
136 s_fractb_28 <= "01" & s_fractb & "000" when s_opb_dn='0' else "00" & s_fractb & "000";
139 s_mux_diff <= s_expa_lt_expb & (s_opa_dn xor s_opb_dn);
142 if rising_edge(clk_i) then
143 -- calculate howmany postions the fraction will be shifted
145 when "00"=> s_exp_diff <= s_expb - s_expa;
146 when "01"=> s_exp_diff <= s_expb - (s_expa+"00000001");
147 when "10"=> s_exp_diff <= s_expa - s_expb;
148 when "11"=> s_exp_diff <= s_expa - (s_expb+"00000001");
149 when others => s_exp_diff <= "11110000";
155 s_fract_sm_28 <= s_fracta_28 when s_expa_lt_expb='0' else s_fractb_28;
157 -- shift-right the fraction if necessary
158 s_fract_shr_28 <= shr(s_fract_sm_28, s_exp_diff);
160 -- count the zeros from right to check if result is inexact
161 s_rzeros <= count_r_zeros(s_fract_sm_28);
162 s_sticky <= '1' when s_exp_diff > s_rzeros and or_reduce(s_fract_sm_28)='1' else '0';
164 s_fracta_28_o <= s_fracta_28 when s_expa_lt_expb='1' else s_fract_shr_28(27 downto 1) & (s_sticky or s_fract_shr_28(0));
165 s_fractb_28_o <= s_fractb_28 when s_expa_lt_expb='0' else s_fract_shr_28(27 downto 1) & (s_sticky or s_fract_shr_28(0));