X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;ds=sidebyside;f=Kernel%2Farch%2Farm7%2Finclude%2Fmm_virt.h;h=b57e45c32a306566cc98ffe8aea4bd94e9de719c;hb=a12f34dd45f08acd22664db795423a238ca6e569;hp=ed6f3aff77c2dcdeaa026e3e8a16b24d02b7a5a0;hpb=3764c294f21229bdf700f436fa4884f5e76e0d3a;p=tpg%2Facess2.git

diff --git a/Kernel/arch/arm7/include/mm_virt.h b/Kernel/arch/arm7/include/mm_virt.h
index ed6f3aff..b57e45c3 100644
--- a/Kernel/arch/arm7/include/mm_virt.h
+++ b/Kernel/arch/arm7/include/mm_virt.h
@@ -5,15 +5,42 @@
 #ifndef _MM_VIRT_H_
 #define _MM_VIRT_H_
 
-#define KERNEL_BASE	0x80000000	// 2GiB
+#define MM_USER_MIN	0x00001000
+#define USER_LIB_MAX	0x7F800000
+#define MM_PPD_HANDLES	0x7F800000
+#define MM_TABLE0USER	0x7F900000	// 2 GiB - 16 KiB
+#define MM_TABLE1USER	0x7FC00000	// 2 GiB - 4 MiB
 
 // Page Blocks are 12-bits wide (12 address bits used)
 // Hence, the table is 16KiB large (and must be so aligned)
 // and each block addresses 1MiB of data
 
+// First level table is aligned to 16KiB (restriction of TTBR reg)
+// - VMSAv6 uses two TTBR regs, determined by bit 31
+
+//#define KERNEL_BASE	0x80000000	// 2GiB
+
 #define MM_KHEAP_BASE	0x80800000	// 8MiB of kernel code
-#define MM_KHEAP_MAX	0xC0000000	// 1GiB of kernel heap
+#define MM_KHEAP_MAX	0xC0000000	// ~1GiB of kernel heap
+
+#define MM_MODULE_MIN	0xC0000000	// - 0xD0000000
+#define MM_MODULE_MAX	0xD0000000
+
+// PMM Data, giving it 256MiB is overkill, but it's unused atm
+#define MM_MAXPHYSPAGE	(1024*1024)
+// 2^(32-12) max pages
+// 8.125 bytes per page (for bitmap allocation)
+// = 8.125 MiB
+#define MM_PMM_BASE	0xE0000000
+#define MM_PMM_END	0xF0000000
+
+#define MM_HWMAP_BASE	0xF0000000	// Ent 0xF00
+#define MM_HWMAP_END	0xFE000000
+#define MM_TMPMAP_BASE	0xFE000000
+#define MM_TMPMAP_END	0xFF000000
 
-#define MM_FRACTAL	0xFFE00000	// 2nd last block
+#define MM_KERNEL_VFS	0xFF000000	// 
+#define MM_TABLE1KERN	0xFF800000	// - 0x???????? 4MiB
+#define MM_TABLE0KERN	0xFFC00000	// - 0xFFE04000 16KiB
 
 #endif