X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=Kernel%2Farch%2Farmv7%2Fstart.S;h=1c1e0c8c0444a465ab5b7104a0e3e8bc537e589c;hb=d88ff758eeb9b5dd3484eccde7be80b5c29b26d4;hp=95bcd473df6162927a1800c8353897030f72b182;hpb=f41cdc51e2d27d257e8d45247b0be49df4baf8a4;p=tpg%2Facess2.git

diff --git a/Kernel/arch/armv7/start.S b/Kernel/arch/armv7/start.S
index 95bcd473..1c1e0c8c 100644
--- a/Kernel/arch/armv7/start.S
+++ b/Kernel/arch/armv7/start.S
@@ -18,26 +18,46 @@ ivt_fiq:	b .     	@ 0x1C FIQ (Fast interrupt)
 
 .globl _start
 _start:
+	ldr r2, =UART0_PADDR
+	mov r1, #'A'
+	str r1, [r2]	
+
 	ldr r0, =kernel_table0-KERNEL_BASE
 	mcr p15, 0, r0, c2, c0, 1	@ Set TTBR1 to r0
 	mcr p15, 0, r0, c2, c0, 0	@ Set TTBR0 to r0 too (for identity)
 
+	mov r1, #'c'
+	str r1, [r2]	
+
 	mov r0, #1
 	mcr p15, 0, r0, c2, c0, 2	@ Set TTCR to 1 (50/50 split)
+
+	mov r1, #'e'
+	str r1, [r2]	
 	
 	mov r0, #3
 	mcr p15, 0, r0, c3, c0, 0	@ Set Domain 0 to Manager
 
+	mov r1, #'s'
+	str r1, [r2]	
+
 	@ Enable VMSA
 	mrc p15, 0, r0, c1, c0, 0
 	orr r0, r0, #1
 	orr r0, r0, #1 << 23
 	mcr p15, 0, r0, c1, c0, 0
 
+	ldr r2, =0xF1000000
+	mov r1, #'s'
+	str r1, [r2]	
+
 	@ Enable access faults on domains 0 & 1
 	mov r0, #0x55	@ 01010101b
 	mcr p15, 0, r0, c3, c0, 0
 
+	mov r1, #'2'
+	str r1, [r2]	
+
 	@
 	@ Check for security extensions
 	@
@@ -51,6 +71,8 @@ _start:
 	orreq r0, #0x2000
 	mcreq p15, 0, r0, c1, c0, 0
 
+	mov r1, #'-'
+	str r1, [r2]	
 
 	@ Prepare for interrupts
 	cps #18	@ IRQ Mode
@@ -59,12 +81,33 @@ _start:
 	ldr sp, =abortstack+0x1000
 	cps #19
 
-	ldr sp, =0x80000000-4	@ Set up stack (top of user range)
+	mov r1, #'a'
+	str r1, [r2]	
+	mov r1, #'r'
+	str r1, [r2]	
+	mov r1, #'m'
+	str r1, [r2]	
+	mov r1, #13
+	str r1, [r2]	
+	mov r1, #10
+	str r1, [r2]	
+
+.extern bss_start
+.extern bss_size_div_4
+.zero_bss:
+	ldr r0, =bss_start
+	ldr r1, =bss_end
+	mov r3, #0
+.zero_bss_loop:
+	str r3, [r0],#4
+	cmp r0, r1
+	bls .zero_bss_loop
+
+.goto_c:
+	ldr sp, =0x80000000-8	@ Set up stack (top of user range)
 	ldr r0, =kmain
 	mov pc, r0
 1:	b 1b	@ Infinite loop
-_ptr_kmain:
-	.long kmain
 
 .comm irqstack, 0x1000	@ ; 4KiB Stack
 .comm abortstack, 0x1000	@ ; 4KiB Stack
@@ -89,10 +132,10 @@ SVC_Handler:
 	ldr r4, =SyscallHandler
 	blx r4
 	
-	ldr r0, =csSyscallPrintRetAddr
-	ldr r1, [sp,#9*4+5*4]
-	ldr r4, =Log
-	blx r4
+@	ldr r0, =csSyscallPrintRetAddr
+@	ldr r1, [sp,#9*4+5*4]
+@	ldr r4, =Log
+@	blx r4
 	
 	pop {r2}	@ errno
 	pop {r0,r1}	@ Ret/RetHi
@@ -125,10 +168,10 @@ IRQHandler:
 
 	PUSH_GPRS
 
-	ldr r0, =csIRQ_Tag
-	ldr r1, =csIRQ_Fmt
-	ldr r4, =Log_Debug
-	blx r4
+@	ldr r0, =csIRQ_Tag
+@	ldr r1, =csIRQ_Fmt
+@	ldr r4, =Log_Debug
+@	blx r4
 	
 	@ Call the registered handler
 	ldr r0, gpIRQHandler
@@ -143,36 +186,35 @@ IRQHandler:
 .globl DataAbort
 DataAbort:
 	sub lr, #8	@ Adjust LR to the correct value
-@	srsdb sp!, #19	@ Switch to supervisor mode (DDI0406B D1.6.5) (actually SRSFD)
+	srsdb sp!, #23	@ Switch to supervisor mode (DDI0406B D1.6.5) (actually SRSFD)
 @	cpsid ifa, #19
-@	PUSH_GPRS
+	PUSH_GPRS
 
-	mrc p15, 0, r4, c5, c0, 0	@ Read DFSR (Data Fault Address Register) to stack
-	push {r4}
-	mrc p15, 0, r3, c6, c0, 0	@ Read DFAR (Data Fault Address Register) into R3
-	mov r2, lr
-	ldr r1, =csDataAbort_Fmt
-	ldr r0, =csAbort_Tag
-	ldr r4, =Log_Error
+	mov r3, #0	@ not a prefetch abort
+	mrc p15, 0, r2, c5, c0, 0	@ Read DFSR (Data Fault Status Register) to R2
+	mrc p15, 0, r1, c6, c0, 0	@ Read DFAR (Data Fault Address Register) into R1
+	mov r0, lr	@ PC
+	ldr r4, =MM_PageFault
 	blx r4
-	b .
 
-@	POP_GPRS
-@	rfeia sp!	@ Pop state (actually RFEFD)
+	POP_GPRS
+	rfeia sp!	@ Pop state (actually RFEFD)
 
 .globl PrefetchAbort
 PrefetchAbort:
 	sub lr, #4	@ Adjust LR to the correct value
-@	srsdb sp!, #19	@ Switch to supervisor mode (DDI0406B D1.6.5) (actually SRSFD)
+	srsdb sp!, #23	@ Switch to supervisor mode (DDI0406B D1.6.5) (actually SRSFD)
 @	cpsid ifa, #19
-@	PUSH_GPRS
+	PUSH_GPRS
 
 	ldr r0, =csAbort_Tag
 	ldr r1, =csPrefetchAbort_Fmt
-	mov r2, lr
-	mrc p15, 0, r3, c5, c0, 0	@ Read IFSR (Instruction Fault Address Register) into R3
-	ldr r4, =Log_Error
-	blx r4
+#	mov r2, lr
+	mrc p15, 0, r2, c6, c0, 2	@ Read IFAR (Instruction Fault Address Register) into R3
+	mrc p15, 0, r3, c5, c0, 1	@ Read IFSR (Instruction Fault Status Register) into R3
+	ldr r5, =Log_Error
+	blx r5
+
 	b .
 
 .section .rodata
@@ -224,7 +266,7 @@ kernel_table0:
 	.long PCI_PADDR + 12*(1 << 20) + 0x402
 	.long PCI_PADDR + 13*(1 << 20) + 0x402
 	.long PCI_PADDR + 14*(1 << 20) + 0x402
-	.long PCI_PADDR + 15*(1 << 20) + 0x042
+	.long PCI_PADDR + 15*(1 << 20) + 0x402
 #else
 	.rept 16
 		.long 0
@@ -250,7 +292,7 @@ kernel_table0:
 @ PID0 user table
 .globl user_table1_map
 @ User table1 data table (only the first half is needed)
-@ - Abused to provide kernel stacks in upper half
+@ - Abused to provide kernel stacks in the unused half of the table
 user_table1_map:	@ Size = 4KiB (only 2KiB used)
 	.rept 0x800/4-1
 		.long 0
@@ -273,17 +315,17 @@ kernel_table1_map:	@ Size = 4KiB
 	.rept (0xF00+16)/4
 		.long 0
 	.endr
-	.long hwmap_table_0 - KERNEL_BASE + (1 << 4) + 3
+	.long hwmap_table_0 - KERNEL_BASE + 0x13
 	.rept 0xFF8/4 - (0xF00+16)/4 - 1
 		.long 0
 	.endr
-	.long kernel_table1_map - KERNEL_BASE + (1 << 4) + 3
+	.long kernel_table1_map - KERNEL_BASE + 0x13
 	.long kernel_exception_map - KERNEL_BASE + 0x13
 
 @ Hardware mappings 
 .globl hwmap_table_0
 hwmap_table_0:
-	.long UART0_PADDR + (1 << 4) + 0x13	@ UART0
+	.long UART0_PADDR + 0x13	@ UART0
 	.rept 1024 - 1
 		.long 0
 	.endr
@@ -297,12 +339,16 @@ kernel_exception_map:
 	.rept 256-16
 		.long	0
 	.endr
-	.long 0x213	@ Map first page for exceptions (Kernel RO)
-	.rept 15
+	.long 0x212	@ Map first page for exceptions (Kernel RO, Execute)
+	.rept 16-1-2
 		.long 0
 	.endr
+	.long gUsertextPhysStart + 0x22	@ User .text (User RO, Kernel RW, because both is COW)
+	.long 0
 	
 .section .padata
 stack:
 	.space MM_KSTACK_SIZE, 0	@ Original kernel stack
 
+// vim: ts=8 ft=armv7
+