X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=Kernel%2Farch%2Farmv7%2Fstart.S;h=2d3f81a5d1e299a0f7ec91144b4ff42f0330e1da;hb=419b7b18a70e5f65698c5eda4f62f546f02d32e4;hp=ad8ff6f2a59a5258477f23568d89fd66465d90ea;hpb=b2007319ce5941cb11fbad3b413afbc6caa681de;p=tpg%2Facess2.git

diff --git a/Kernel/arch/armv7/start.S b/Kernel/arch/armv7/start.S
index ad8ff6f2..2d3f81a5 100644
--- a/Kernel/arch/armv7/start.S
+++ b/Kernel/arch/armv7/start.S
@@ -68,8 +68,8 @@ _ptr_kmain:
 .extern SyscallHandler
 SVC_Handler:
 @	sub lr, #4
-	srsdb sp!, #19	@ Switch to supervisor mode (DDI0406B D1.6.5) (actually SRSFD)
-	cpsid ifa, #19
+	srsdb sp!, #19	@ Save state to stack
+	cpsie ifa, #19	@ Ensure we're in supervisor with interrupts enabled (should already be there)
 	push {r0-r12}
 
 	ldr r4, [lr,#-4]
@@ -93,40 +93,12 @@ SVC_Handler:
 	rfeia sp!	@ Pop state (actually RFEFD)
 .arm_specifics:
 	and r4, #0xFF
+	mov r0, r4	@ Number
+	mov r1, sp	@ Arguments
+	
+	ldr r4, =ARMv7_int_HandleSyscalls
+	blx r4
 
-@
-@ Cache invalidation
-	cmp r4, #0x001
-	bne 1f
-	@ Page align
-	mov r2, #0x1000
-	sub r2, #1
-	add r1, r2
-	mvn r2, r2
-	and r0, r2
-	and r1, r2
-	cmp r0, #0x78000000
-	cmpls r1, #0x78000000
-	movge r0, #-1
-	movge r1, #0
-	movge r2, #1
-	bge .ret
-
-2:
-	cmp r0, r1
-	mcrlt p15, 0, r0, c7, c5, 1
-	mcrlt p15, 0, r0, c7, c6, 1
-	addlt r0, #0x1000
-	blt 2b
-	mov r0, #0
-	mov r1, #0
-	mov r2, #0
-	b .ret
-1:	
-	mov r0, #-1
-	mov r1, #0
-	mov r2, #-1
-.ret:
 	add sp, #4*4
 	pop {r4-r12}
 	rfeia sp!
@@ -178,7 +150,6 @@ DataAbort:
 
 @	POP_GPRS
 @	rfeia sp!	@ Pop state (actually RFEFD)
-	bx lr
 
 .globl PrefetchAbort
 PrefetchAbort:
@@ -195,6 +166,7 @@ PrefetchAbort:
 	blx r4
 	b .
 
+.section .rodata
 csIRQ_Tag:
 csAbort_Tag:
 	.asciz "ARMv7"