X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=Kernel%2Farch%2Farmv7%2Fstart.S;h=8b19ede22a8168bd0770fd3e3a7f3f79b8c533df;hb=986359336a3d117cddbf33023aefdf585f6500f7;hp=5a8e4eb4acd331c23bf4cb70148b2e893902b694;hpb=7852cb728c839810f4de80b60ba29f29a1fcfa10;p=tpg%2Facess2.git

diff --git a/Kernel/arch/armv7/start.S b/Kernel/arch/armv7/start.S
index 5a8e4eb4..8b19ede2 100644
--- a/Kernel/arch/armv7/start.S
+++ b/Kernel/arch/armv7/start.S
@@ -7,14 +7,14 @@
 @ 
 .section .init
 interrupt_vector_table:
-ivt_reset:	b _start @ Reset
-ivt_undef:	b .	@ #UD
-ivt_svc:	b SVC_Handler @ SVC (used to be called SWI)
-ivt_prefetch:	b PrefetchAbort	@ Prefetch abort
-ivt_data:	b DataAbort	@ Data abort
-ivt_unused:	b .	@ Not Used
-ivt_irq:	b IRQHandler	@ IRQ
-ivt_fiq:	b .	@ FIQ (Fast interrupt)
+ivt_reset:	b _start	@ 0x00 Reset
+ivt_undef:	b .     	@ 0x04 #UD
+ivt_svc:	b SVC_Handler	@ 0x08 SVC (used to be called SWI)
+ivt_prefetch:	b PrefetchAbort	@ 0x0C Prefetch abort
+ivt_data:	b DataAbort	@ 0x10 Data abort
+ivt_unused:	b .     	@ 0x14 Not Used
+ivt_irq:	b IRQHandler	@ 0x18 IRQ
+ivt_fiq:	b .     	@ 0x1C FIQ (Fast interrupt)
 
 .globl _start
 _start:
@@ -93,40 +93,12 @@ SVC_Handler:
 	rfeia sp!	@ Pop state (actually RFEFD)
 .arm_specifics:
 	and r4, #0xFF
+	mov r0, r4	@ Number
+	mov r1, sp	@ Arguments
+	
+	ldr r4, =ARMv7_int_HandleSyscalls
+	blx r4
 
-@
-@ Cache invalidation
-	cmp r4, #0x001
-	bne 1f
-	@ Page align
-	mov r2, #0x1000
-	sub r2, #1
-	add r1, r2
-	mvn r2, r2
-	and r0, r2
-	and r1, r2
-	cmp r0, #0x78000000
-	cmpls r1, #0x78000000
-	movge r0, #-1
-	movge r1, #0
-	movge r2, #1
-	bge .ret
-
-2:
-	cmp r0, r1
-	mcrlt p15, 0, r0, c7, c5, 1
-	mcrlt p15, 0, r0, c7, c6, 1
-	addlt r0, #0x1000
-	blt 2b
-	mov r0, #0
-	mov r1, #0
-	mov r2, #0
-	b .ret
-1:	
-	mov r0, #-1
-	mov r1, #0
-	mov r2, #-1
-.ret:
 	add sp, #4*4
 	pop {r4-r12}
 	rfeia sp!
@@ -144,10 +116,10 @@ IRQHandler:
 
 	PUSH_GPRS
 
-@	ldr r0, =csIRQ_Tag
-@	ldr r1, =csIRQ_Fmt
-@	ldr r4, =Log_Debug
-@	blx r4
+	ldr r0, =csIRQ_Tag
+	ldr r1, =csIRQ_Fmt
+	ldr r4, =Log_Debug
+	blx r4
 	
 	@ Call the registered handler
 	ldr r0, gpIRQHandler
@@ -194,6 +166,7 @@ PrefetchAbort:
 	blx r4
 	b .
 
+.section .rodata
 csIRQ_Tag:
 csAbort_Tag:
 	.asciz "ARMv7"