X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=Kernel%2Farch%2Fx86%2Fdesctab.asm;h=dc064f579f7287910e44e1d6f66f00b7021892e7;hb=7e5607004c3221d55c7992148b2f0d958cf28533;hp=27b7bb1acccd88b97ebef2d76e02b4e6db5d7b67;hpb=b98fbd4e9c71447d81fc9bd643fb174c76346e0f;p=tpg%2Facess2.git diff --git a/Kernel/arch/x86/desctab.asm b/Kernel/arch/x86/desctab.asm index 27b7bb1a..dc064f57 100644 --- a/Kernel/arch/x86/desctab.asm +++ b/Kernel/arch/x86/desctab.asm @@ -21,8 +21,8 @@ gGDT: dd 0x0000FFFF, 0x00CF9200 ; 10 PL0 Data dd 0x0000FFFF, 0x00CFFA00 ; 18 PL3 Code dd 0x0000FFFF, 0x00CFF200 ; 20 PL3 Data - dd 26*4-1, 0x00408900 ; Double Fault TSS - times MAX_CPUS dd 26*4-1, 0x00408900 + dd 26*4-1, 0x00408900 ; 28 Double Fault TSS + times MAX_CPUS dd 26*4-1, 0x00408900 ; 30+ TSSes [global gGDTPtr] gGDTPtr: dw GDT_SIZE-1 @@ -31,7 +31,8 @@ gGDTPtr: ALIGN 8 [global gIDT] gIDT: - times 256 dd 0x00080000,0x00000F00 + ; CS = 0x08, Type = 32-bit Interrupt (0xE = 1 110) + times 256 dd 0x00080000,0x00000E00 [global gIDTPtr] gIDTPtr: dw 256 * 16 - 1 ; Limit @@ -52,30 +53,47 @@ Desctab_Install: jmp 0x08:.pl0code .pl0code: - ; Set IDT + ; Set up IDT + ; Helper Macros + ; - Set an IDT entry to an ISR %macro SETISR 1 mov eax, Isr%1 mov WORD [gIDT + %1*8], ax shr eax, 16 mov WORD [gIDT + %1*8+6], ax + ; Enable mov ax, WORD [gIDT + %1*8 + 4] or ax, 0x8000 mov WORD [gIDT + %1*8 + 4], ax %endmacro -%macro SETUSER 1 - mov ax, WORD [gIDT + %1*8 + 4] - or ax, 0x6000 - mov WORD [gIDT + %1*8 + 4], ax + ; Enable user calling of an ISR +%macro SET_USER 1 + or WORD [gIDT + %1*8 + 4], 0x6000 %endmacro + ; Set an ISR as a trap (leaves interrupts enabled when invoked) +%macro SET_TRAP 1 + or WORD [gIDT + %1*8 + 4], 0x0100 +%endmacro + + ; Error handlers %assign i 0 %rep 32 SETISR i %assign i i+1 %endrep + ; User Syscall SETISR 0xAC - SETUSER 0xAC + SET_USER 0xAC + SET_TRAP 0xAC ; Interruptable + ; MP ISRs + %if USE_MP + SETISR 0xEE ; 0xEE Timer + SETISR 0xEF ; 0xEF Spurious Interrupt + %endif + + ; IRQs %assign i 0xF0 %rep 16 SETISR i @@ -130,7 +148,7 @@ Isr%1: %macro ISR_NOERR 1 [global Isr%1] Isr%1: - xchg bx, bx + ;xchg bx, bx push 0 push %1 jmp ErrorCommon @@ -187,13 +205,37 @@ ISR_NOERR 31; 31: Reserved DEF_SYSCALL 0xAC ; Acess System Call +%if USE_MP +[global Isr0xEE] +[extern SchedulerBase] +; AP's Timer Interrupt +Isr0xEE: + push 0 ; Line up with interrupt number + xchg bx, bx ; MAGIC BREAK + jmp SchedulerBase +; Spurious Interrupt +[global Isr0xEF] +Isr0xEF: + xchg bx, bx ; MAGIC BREAK + iret +%endif + ; IRQs ; - Timer [global Isr240] +[global Isr240.jmp] [extern SchedulerBase] +[extern SetAPICTimerCount] Isr240: - push 0 + push 0 ; Line up with Argument in errors + push 0 ; CPU Number + ;xchg bx, bx ; MAGIC BREAK +Isr240.jmp: + %if USE_MP + jmp SetAPICTimerCount ; This is reset once the bus speed has been calculated + %else jmp SchedulerBase + %endif ; - Assignable %assign i 0xF1 %rep 16 @@ -206,7 +248,7 @@ Isr240: ; --------------------- [extern ErrorHandler] ErrorCommon: - ;xchg bx, bx + ;xchg bx, bx ; MAGIC BREAK pusha push ds push es @@ -246,6 +288,18 @@ SyscallCommon: call SyscallHandler add esp, 4 + ; Pass changes to TF on to the user + ; EFLAGS is stored at ESP[4+8+2+2] + ; 4 Segment Registers + ; 8 GPRs + ; 2 Error Code / Interrupt ID + ; 2 CS/EIP + pushf + pop eax + and eax, 0x100 ; 0x100 = Trace Flag + and WORD [esp+(4+8+2+2)*4], ~0x100 ; Clear + or DWORD [esp+(4+8+2+2)*4], eax ; Set for user + pop gs pop fs pop es @@ -258,6 +312,9 @@ SyscallCommon: ; IRQ Handling ; ------------ [extern IRQ_Handler] +[global IRQCommon] +[global IRQCommon_handled] +IRQCommon_handled equ IRQCommon.handled IRQCommon: pusha push ds @@ -273,6 +330,7 @@ IRQCommon: push esp call IRQ_Handler +.handled: add esp, 4 pop gs