X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=Kernel%2Farch%2Fx86%2Finclude%2Farch.h;h=0126be31789eae6ec5ef7f565ccc055ef9cd06fa;hb=126cef9a37b4859e3d6555760a5bbaa308a715d6;hp=0611c6c474c8f193af9da27545f6237a3799f42c;hpb=f119d0e5b18b7286d04fc536a94e0f96e3c51714;p=tpg%2Facess2.git

diff --git a/Kernel/arch/x86/include/arch.h b/Kernel/arch/x86/include/arch.h
index 0611c6c4..0126be31 100644
--- a/Kernel/arch/x86/include/arch.h
+++ b/Kernel/arch/x86/include/arch.h
@@ -6,43 +6,152 @@
 #ifndef _ARCH_H_
 #define _ARCH_H_
 
-// - Memory Layout
-#define	MM_USER_MIN	0x00200000
-#define	USER_STACK_SZ	0x00010000
-#define	USER_STACK_TOP	0x00200000
-#define	MM_USER_MAX	0xBC000000
-#define	MM_PPD_MIN	0xBC000000	// Per-Process Data
-#define	MM_PPD_VFS	0xBC000000	// 
-#define MM_PPD_CFG	0xBFFFF000	// 
-#define	MM_PPD_MAX	0xB0000000
+// - Base Defintions
 #define	KERNEL_BASE	0xC0000000
-#define	MM_KHEAP_BASE	0xC0400000	// C+4MiB
-#define	MM_KHEAP_MAX	0xCF000000	//
-#define MM_KERNEL_VFS	0xCF000000	// 
-#define MM_KUSER_CODE	0xCFFF0000	// 16 Pages
-#define	MM_MODULE_MIN	0xD0000000	// Lowest Module Address
-#define MM_MODULE_MAX	0xF0000000	// 512 MiB
-
 #define BITS	32
 
+// Allow nested spinlocks?
+#define STACKED_LOCKS	1
+#define LOCK_DISABLE_INTS	0
+
 // - Processor/Machine Specific Features
-#if ARCH == i386
-// Uses no advanced features
-# define	USE_MP	0
-# define	USE_PAE	0
-#elif ARCH == i586
-// All Enabled
-# define	USE_MP	1
-# define	USE_PAE	1
-#else
+#if ARCH != i386 && ARCH != i486 && ARCH != i586
 # error "Unknown architecture '" #ARCH "'"
 #endif
 
+#if USE_MP
+# define	MAX_CPUS	8
+#else
+# define	MAX_CPUS	1
+#endif
+
+#if USE_PAE
+# define	PHYS_BITS	48
+#else
+# define	PHYS_BITS	32
+#endif
+
+#define __ASM__	__asm__ __volatile__
+
+// === Spinlocks ===
+/**
+ * \brief Short Spinlock structure
+ */
+struct sShortSpinlock {
+	volatile int	Lock;	//!< Lock value
+	#if LOCK_DISABLE_INTS
+	 int	IF;	//!< Interrupt state on call to SHORTLOCK
+	#endif
+	#if STACKED_LOCKS
+	 int	Depth;
+	#endif
+};
+/**
+ * \brief Determine if a short spinlock is locked
+ * \param Lock	Lock pointer
+ */
+static inline int IS_LOCKED(struct sShortSpinlock *Lock) {
+	return !!Lock->Lock;
+}
+
+/**
+ * \brief Check if the current CPU has the lock
+ * \param Lock	Lock pointer
+ */
+static inline int CPU_HAS_LOCK(struct sShortSpinlock *Lock) {
+	extern int	GetCPUNum(void);
+	return Lock->Lock == GetCPUNum() + 1;
+}
+
+/**
+ * \brief Acquire a Short Spinlock
+ * \param Lock	Lock pointer
+ * 
+ * This type of mutex should only be used for very short sections of code,
+ * or in places where a Mutex_* would be overkill, such as appending
+ * an element to linked list (usually two assignement lines in C)
+ * 
+ * \note This type of lock halts interrupts, so ensure that no timing
+ * functions are called while it is held. As a matter of fact, spend as
+ * little time as possible with this lock held
+ */
+static inline void SHORTLOCK(struct sShortSpinlock *Lock) {
+	 int	v = 1;
+	#if LOCK_DISABLE_INTS
+	 int	IF;
+	#endif
+	#if STACKED_LOCKS
+	extern int	GetCPUNum(void);
+	 int	cpu = GetCPUNum() + 1;
+	#endif
+	
+	#if LOCK_DISABLE_INTS
+	// Save interrupt state and clear interrupts
+	__ASM__ ("pushf;\n\tpop %%eax\n\tcli" : "=a"(IF));
+	IF &= 0x200;	// AND out all but the interrupt flag
+	#endif
+	
+	#if STACKED_LOCKS
+	if( Lock->Lock == cpu ) {
+		Lock->Depth ++;
+		return ;
+	}
+	#endif
+	
+	// Wait for another CPU to release
+	while(v) {
+		#if STACKED_LOCKS
+		// CMPXCHG:
+		//  If r/m32 == EAX, set ZF and set r/m32 = r32
+		//  Else, clear ZF and set EAX = r/m32
+		__ASM__("lock cmpxchgl %2, (%3)"
+			: "=a"(v)
+			: "a"(0), "r"(cpu), "r"(&Lock->Lock)
+			);
+		#else
+		__ASM__("xchgl %%eax, (%%edi)":"=a"(v):"a"(1),"D"(&Lock->Lock));
+		#endif
+	}
+	
+	#if LOCK_DISABLE_INTS
+	Lock->IF = IF;
+	#endif
+}
+/**
+ * \brief Release a short lock
+ * \param Lock	Lock pointer
+ */
+static inline void SHORTREL(struct sShortSpinlock *Lock) {
+	#if STACKED_LOCKS
+	if( Lock->Depth ) {
+		Lock->Depth --;
+		return ;
+	}
+	#endif
+	
+	#if LOCK_DISABLE_INTS
+	// Lock->IF can change anytime once Lock->Lock is zeroed
+	if(Lock->IF) {
+		Lock->Lock = 0;
+		__ASM__ ("sti");
+	}
+	else {
+		Lock->Lock = 0;
+	}
+	#else
+	Lock->Lock = 0;
+	#endif
+}
+
 // === MACROS ===
-#define LOCK(lockptr)	do {int v=1;\
-	while(v)__asm__ __volatile__("lock xchgl %%eax, (%%edi)":"=a"(v):"a"(1),"D"(lockptr));}while(0)
-#define	RELEASE(lockptr)	__asm__ __volatile__("lock andl $0, (%%edi)"::"D"(lockptr));
+/**
+ * \brief Halt the CPU
+ */
 #define	HALT()	__asm__ __volatile__ ("hlt")
+/**
+ * \brief Fire a magic breakpoint (bochs)
+ */
+#define	MAGIC_BREAK()	__asm__ __volatile__ ("xchg %bx, %bx")
 
 // === TYPES ===
 typedef unsigned int	Uint;	// Unsigned machine native integer
@@ -57,15 +166,9 @@ typedef signed long		Sint32;
 typedef signed long long	Sint64;
 typedef Uint	size_t;
 
-#if USE_PAE
 typedef Uint64	tPAddr;
-#else
-typedef Uint32	tPAddr;
-#endif
 typedef Uint32	tVAddr;
 
-typedef void (*tThreadFunction)(void*);
-
 typedef struct {
     Uint	gs, fs, es, ds;
     Uint	edi, esi, ebp, kesp;
@@ -98,18 +201,6 @@ typedef struct {
 	Uint	Resvd4[1];	// SS
 } tSyscallRegs;
 
-typedef struct {
-	Uint16	LimitLow;
-	Uint16	BaseLow;
-	Uint8	BaseMid;
-	Uint8	Access;
-	struct {
-		unsigned LimitHi:	4;
-		unsigned Flags:		4;
-	} __attribute__ ((packed));
-	Uint8	BaseHi;
-} __attribute__ ((packed)) tGDT;
-
 typedef struct {
 	#if USE_PAE
 	Uint	PDPT[4];
@@ -122,7 +213,4 @@ typedef struct {
 	Uint	EIP, ESP, EBP;
 } tTaskState;
 
-// --- Interface Flags & Macros
-#define CLONE_VM	0x10
-
 #endif	// !defined(_ARCH_H_)