X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=Kernel%2Farch%2Fx86%2Finclude%2Farch.h;h=773556840a9dca2ca272d5fc2884ef3fff67a422;hb=a506fc15c09f7d8f178a7c7d9658b5bf45778128;hp=dd459c29bb3c4ab2cd26302d39a420a3a92ab581;hpb=b574da4b635c3c030757e0877e7a947c5b4a4871;p=tpg%2Facess2.git diff --git a/Kernel/arch/x86/include/arch.h b/Kernel/arch/x86/include/arch.h index dd459c29..77355684 100644 --- a/Kernel/arch/x86/include/arch.h +++ b/Kernel/arch/x86/include/arch.h @@ -6,35 +6,12 @@ #ifndef _ARCH_H_ #define _ARCH_H_ -// - Memory Layout -#define MM_USER_MIN 0x00200000 -#define USER_STACK_SZ 0x00010000 -#define USER_STACK_TOP 0x00200000 -#define MM_USER_MAX 0xBC000000 -#define MM_PPD_MIN 0xBC000000 // Per-Process Data -#define MM_PPD_VFS 0xBC000000 // -#define MM_PPD_CFG 0xBFFFF000 // -#define MM_PPD_MAX 0xB0000000 +// - Base Defintions #define KERNEL_BASE 0xC0000000 -#define MM_KHEAP_BASE 0xC0400000 // C+4MiB -#define MM_KHEAP_MAX 0xCF000000 // -#define MM_KERNEL_VFS 0xCF000000 // -#define MM_KUSER_CODE 0xCFFF0000 // 16 Pages -#define MM_MODULE_MIN 0xD0000000 // Lowest Module Address -#define MM_MODULE_MAX 0xF0000000 // 512 MiB - #define BITS 32 // - Processor/Machine Specific Features -#if ARCH == i386 -// Uses no advanced features -# define USE_MP 0 -# define USE_PAE 0 -#elif ARCH == i586 -// All Enabled -# define USE_MP 1 -# define USE_PAE 1 -#else +#if ARCH != i386 && ARCH != i486 && ARCH != i586 # error "Unknown architecture '" #ARCH "'" #endif @@ -44,10 +21,51 @@ # define MAX_CPUS 1 #endif +#if USE_PAE +# define PHYS_BITS 48 +#else +# define PHYS_BITS 32 +#endif + +#define __ASM__ __asm__ __volatile__ + // === MACROS === -#define LOCK(lockptr) do {int v=1;\ - while(v)__asm__ __volatile__("lock xchgl %%eax, (%%edi)":"=a"(v):"a"(1),"D"(lockptr));}while(0) -#define RELEASE(lockptr) __asm__ __volatile__("lock andl $0, (%%edi)"::"D"(lockptr)); +typedef volatile int tSpinlock; +#define IS_LOCKED(lockptr) (!!(*(tSpinlock*)lockptr)) +/** + * \brief Inter-Process interrupt (does a Yield) + */ +#define LOCK(lockptr) do {\ + int v=1;\ + while(v) {\ + __ASM__("xchgl %%eax, (%%edi)":"=a"(v):"a"(1),"D"(lockptr));\ + if(v) Threads_Yield();\ + }\ +}while(0) +/** + * \brief Tight spinlock (does a HLT) + */ +#define TIGHTLOCK(lockptr) do{\ + int v=1;\ + while(v) {\ + __ASM__("xchgl %%eax,(%%edi)":"=a"(v):"a"(1),"D"(lockptr));\ + if(v) __ASM__("hlt");\ + }\ +}while(0) +/** + * \brief Very Tight spinlock (short inter-cpu lock) + */ +#define VTIGHTLOCK(lockptr) do{\ + int v=1;\ + while(v)__ASM__("xchgl %%eax,(%%edi)":"=a"(v):"a"(1),"D"(lockptr));\ +}while(0) +/** + * \brief Release a held spinlock + */ +#define RELEASE(lockptr) __ASM__("lock andl $0, (%%edi)"::"D"(lockptr)); +/** + * \brief Halt the CPU + */ #define HALT() __asm__ __volatile__ ("hlt") // === TYPES === @@ -63,15 +81,9 @@ typedef signed long Sint32; typedef signed long long Sint64; typedef Uint size_t; -#if USE_PAE typedef Uint64 tPAddr; -#else -typedef Uint32 tPAddr; -#endif typedef Uint32 tVAddr; -typedef void (*tThreadFunction)(void*); - typedef struct { Uint gs, fs, es, ds; Uint edi, esi, ebp, kesp; @@ -104,18 +116,6 @@ typedef struct { Uint Resvd4[1]; // SS } tSyscallRegs; -typedef struct { - Uint16 LimitLow; - Uint16 BaseLow; - Uint8 BaseMid; - Uint8 Access; - struct { - unsigned LimitHi: 4; - unsigned Flags: 4; - } __attribute__ ((packed)); - Uint8 BaseHi; -} __attribute__ ((packed)) tGDT; - typedef struct { #if USE_PAE Uint PDPT[4]; @@ -128,7 +128,4 @@ typedef struct { Uint EIP, ESP, EBP; } tTaskState; -// --- Interface Flags & Macros -#define CLONE_VM 0x10 - #endif // !defined(_ARCH_H_)