X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=Kernel%2Farch%2Fx86_64%2Fmm_virt.c;h=0b8565738a0f8d46a8ae9354e0978140fc9a4b4e;hb=5255c9f07cb2e0e43cf283e256c964eaa7970c8e;hp=90c3721dc6d65690c32ddba1fcd61c321836e138;hpb=dec96d539a700885bace43218e26f684934a1a01;p=tpg%2Facess2.git diff --git a/Kernel/arch/x86_64/mm_virt.c b/Kernel/arch/x86_64/mm_virt.c index 90c3721d..0b856573 100644 --- a/Kernel/arch/x86_64/mm_virt.c +++ b/Kernel/arch/x86_64/mm_virt.c @@ -6,9 +6,12 @@ #define DEBUG 0 #include #include +#include #include // === CONSTANTS === +#define PHYS_BITS 52 // TODO: Move out + #define PML4_SHIFT 39 #define PDP_SHIFT 30 #define PDIR_SHIFT 21 @@ -20,10 +23,10 @@ #define PDP_MASK (((Uint)1 << 18)-1) #define PML4_MASK (((Uint)1 << 9)-1) -#define PF_PRESENT 0x1 -#define PF_WRITE 0x2 -#define PF_USER 0x4 -#define PF_LARGE 0x0 +#define PF_PRESENT 0x001 +#define PF_WRITE 0x002 +#define PF_USER 0x004 +#define PF_LARGE 0x000 #define PF_COW 0x200 #define PF_PAGED 0x400 #define PF_NX 0x80000000##00000000 @@ -34,19 +37,37 @@ #define PAGEDIRPTR(idx) PAGEDIR((MM_FRACTAL_BASE>>21)+((idx)&PDP_MASK)) #define PAGEMAPLVL4(idx) PAGEDIRPTR((MM_FRACTAL_BASE>>30)+((idx)&PML4_MASK)) -#define INVLPG(__addr) __asm__ __volatile__ ("invlpg (%0)"::"r"(__addr)); +#define TMPCR3() PAGEMAPLVL4(MM_TMPFRAC_BASE>>39) +#define TMPTABLE(idx) (*((tPAddr*)MM_TMPFRAC_BASE+((idx)&PAGE_MASK))) +#define TMPDIR(idx) PAGETABLE((MM_TMPFRAC_BASE>>12)+((idx)&TABLE_MASK)) +#define TMPDIRPTR(idx) PAGEDIR((MM_TMPFRAC_BASE>>21)+((idx)&PDP_MASK)) +#define TMPMAPLVL4(idx) PAGEDIRPTR((MM_TMPFRAC_BASE>>30)+((idx)&PML4_MASK)) + +#define INVLPG(__addr) __asm__ __volatile__ ("invlpg (%0)"::"r"(__addr)) +#define INVLPG_ALL() __asm__ __volatile__ ("mov %cr3,%rax;\n\tmov %rax,%cr3;") +#define INVLPG_GLOBAL() __asm__ __volatile__ ("mov %cr4,%rax;\n\txorl $0x80, %eax;\n\tmov %rax,%cr4;\n\txorl $0x80, %eax;\n\tmov %rax,%cr4") + +// === CONSTS === +//tPAddr * const gaPageTable = MM_FRACTAL_BASE; + +// === IMPORTS === +extern void Error_Backtrace(Uint IP, Uint BP); +extern tPAddr gInitialPML4[512]; // === PROTOTYPES === void MM_InitVirt(void); //void MM_FinishVirtualInit(void); void MM_PageFault(tVAddr Addr, Uint ErrorCode, tRegs *Regs); void MM_DumpTables(tVAddr Start, tVAddr End); + int MM_GetPageEntryPtr(tVAddr Addr, BOOL bTemp, BOOL bAllocate, BOOL bLargePage, tPAddr **Pointer); + int MM_MapEx(tVAddr VAddr, tPAddr PAddr, BOOL bTemp, BOOL bLarge); // int MM_Map(tVAddr VAddr, tPAddr PAddr); void MM_Unmap(tVAddr VAddr); void MM_ClearUser(void); int MM_GetPageEntry(tVAddr Addr, tPAddr *Phys, Uint *Flags); // === GLOBALS === +tMutex glMM_TempFractalLock; // === CODE === void MM_InitVirt(void) @@ -56,6 +77,7 @@ void MM_InitVirt(void) void MM_FinishVirtualInit(void) { + PAGEMAPLVL4(0) = 0; } /** @@ -63,14 +85,14 @@ void MM_FinishVirtualInit(void) */ void MM_PageFault(tVAddr Addr, Uint ErrorCode, tRegs *Regs) { - // TODO: Copy on Write + // TODO: Implement Copy-on-Write #if 0 if( gaPageDir [Addr>>22] & PF_PRESENT && gaPageTable[Addr>>12] & PF_PRESENT && gaPageTable[Addr>>12] & PF_COW ) { tPAddr paddr; - if(MM_GetRefCount( gaPageTable[Addr>>12] & ~0xFFF ) == 1) + if(MM_GetRefCount( gaPageTable[Addr>>12] & PADDR_MASK ) == 1) { gaPageTable[Addr>>12] &= ~PF_COW; gaPageTable[Addr>>12] |= PF_PRESENT|PF_WRITE; @@ -79,7 +101,7 @@ void MM_PageFault(tVAddr Addr, Uint ErrorCode, tRegs *Regs) { //Log("MM_PageFault: COW - MM_DuplicatePage(0x%x)", Addr); paddr = MM_DuplicatePage( Addr ); - MM_DerefPhys( gaPageTable[Addr>>12] & ~0xFFF ); + MM_DerefPhys( gaPageTable[Addr>>12] & PADDR_MASK ); gaPageTable[Addr>>12] &= PF_USER; gaPageTable[Addr>>12] |= paddr|PF_PRESENT|PF_WRITE; } @@ -121,7 +143,7 @@ void MM_PageFault(tVAddr Addr, Uint ErrorCode, tRegs *Regs) Log("Code at %p accessed %p", Regs->RIP, Addr); // Print Stack Backtrace -// Error_Backtrace(Regs->RIP, Regs->RBP); + Error_Backtrace(Regs->RIP, Regs->RBP); MM_DumpTables(0, -1); @@ -135,10 +157,11 @@ void MM_PageFault(tVAddr Addr, Uint ErrorCode, tRegs *Regs) */ void MM_DumpTables(tVAddr Start, tVAddr End) { + #define CANOICAL(addr) ((addr)&0x800000000000?(addr)|0xFFFF000000000000:(addr)) const tPAddr CHANGEABLE_BITS = 0xFF8; const tPAddr MASK = ~CHANGEABLE_BITS; // Physical address and access bits tVAddr rangeStart = 0; - tPAddr expected = CHANGEABLE_BITS; // MASK is used because it's not a vaild value + tPAddr expected = CHANGEABLE_BITS; // CHANGEABLE_BITS is used because it's not a vaild value tVAddr curPos; Uint page; @@ -169,10 +192,10 @@ void MM_DumpTables(tVAddr Start, tVAddr End) || (PAGETABLE(page) & MASK) != expected) { if(expected != CHANGEABLE_BITS) { - Log("%016x-0x%016x => %013x-%013x (%c%c%c%c)", - rangeStart, curPos - 1, - PAGETABLE(rangeStart>>12) & ~0xFFF, - (expected & ~0xFFF) - 1, + Log("%016llx => %013llx : 0x%6llx (%c%c%c%c)", + CANOICAL(rangeStart), + PAGETABLE(rangeStart>>12) & PADDR_MASK, + curPos - rangeStart, (expected & PF_PAGED ? 'p' : '-'), (expected & PF_COW ? 'C' : '-'), (expected & PF_USER ? 'U' : '-'), @@ -208,85 +231,111 @@ void MM_DumpTables(tVAddr Start, tVAddr End) } if(expected != CHANGEABLE_BITS) { - Log("%016x-%016x => %013x-%013x (%s%s%s%s)", - rangeStart, curPos - 1, - PAGETABLE(rangeStart>>12) & ~0xFFF, - (expected & ~0xFFF) - 1, - (expected & PF_PAGED ? "p" : "-"), - (expected & PF_COW ? "C" : "-"), - (expected & PF_USER ? "U" : "-"), - (expected & PF_WRITE ? "W" : "-") + Log("%016llx => %013llx : 0x%6llx (%c%c%c%c)", + CANOICAL(rangeStart), + PAGETABLE(rangeStart>>12) & PADDR_MASK, + curPos - rangeStart, + (expected & PF_PAGED ? 'p' : '-'), + (expected & PF_COW ? 'C' : '-'), + (expected & PF_USER ? 'U' : '-'), + (expected & PF_WRITE ? 'W' : '-') ); expected = 0; } + #undef CANOICAL } /** - * \brief Map a physical page to a virtual one + * \brief Get a pointer to a page entry + * \param Addr Virtual Address + * \param bTemp Use the Temporary fractal mapping + * \param bAllocate Allocate entries + * \param bLargePage Request a large page + * \param Pointer Location to place the calculated pointer + * \return Page size, or -ve on error */ -int MM_Map(tVAddr VAddr, tPAddr PAddr) +int MM_GetPageEntryPtr(tVAddr Addr, BOOL bTemp, BOOL bAllocate, BOOL bLargePage, tPAddr **Pointer) { + tPAddr *pmlevels[4]; tPAddr tmp; + const int ADDR_SIZES[] = {39, 30, 21, 12}; + const int nADDR_SIZES = sizeof(ADDR_SIZES)/sizeof(ADDR_SIZES[0]); + int i; - ENTER("xVAddr xPAddr", VAddr, PAddr); - - // Check that the page hasn't been mapped already + if( bTemp ) { - Uint flags; - int ret; - ret = MM_GetPageEntry(VAddr, &tmp, &flags); - if( flags & PF_PRESENT ) { - LEAVE('i', 0); - return 0; - } + pmlevels[3] = &TMPTABLE(0); // Page Table + pmlevels[2] = &TMPDIR(0); // PDIR + pmlevels[1] = &TMPDIRPTR(0); // PDPT + pmlevels[0] = &TMPMAPLVL4(0); // PML4 } - - // Check PML4 - if( !(PAGEMAPLVL4(VAddr >> 39) & 1) ) + else { - tmp = MM_AllocPhys(); - if(!tmp) { - LEAVE('i', 0); - return 0; - } - PAGEMAPLVL4(VAddr >> 39) = tmp | 3; - INVLPG( &PAGEDIRPTR( (VAddr>>39)<<9 ) ); - memset( &PAGEDIRPTR( (VAddr>>39)<<9 ), 0, 4096 ); + pmlevels[3] = (void*)MM_FRACTAL_BASE; // Page Table + pmlevels[2] = &pmlevels[3][(MM_FRACTAL_BASE>>12)&PAGE_MASK]; // PDIR + pmlevels[1] = &pmlevels[2][(MM_FRACTAL_BASE>>21)&TABLE_MASK]; // PDPT + pmlevels[0] = &pmlevels[1][(MM_FRACTAL_BASE>>30)&PDP_MASK]; // PML4 } - // Check PDP - if( !(PAGEDIRPTR(VAddr >> 30) & 1) ) - { - tmp = MM_AllocPhys(); - if(!tmp) { - LEAVE('i', 0); - return 0; - } - PAGEDIRPTR(VAddr >> 30) = tmp | 3; - INVLPG( &PAGEDIR( (VAddr>>30)<<9 ) ); - memset( &PAGEDIR( (VAddr>>30)<<9 ), 0, 0x1000 ); - } + // Mask address + Addr &= (1ULL << 48)-1; - // Check Page Dir - if( !(PAGEDIR(VAddr >> 21) & 1) ) + for( i = 0; i < nADDR_SIZES-1; i ++ ) { - tmp = MM_AllocPhys(); - if(!tmp) { - LEAVE('i', 0); - return 0; +// INVLPG( &pmlevels[i][ (Addr >> ADDR_SIZES[i]) & + + // Check for a large page + if( (Addr & ((1ULL << ADDR_SIZES[i])-1)) == 0 && bLargePage ) + { + if(Pointer) *Pointer = &pmlevels[i][Addr >> ADDR_SIZES[i]]; + return ADDR_SIZES[i]; + } + // Allocate an entry if required + if( !(pmlevels[i][Addr >> ADDR_SIZES[i]] & 1) ) + { + if( !bAllocate ) return -4; // If allocation is not requested, error + tmp = MM_AllocPhys(); + if(!tmp) return -2; + pmlevels[i][Addr >> ADDR_SIZES[i]] = tmp | 3; + INVLPG( &pmlevels[i+1][ (Addr>>ADDR_SIZES[i])*512 ] ); + memset( &pmlevels[i+1][ (Addr>>ADDR_SIZES[i])*512 ], 0, 0x1000 ); + } + // Catch large pages + else if( pmlevels[i][Addr >> ADDR_SIZES[i]] & PF_LARGE ) + { + // Alignment + if( (Addr & ((1ULL << ADDR_SIZES[i])-1)) != 0 ) return -3; + if(Pointer) *Pointer = &pmlevels[i][Addr >> ADDR_SIZES[i]]; + return ADDR_SIZES[i]; // Large page warning } - PAGEDIR(VAddr >> 21) = tmp | 3; - INVLPG( &PAGETABLE( (VAddr>>21)<<9 ) ); - memset( &PAGETABLE( (VAddr>>21)<<9 ), 0, 4096 ); } - // Check if this virtual address is already mapped - if( PAGETABLE(VAddr >> PTAB_SHIFT) & 1 ) { - LEAVE('i', 0); - return 0; - } + // And, set the page table entry + if(Pointer) *Pointer = &pmlevels[i][Addr >> ADDR_SIZES[i]]; + return ADDR_SIZES[i]; +} + +/** + * \brief Map a physical page to a virtual one + * \param VAddr Target virtual address + * \param PAddr Physical address of page + * \param bTemp Use tempoary mappings + * \param bLarge Treat as a large page + */ +int MM_MapEx(tVAddr VAddr, tPAddr PAddr, BOOL bTemp, BOOL bLarge) +{ + tPAddr *ent; + int rv; - PAGETABLE(VAddr >> PTAB_SHIFT) = PAddr | 3; + ENTER("xVAddr xPAddr", VAddr, PAddr); + + // Get page pointer (Allow allocating) + rv = MM_GetPageEntryPtr(VAddr, bTemp, 1, bLarge, &ent); + if(rv < 0) LEAVE_RET('i', 0); + + if( *ent & 1 ) LEAVE_RET('i', 0); + + *ent = PAddr | 3; INVLPG( VAddr ); @@ -294,6 +343,16 @@ int MM_Map(tVAddr VAddr, tPAddr PAddr) return 1; } +/** + * \brief Map a physical page to a virtual one + * \param VAddr Target virtual address + * \param PAddr Physical address of page + */ +int MM_Map(tVAddr VAddr, tPAddr PAddr) +{ + return MM_MapEx(VAddr, PAddr, 0, 0); +} + /** * \brief Removed a mapped page */ @@ -319,23 +378,13 @@ tPAddr MM_Allocate(tVAddr VAddr) ENTER("xVAddr", VAddr); - // NOTE: This is hack, but I like my dumps to be neat - #if 1 - if( !MM_Map(VAddr, 0) ) // Make sure things are allocated - { - Warning("MM_Allocate: Unable to map, tables did not initialise"); - LEAVE('i', 0); - return 0; - } - MM_Unmap(VAddr); - #endif + // Ensure the tables are allocated before the page (keeps things neat) + MM_GetPageEntryPtr(VAddr, 0, 1, 0, NULL); + // Allocate the page ret = MM_AllocPhys(); LOG("ret = %x", ret); - if(!ret) { - LEAVE('i', 0); - return 0; - } + if(!ret) LEAVE_RET('i', 0); if( !MM_Map(VAddr, ret) ) { @@ -345,10 +394,13 @@ tPAddr MM_Allocate(tVAddr VAddr) return 0; } - LEAVE('x', ret); + LEAVE('X', ret); return ret; } +/** + * \brief Deallocate a page at a virtual address + */ void MM_Deallocate(tVAddr VAddr) { tPAddr phys; @@ -370,57 +422,17 @@ void MM_Deallocate(tVAddr VAddr) */ int MM_GetPageEntry(tVAddr Addr, tPAddr *Phys, Uint *Flags) { - if(!Phys || !Flags) return 0; + tPAddr *ptr; + int ret; - // Check if the PML4 entry is present - if( !(PAGEMAPLVL4(Addr >> 39) & 1) ) { - *Phys = 0; - *Flags = 0; - return 39; - } - // - Check for large page - if( PAGEMAPLVL4(Addr >> 39) & PF_LARGE ) { - *Phys = PAGEMAPLVL4(Addr >> 39) & ~0xFFF; - *Flags = PAGEMAPLVL4(Addr >> 39) & 0xFFF; - return 39; - } + if(!Phys || !Flags) return 0; - // Check the PDP entry - if( !(PAGEDIRPTR(Addr >> 30) & 1) ) { - *Phys = 0; - *Flags = 0; - return 30; - } - // - Check for large page - if( PAGEDIRPTR(Addr >> 30) & PF_LARGE ) { - *Phys = PAGEDIRPTR(Addr >> 30) & ~0xFFF; - *Flags = PAGEDIRPTR(Addr >> 30) & 0xFFF; - return 30; - } + ret = MM_GetPageEntryPtr(Addr, 0, 0, 0, &ptr); + if( ret < 0 ) return 0; - // Check PDIR Entry - if( !(PAGEDIR(Addr >> 21) & 1) ) { - *Phys = 0; - *Flags = 0; - return 21; - } - // - Check for large page - if( PAGEDIR(Addr >> 21) & PF_LARGE ) { - *Phys = PAGEDIR(Addr >> 21) & ~0xFFF; - *Flags = PAGEDIR(Addr >> 21) & 0xFFF; - return 21; - } - - // And, check the page table entry - if( !(PAGETABLE(Addr >> PTAB_SHIFT) & 1) ) { - *Phys = 0; - *Flags = 0; - } - else { - *Phys = PAGETABLE(Addr >> PTAB_SHIFT) & ~0xFFF; - *Flags = PAGETABLE(Addr >> PTAB_SHIFT) & 0xFFF; - } - return 12; + *Phys = *ptr & PADDR_MASK; + *Flags = *ptr & 0xFFF; + return ret; } /** @@ -428,12 +440,13 @@ int MM_GetPageEntry(tVAddr Addr, tPAddr *Phys, Uint *Flags) */ tPAddr MM_GetPhysAddr(tVAddr Addr) { - tPAddr ret; - Uint flags; + tPAddr *ptr; + int ret; - MM_GetPageEntry(Addr, &ret, &flags); + ret = MM_GetPageEntryPtr(Addr, 0, 0, 0, &ptr); + if( ret < 0 ) return 0; - return ret | (Addr & 0xFFF); + return (*ptr & PADDR_MASK) | (Addr & 0xFFF); } /** @@ -442,19 +455,14 @@ tPAddr MM_GetPhysAddr(tVAddr Addr) void MM_SetFlags(tVAddr VAddr, Uint Flags, Uint Mask) { tPAddr *ent; + int rv; - // Validity Check - if( !(PAGEMAPLVL4(VAddr >> 39) & 1) ) - return ; - if( !(PAGEDIRPTR(VAddr >> 30) & 1) ) - return ; - if( !(PAGEDIR(VAddr >> 21) & 1) ) - return ; - if( !(PAGETABLE(VAddr >> 12) & 1) ) - return ; + // Get pointer + rv = MM_GetPageEntryPtr(VAddr, 0, 0, 0, &ent); + if(rv < 0) return ; - // Set Flags - ent = &PAGETABLE(VAddr >> 12); + // Ensure the entry is valid + if( !(*ent & 1) ) return ; // Read-Only if( Mask & MM_PFLAG_RO ) @@ -509,20 +517,12 @@ void MM_SetFlags(tVAddr VAddr, Uint Flags, Uint Mask) Uint MM_GetFlags(tVAddr VAddr) { tPAddr *ent; - Uint ret = 0; + int rv, ret = 0; - // Validity Check - if( !(PAGEMAPLVL4(VAddr >> 39) & 1) ) - return 0; - if( !(PAGEDIRPTR(VAddr >> 30) & 1) ) - return 0; - if( !(PAGEDIR(VAddr >> 21) & 1) ) - return 0; - if( !(PAGETABLE(VAddr >> 12) & 1) ) - return 0; + rv = MM_GetPageEntryPtr(VAddr, 0, 0, 0, &ent); + if(rv < 0) return 0; - // Set Flags - ent = &PAGETABLE(VAddr >> 12); + if( !(*ent & 1) ) return 0; // Read-Only if( !(*ent & PF_WRITE) ) ret |= MM_PFLAG_RO; @@ -542,6 +542,30 @@ Uint MM_GetFlags(tVAddr VAddr) */ tVAddr MM_MapHWPages(tPAddr PAddr, Uint Number) { + tVAddr ret; + int num; + + //TODO: Add speedups (memory of first possible free) + for( ret = MM_HWMAP_BASE; ret < MM_HWMAP_TOP; ret += 0x1000 ) + { + for( num = Number; num -- && ret < MM_HWMAP_TOP; ret += 0x1000 ) + { + if( MM_GetPhysAddr(ret) != 0 ) break; + } + if( num >= 0 ) continue; + + PAddr += 0x1000 * Number; + + while( Number -- ) + { + ret -= 0x1000; + PAddr -= 0x1000; + MM_Map(ret, PAddr); + } + + return ret; + } + Log_KernelPanic("MM", "TODO: Implement MM_MapHWPages"); return 0; } @@ -551,19 +575,88 @@ tVAddr MM_MapHWPages(tPAddr PAddr, Uint Number) */ void MM_UnmapHWPages(tVAddr VAddr, Uint Number) { - Log_KernelPanic("MM", "TODO: Implement MM_UnmapHWPages"); +// Log_KernelPanic("MM", "TODO: Implement MM_UnmapHWPages"); + while( Number -- ) + { + MM_Unmap(VAddr); + VAddr += 0x1000; + } +} + + +/** + * \fn tVAddr MM_AllocDMA(int Pages, int MaxBits, tPAddr *PhysAddr) + * \brief Allocates DMA physical memory + * \param Pages Number of pages required + * \param MaxBits Maximum number of bits the physical address can have + * \param PhysAddr Pointer to the location to place the physical address allocated + * \return Virtual address allocate + */ +tVAddr MM_AllocDMA(int Pages, int MaxBits, tPAddr *PhysAddr) +{ + tPAddr phys; + tVAddr ret; + + // Sanity Check + if(MaxBits < 12 || !PhysAddr) return 0; + + // Fast Allocate + if(Pages == 1 && MaxBits >= PHYS_BITS) + { + phys = MM_AllocPhys(); + *PhysAddr = phys; + ret = MM_MapHWPages(phys, 1); + if(ret == 0) { + MM_DerefPhys(phys); + return 0; + } + return ret; + } + + // Slow Allocate + phys = MM_AllocPhysRange(Pages, MaxBits); + // - Was it allocated? + if(phys == 0) return 0; + + // Allocated successfully, now map + ret = MM_MapHWPages(phys, Pages); + if( ret == 0 ) { + // If it didn't map, free then return 0 + for(;Pages--;phys+=0x1000) + MM_DerefPhys(phys); + return 0; + } + + *PhysAddr = phys; + return ret; } // --- Tempory Mappings --- tVAddr MM_MapTemp(tPAddr PAddr) { - Log_KernelPanic("MM", "TODO: Implement MM_MapTemp"); + const int max_slots = (MM_TMPMAP_END - MM_TMPMAP_BASE) / PAGE_SIZE; + tVAddr ret = MM_TMPMAP_BASE; + int i; + + for( i = 0; i < max_slots; i ++, ret += PAGE_SIZE ) + { + tPAddr *ent; + if( MM_GetPageEntryPtr( ret, 0, 1, 0, &ent) < 0 ) { + continue ; + } + + if( *ent & 1 ) + continue ; + + *ent = PAddr | 3; + return ret; + } return 0; } void MM_FreeTemp(tVAddr VAddr) { - Log_KernelPanic("MM", "TODO: Implement MM_FreeTemp"); + MM_Deallocate(VAddr); return ; } @@ -572,76 +665,192 @@ void MM_FreeTemp(tVAddr VAddr) tPAddr MM_Clone(void) { tPAddr ret; + int i; + tVAddr kstackbase; + + // tThread->KernelStack is the top + // There is 1 guard page below the stack + kstackbase = Proc_GetCurThread()->KernelStack - KERNEL_STACK_SIZE + 0x1000; + + Log("MM_Clone: kstackbase = %p", kstackbase); // #1 Create a copy of the PML4 ret = MM_AllocPhys(); if(!ret) return 0; - Log_KernelPanic("MM", "TODO: Implement MM_Clone"); - // #2 Alter the fractal pointer + Mutex_Acquire(&glMM_TempFractalLock); + TMPCR3() = ret | 3; + INVLPG_ALL(); + // #3 Set Copy-On-Write to all user pages - // #4 Return - return 0; + for( i = 0; i < 256; i ++) + { + TMPMAPLVL4(i) = PAGEMAPLVL4(i); +// Log_Debug("MM", "TMPMAPLVL4(%i) = 0x%016llx", i, TMPMAPLVL4(i)); + if( TMPMAPLVL4(i) & 1 ) + { + MM_RefPhys( TMPMAPLVL4(i) & PADDR_MASK ); + TMPMAPLVL4(i) |= PF_COW; + TMPMAPLVL4(i) &= ~PF_WRITE; + } + } + + // #4 Map in kernel pages + for( i = 256; i < 512; i ++ ) + { + // Skip addresses: + // 320 0xFFFFA.... - Kernel Stacks + if( i == 320 ) continue; + // 509 0xFFFFFE0.. - Fractal mapping + if( i == 509 ) continue; + // 510 0xFFFFFE8.. - Temp fractal mapping + if( i == 510 ) continue; + + TMPMAPLVL4(i) = PAGEMAPLVL4(i); + if( TMPMAPLVL4(i) & 1 ) + MM_RefPhys( TMPMAPLVL4(i) & PADDR_MASK ); + } + + // #5 Set fractal mapping + TMPMAPLVL4(509) = ret | 3; + TMPMAPLVL4(510) = 0; // Temp + + // #6 Create kernel stack (-1 to account for the guard) + TMPMAPLVL4(320) = 0; + for( i = 0; i < KERNEL_STACK_SIZE/0x1000-1; i ++ ) + { + tPAddr phys = MM_AllocPhys(); + tVAddr tmpmapping; + MM_MapEx(kstackbase+i*0x1000, phys, 1, 0); + + tmpmapping = MM_MapTemp(phys); + memcpy((void*)tmpmapping, (void*)(kstackbase+i*0x1000), 0x1000); + MM_FreeTemp(tmpmapping); + } + + // #7 Return + TMPCR3() = 0; + INVLPG_ALL(); + Mutex_Release(&glMM_TempFractalLock); + Log("MM_Clone: RETURN %P\n", ret); + return ret; } void MM_ClearUser(void) { tVAddr addr = 0; - // #1 Traverse the structure < 2^47, Deref'ing all pages - // #2 Free tables/dirs/pdps once they have been cleared + int pml4, pdpt, pd, pt; - for( addr = 0; addr < 0x800000000000; ) + for( pml4 = 0; pml4 < 256; pml4 ++ ) { - if( PAGEMAPLVL4(addr >> PML4_SHIFT) & 1 ) + // Catch an un-allocated PML4 entry + if( !(PAGEMAPLVL4(pml4) & 1) ) { + addr += 1ULL << PML4_SHIFT; + continue ; + } + + // Catch a large COW + if( (PAGEMAPLVL4(pml4) & PF_COW) ) { + addr += 1ULL << PML4_SHIFT; + } + else { - if( PAGEDIRPTR(addr >> PDP_SHIFT) & 1 ) + // TODO: Large pages + + // Child entries + for( pdpt = 0; pdpt < 512; pdpt ++ ) { - if( PAGEDIR(addr >> PDIR_SHIFT) & 1 ) - { - // Page - if( PAGETABLE(addr >> PTAB_SHIFT) & 1 ) { - MM_DerefPhys( PAGETABLE(addr >> PTAB_SHIFT) & PADDR_MASK ); - PAGETABLE(addr >> PTAB_SHIFT) = 0; - } - addr += 1 << PTAB_SHIFT; - // Dereference the PDIR Entry - if( (addr + (1 << PTAB_SHIFT)) >> PDIR_SHIFT != (addr >> PDIR_SHIFT) ) { - MM_DerefPhys( PAGEMAPLVL4(addr >> PDIR_SHIFT) & PADDR_MASK ); - PAGEDIR(addr >> PDIR_SHIFT) = 0; - } - } - else { - addr += 1 << PDIR_SHIFT; + // Unallocated + if( !(PAGEDIRPTR(addr >> PDP_SHIFT) & 1) ) { + addr += 1ULL << PDP_SHIFT; continue; } - // Dereference the PDP Entry - if( (addr + (1 << PDIR_SHIFT)) >> PDP_SHIFT != (addr >> PDP_SHIFT) ) { - MM_DerefPhys( PAGEMAPLVL4(addr >> PDP_SHIFT) & PADDR_MASK ); - PAGEDIRPTR(addr >> PDP_SHIFT) = 0; + + // Catch a large COW + if( (PAGEDIRPTR(addr >> PDP_SHIFT) & PF_COW) ) { + addr += 1ULL << PDP_SHIFT; } - } - else { - addr += 1 << PDP_SHIFT; - continue; - } - // Dereference the PML4 Entry - if( (addr + (1 << PDP_SHIFT)) >> PML4_SHIFT != (addr >> PML4_SHIFT) ) { - MM_DerefPhys( PAGEMAPLVL4(addr >> PML4_SHIFT) & PADDR_MASK ); - PAGEMAPLVL4(addr >> PML4_SHIFT) = 0; + else { + // Child entries + for( pd = 0; pd < 512; pd ++ ) + { + // Unallocated PDir entry + if( !(PAGEDIR(addr >> PDIR_SHIFT) & 1) ) { + addr += 1ULL << PDIR_SHIFT; + continue; + } + + // COW Page Table + if( PAGEDIR(addr >> PDIR_SHIFT) & PF_COW ) { + addr += 1ULL << PDIR_SHIFT; + } + else + { + // TODO: Catch large pages + + // Child entries + for( pt = 0; pt < 512; pt ++ ) + { + // Free page + if( PAGETABLE(addr >> PTAB_SHIFT) & 1 ) { + MM_DerefPhys( PAGETABLE(addr >> PTAB_SHIFT) & PADDR_MASK ); + PAGETABLE(addr >> PTAB_SHIFT) = 0; + } + addr += 1ULL << 12; + } + } + // Free page table + MM_DerefPhys( PAGEDIR(addr >> PDIR_SHIFT) & PADDR_MASK ); + PAGEDIR(addr >> PDIR_SHIFT) = 0; + } + } + // Free page directory + MM_DerefPhys( PAGEDIRPTR(addr >> PDP_SHIFT) & PADDR_MASK ); + PAGEDIRPTR(addr >> PDP_SHIFT) = 0; } } - else { - addr += (tVAddr)1 << PML4_SHIFT; - continue; - } + // Free page directory pointer table (PML4 entry) + MM_DerefPhys( PAGEMAPLVL4(pml4) & PADDR_MASK ); + PAGEMAPLVL4(pml4) = 0; } } tVAddr MM_NewWorkerStack(void) { - Log_KernelPanic("MM", "TODO: Implement MM_NewWorkerStack"); - return 0; + tVAddr ret; + int i; + + // #1 Set temp fractal to PID0 + Mutex_Acquire(&glMM_TempFractalLock); + TMPCR3() = ((tPAddr)gInitialPML4 - KERNEL_BASE) | 3; + + // #2 Scan for a free stack addresss < 2^47 + for(ret = 0x100000; ret < (1ULL << 47); ret += KERNEL_STACK_SIZE) + { + if( MM_GetPhysAddr(ret) == 0 ) break; + } + if( ret >= (1ULL << 47) ) { + Mutex_Release(&glMM_TempFractalLock); + return 0; + } + + // #3 Map all save the last page in the range + // - This acts as as guard page, and doesn't cost us anything. + for( i = 0; i < KERNEL_STACK_SIZE/0x1000 - 1; i ++ ) + { + tPAddr phys = MM_AllocPhys(); + if(!phys) { + // TODO: Clean up + Log_Error("MM", "MM_NewWorkerStack - Unable to allocate page"); + return 0; + } + MM_MapEx(ret + i*0x1000, phys, 1, 0); + } + + Mutex_Release(&glMM_TempFractalLock); + + return ret + i*0x1000; } /**