X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=Kernel%2Farch%2Fx86_64%2Fmm_virt.c;h=b4b26ec19ada9d004a108d7cd5c9e567d5f57e02;hb=e71a426f7cc3cd98e43ca8f529ee8e1e13395885;hp=b781421930329cbd1db25dab8378abaafdfb9ff9;hpb=55b476b828e551a75975468ffe15d08a32b10fb1;p=tpg%2Facess2.git

diff --git a/Kernel/arch/x86_64/mm_virt.c b/Kernel/arch/x86_64/mm_virt.c
index b7814219..b4b26ec1 100644
--- a/Kernel/arch/x86_64/mm_virt.c
+++ b/Kernel/arch/x86_64/mm_virt.c
@@ -5,6 +5,7 @@
  */
 #include <acess.h>
 #include <mm_virt.h>
+#include <proc.h>
 
 // === CONSTANTS ===
 #define PML4_SHIFT	39
@@ -12,25 +13,193 @@
 #define PDIR_SHIFT	21
 #define PTAB_SHIFT	12
 
+#define	PADDR_MASK	0x7FFFFFFF##FFFFF000
+#define PAGE_MASK	(((Uint)1 << 36)-1)
+#define TABLE_MASK	(((Uint)1 << 27)-1)
+#define PDP_MASK	(((Uint)1 << 18)-1)
+#define PML4_MASK	(((Uint)1 << 9)-1)
+
 #define	PF_PRESENT	0x1
 #define	PF_WRITE	0x2
 #define	PF_USER		0x4
-#define	PF_NX		0x80000000##00000000
 #define	PF_COW		0x200
 #define	PF_PAGED	0x400
+#define	PF_NX		0x80000000##00000000
 
 // === MACROS ===
-#define PAGETABLE(idx)	(*((tPAddr*)MM_FRACTAL_BASE+(idx)))
-#define PAGEDIR(idx)	PAGETABLE((MM_FRACTAL_BASE>>12)+((idx)&0x7FFFFFF))
-#define PAGEDIRPTR(idx)	PAGETABLE((MM_FRACTAL_BASE>>21)+((idx)&0x3FFFF))
-#define PAGEMAPLVL4(idx)	PAGETABLE((MM_FRACTAL_BASE>>30)+((idx)&0x1FF))
+#define PAGETABLE(idx)	(*((tPAddr*)MM_FRACTAL_BASE+((idx)&PAGE_MASK)))
+#define PAGEDIR(idx)	PAGETABLE((MM_FRACTAL_BASE>>12)+((idx)&TABLE_MASK))
+#define PAGEDIRPTR(idx)	PAGEDIR((MM_FRACTAL_BASE>>21)+((idx)&PDP_MASK))
+#define PAGEMAPLVL4(idx)	PAGEDIRPTR((MM_FRACTAL_BASE>>30)+((idx)&PML4_MASK))
+
+#define INVLPG(__addr)	__asm__ __volatile__ ("invlpg (%0)"::"r"(__addr));
+
+// === PROTOTYPES ===
+void	MM_InitVirt(void);
+void	MM_FinishVirtualInit(void);
+void	MM_PageFault(tVAddr Addr, Uint ErrorCode, tRegs *Regs);
+void	MM_DumpTables(tVAddr Start, tVAddr End);
+ int	MM_Map(tVAddr VAddr, tPAddr PAddr);
 
 // === GLOBALS ===
 
 // === CODE ===
 void MM_InitVirt(void)
 {
+}
+
+void MM_FinishVirtualInit(void)
+{
+}
+
+/**
+ * \brief Called on a page fault
+ */
+void MM_PageFault(tVAddr Addr, Uint ErrorCode, tRegs *Regs)
+{
+	// TODO: Copy on Write
+	#if 0
+	if( gaPageDir  [Addr>>22] & PF_PRESENT
+	 && gaPageTable[Addr>>12] & PF_PRESENT
+	 && gaPageTable[Addr>>12] & PF_COW )
+	{
+		tPAddr	paddr;
+		if(MM_GetRefCount( gaPageTable[Addr>>12] & ~0xFFF ) == 1)
+		{
+			gaPageTable[Addr>>12] &= ~PF_COW;
+			gaPageTable[Addr>>12] |= PF_PRESENT|PF_WRITE;
+		}
+		else
+		{
+			//Log("MM_PageFault: COW - MM_DuplicatePage(0x%x)", Addr);
+			paddr = MM_DuplicatePage( Addr );
+			MM_DerefPhys( gaPageTable[Addr>>12] & ~0xFFF );
+			gaPageTable[Addr>>12] &= PF_USER;
+			gaPageTable[Addr>>12] |= paddr|PF_PRESENT|PF_WRITE;
+		}
+		
+		INVLPG( Addr & ~0xFFF );
+		return;
+	}
+	#endif
+	
+	// If it was a user, tell the thread handler
+	if(ErrorCode & 4) {
+		Warning("%s %s %s memory%s",
+			(ErrorCode&4?"User":"Kernel"),
+			(ErrorCode&2?"write to":"read from"),
+			(ErrorCode&1?"bad/locked":"non-present"),
+			(ErrorCode&16?" (Instruction Fetch)":"")
+			);
+		Warning("User Pagefault: Instruction at %04x:%08x accessed %p",
+			Regs->CS, Regs->RIP, Addr);
+		__asm__ __volatile__ ("sti");	// Restart IRQs
+//		Threads_SegFault(Addr);
+		return ;
+	}
+	
+	// Kernel #PF
+	Debug_KernelPanic();
+	// -- Check Error Code --
+	if(ErrorCode & 8)
+		Warning("Reserved Bits Trashed!");
+	else
+	{
+		Warning("%s %s %s memory%s",
+			(ErrorCode&4?"User":"Kernel"),
+			(ErrorCode&2?"write to":"read from"),
+			(ErrorCode&1?"bad/locked":"non-present"),
+			(ErrorCode&16?" (Instruction Fetch)":"")
+			);
+	}
+	
+	Log("Code at %p accessed %p", Regs->RIP, Addr);
+	// Print Stack Backtrace
+//	Error_Backtrace(Regs->RIP, Regs->RBP);
+	
+	MM_DumpTables(0, -1);
+}
+
+/**
+ * \brief Dumps the layout of the page tables
+ */
+void MM_DumpTables(tVAddr Start, tVAddr End)
+{
+	const tPAddr	CHANGEABLE_BITS = 0xFF8;
+	const tPAddr	MASK = ~CHANGEABLE_BITS;	// Physical address and access bits
+	tVAddr	rangeStart = 0;
+	tPAddr	expected = CHANGEABLE_BITS;	// MASK is used because it's not a vaild value
+	tVAddr	curPos;
+	Uint	page;
+	
+	End &= (1L << 48) - 1;
+	
+	Start >>= 12;	End >>= 12;
+	
+	Log("Table Entries:");
+	for(page = Start, curPos = Start<<12;
+		page < End;
+		curPos += 0x1000, page++)
+	{
+		if( curPos == 0x800000000000L )
+			curPos = 0xFFFF800000000000L;
+		
+		// End of a range
+		if(
+			!(PAGEMAPLVL4(page>>27) & PF_PRESENT)
+		||	!(PAGEDIRPTR(page>>18) & PF_PRESENT)
+		||	!(PAGEDIR(page>>9) & PF_PRESENT)
+		||  !(PAGETABLE(page) & PF_PRESENT)
+		||  (PAGETABLE(page) & MASK) != expected)
+		{			
+			if(expected != CHANGEABLE_BITS) {
+				Log("%016x-0x%016x => %013x-%013x (%c%c%c%c)",
+					rangeStart, curPos - 1,
+					PAGETABLE(rangeStart>>12) & ~0xFFF,
+					(expected & ~0xFFF) - 1,
+					(expected & PF_PAGED ? 'p' : '-'),
+					(expected & PF_COW ? 'C' : '-'),
+					(expected & PF_USER ? 'U' : '-'),
+					(expected & PF_WRITE ? 'W' : '-')
+					);
+				expected = CHANGEABLE_BITS;
+			}
+			if( !(PAGEMAPLVL4(page>>27) & PF_PRESENT) ) {
+				page += (1 << 27) - 1;
+				curPos += (1L << 39) - 0x1000;
+				continue;
+			}
+			if( !(PAGEDIRPTR(page>>18) & PF_PRESENT) ) {
+				page += (1 << 18) - 1;
+				curPos += (1L << 30) - 0x1000;
+				continue;
+			}
+			if( !(PAGEDIR(page>>9) & PF_PRESENT) ) {
+				page += (1 << 9) - 1;
+				curPos += (1L << 21) - 0x1000;
+				continue;
+			}
+			if( !(PAGETABLE(page) & PF_PRESENT) )	continue;
+			
+			expected = (PAGETABLE(page) & MASK);
+			rangeStart = curPos;
+		}
+		if(expected != CHANGEABLE_BITS)
+			expected += 0x1000;
+	}
 	
+	if(expected != CHANGEABLE_BITS) {
+		Log("%016x-%016x => %013x-%013x (%s%s%s%s)",
+			rangeStart, curPos - 1,
+			PAGETABLE(rangeStart>>12) & ~0xFFF,
+			(expected & ~0xFFF) - 1,
+			(expected & PF_PAGED ? "p" : "-"),
+			(expected & PF_COW ? "C" : "-"),
+			(expected & PF_USER ? "U" : "-"),
+			(expected & PF_WRITE ? "W" : "-")
+			);
+		expected = 0;
+	}
 }
 
 /**
@@ -40,12 +209,20 @@ int MM_Map(tVAddr VAddr, tPAddr PAddr)
 {
 	tPAddr	tmp;
 	
+	Log("MM_Map: (VAddr=0x%x, PAddr=0x%x)", VAddr, PAddr);
+	
 	// Check PML4
+	//Log(" MM_Map: &PAGEMAPLVL4(%x) = %x", VAddr >> 39, &PAGEMAPLVL4(VAddr >> 39));
+	//Log(" MM_Map: &PAGEDIRPTR(%x) = %x", VAddr >> 30, &PAGEDIRPTR(VAddr >> 30));
+	//Log(" MM_Map: &PAGEDIR(%x) = %x", VAddr >> 21, &PAGEDIR(VAddr >> 21));
+	//Log(" MM_Map: &PAGETABLE(%x) = %x", VAddr >> 12, &PAGETABLE(VAddr >> 12));
+	//Log(" MM_Map: &PAGETABLE(0) = %x", &PAGETABLE(0));
 	if( !(PAGEMAPLVL4(VAddr >> 39) & 1) )
 	{
 		tmp = MM_AllocPhys();
 		if(!tmp)	return 0;
 		PAGEMAPLVL4(VAddr >> 39) = tmp | 3;
+		INVLPG( &PAGEDIRPTR( (VAddr>>39)<<9 ) );
 		memset( &PAGEDIRPTR( (VAddr>>39)<<9 ), 0, 4096 );
 	}
 	
@@ -55,7 +232,8 @@ int MM_Map(tVAddr VAddr, tPAddr PAddr)
 		tmp = MM_AllocPhys();
 		if(!tmp)	return 0;
 		PAGEDIRPTR(VAddr >> 30) = tmp | 3;
-		memset( &PAGEDIR( (VAddr>>30)<<9 ), 0, 4096 );
+		INVLPG( &PAGEDIR( (VAddr>>30)<<9 ) );
+		memset( &PAGEDIR( (VAddr>>30)<<9 ), 0, 0x1000 );
 	}
 	
 	// Check Page Dir
@@ -64,18 +242,25 @@ int MM_Map(tVAddr VAddr, tPAddr PAddr)
 		tmp = MM_AllocPhys();
 		if(!tmp)	return 0;
 		PAGEDIR(VAddr >> 21) = tmp | 3;
+		INVLPG( &PAGETABLE( (VAddr>>21)<<9 ) );
 		memset( &PAGETABLE( (VAddr>>21)<<9 ), 0, 4096 );
 	}
 	
 	// Check if this virtual address is already mapped
-	if( PAGETABLE(VAddr >> 12) & 1 )
+	if( PAGETABLE(VAddr >> PTAB_SHIFT) & 1 )
 		return 0;
 	
-	PAGETABLE(VAddr >> 12) = PAddr | 3;
+	PAGETABLE(VAddr >> PTAB_SHIFT) = PAddr | 3;
+	
+	INVLPG( VAddr );
+	Log("MM_Map: RETURN 1");
 	
 	return 1;
 }
 
+/**
+ * \brief Removed a mapped page
+ */
 void MM_Unmap(tVAddr VAddr)
 {
 	// Check PML4
@@ -85,7 +270,8 @@ void MM_Unmap(tVAddr VAddr)
 	// Check Page Dir
 	if( !(PAGEDIR(VAddr >> 21) & 1) )	return ;
 	
-	PAGETABLE(VAddr >> 12) = 0;
+	PAGETABLE(VAddr >> PTAB_SHIFT) = 0;
+	INVLPG( VAddr );
 }
 
 /**
@@ -95,15 +281,31 @@ tPAddr MM_Allocate(tVAddr VAddr)
 {
 	tPAddr	ret;
 	
+	ENTER("xVAddr", VAddr);
+	
+	if( !MM_Map(VAddr, 0) )	// Make sure things are allocated
+	{
+		Warning("MM_Allocate: Unable to map, tables did not initialise");
+		LEAVE('i', 0);
+		return 0;
+	}
+	
 	ret = MM_AllocPhys();
-	if(!ret)	return 0;
+	LOG("ret = %x", ret);
+	if(!ret) {
+		LEAVE('i', 0);
+		return 0;
+	}
 	
 	if( !MM_Map(VAddr, ret) )
 	{
+		Warning("MM_Allocate: Unable to map. Strange, we should have errored earlier");
 		MM_DerefPhys(ret);
+		LEAVE('i');
 		return 0;
 	}
 	
+	LEAVE('x', ret);
 	return ret;
 }
 
@@ -124,16 +326,21 @@ void MM_Deallocate(tVAddr VAddr)
  */
 tPAddr MM_GetPhysAddr(tVAddr Addr)
 {
+	Log("MM_GetPhysAddr: (Addr=0x%x)", Addr);
 	if( !(PAGEMAPLVL4(Addr >> 39) & 1) )
 		return 0;
+	Log(" MM_GetPhysAddr: PDP Valid");
 	if( !(PAGEDIRPTR(Addr >> 30) & 1) )
 		return 0;
+	Log(" MM_GetPhysAddr: PD Valid");
 	if( !(PAGEDIR(Addr >> 21) & 1) )
 		return 0;
-	if( !(PAGETABLE(Addr >> 12) & 1) )
+	Log(" MM_GetPhysAddr: PT Valid");
+	if( !(PAGETABLE(Addr >> PTAB_SHIFT) & 1) )
 		return 0;
+	Log(" MM_GetPhysAddr: Page Valid");
 	
-	return (PAGETABLE(Addr >> 12) & ~0xFFF) | (Addr & 0xFFF);
+	return (PAGETABLE(Addr >> PTAB_SHIFT) & ~0xFFF) | (Addr & 0xFFF);
 }
 
 /**
@@ -280,5 +487,68 @@ tPAddr MM_Clone(void)
 	// #2 Alter the fractal pointer
 	// #3 Set Copy-On-Write to all user pages
 	// #4 Return
+	return 0;
+}
+
+void MM_ClearUser(void)
+{
+	tVAddr	addr = 0;
+	// #1 Traverse the structure < 2^47, Deref'ing all pages
+	// #2 Free tables/dirs/pdps once they have been cleared
 	
+	for( addr = 0; addr < 0x800000000000; )
+	{
+		if( PAGEMAPLVL4(addr >> PML4_SHIFT) & 1 )
+		{
+			if( PAGEDIRPTR(addr >> PDP_SHIFT) & 1 )
+			{
+				if( PAGEDIR(addr >> PDIR_SHIFT) & 1 )
+				{
+					// Page
+					if( PAGETABLE(addr >> PTAB_SHIFT) & 1 ) {
+						MM_DerefPhys( PAGETABLE(addr >> PTAB_SHIFT) & PADDR_MASK );
+						PAGETABLE(addr >> PTAB_SHIFT) = 0;
+					}
+					addr += 1 << PTAB_SHIFT;
+					// Dereference the PDIR Entry
+					if( (addr + (1 << PTAB_SHIFT)) >> PDIR_SHIFT != (addr >> PDIR_SHIFT) ) {
+						MM_DerefPhys( PAGEMAPLVL4(addr >> PDIR_SHIFT) & PADDR_MASK );
+						PAGEDIR(addr >> PDIR_SHIFT) = 0;
+					}
+				}
+				else {
+					addr += 1 << PDIR_SHIFT;
+					continue;
+				}
+				// Dereference the PDP Entry
+				if( (addr + (1 << PDIR_SHIFT)) >> PDP_SHIFT != (addr >> PDP_SHIFT) ) {
+					MM_DerefPhys( PAGEMAPLVL4(addr >> PDP_SHIFT) & PADDR_MASK );
+					PAGEDIRPTR(addr >> PDP_SHIFT) = 0;
+				}
+			}
+			else {
+				addr += 1 << PDP_SHIFT;
+				continue;
+			}
+			// Dereference the PML4 Entry
+			if( (addr + (1 << PDP_SHIFT)) >> PML4_SHIFT != (addr >> PML4_SHIFT) ) {
+				MM_DerefPhys( PAGEMAPLVL4(addr >> PML4_SHIFT) & PADDR_MASK );
+				PAGEMAPLVL4(addr >> PML4_SHIFT) = 0;
+			}
+		}
+		else {
+			addr += (tVAddr)1 << PML4_SHIFT;
+			continue;
+		}
+	}
+}
+
+tVAddr MM_NewWorkerStack(void)
+{
+	return 0;
+}
+
+tVAddr MM_NewKStack(void)
+{
+	return 0;
 }