X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=Kernel%2Farch%2Fx86_64%2Fstart32.asm;h=6ee9262b8f7a10618baa955de69649f4ed99c9c7;hb=5255c9f07cb2e0e43cf283e256c964eaa7970c8e;hp=21e7c408bce8565dee492e1e6fe1b00369977ac2;hpb=1499c9eb8aa167dff5354a25c5a5bd2d00672a54;p=tpg%2Facess2.git

diff --git a/Kernel/arch/x86_64/start32.asm b/Kernel/arch/x86_64/start32.asm
index 21e7c408..6ee9262b 100644
--- a/Kernel/arch/x86_64/start32.asm
+++ b/Kernel/arch/x86_64/start32.asm
@@ -1,7 +1,8 @@
 
 [BITS 32]
 
-KERNEL_BASE	equ	0xFFFF800000000000
+;KERNEL_BASE	equ	0xFFFF800000000000
+KERNEL_BASE	equ	0xFFFFFFFF80000000
 
 [section .multiboot]
 mboot:
@@ -32,15 +33,24 @@ mboot:
 [section .text]
 [global start]
 start:
+	mov [gMultibootMagic - KERNEL_BASE], eax
+	mov [gMultibootPtr - KERNEL_BASE], ebx
+
 	; Check for Long Mode support
+	mov eax, 0x80000000
+	cpuid
+	cmp eax, 0x80000001	; Compare the A-register with 0x80000001.
 	mov eax, 0x80000001
 	cpuid
+	jb .not64bitCapable
 	test edx, 1<<29
 	jz .not64bitCapable
 
-	; Enable PAE
+	; Enable PGE (Page Global Enable)
+	; + PAE (Physical Address Extension)
+	; + PSE (Page Size Extensions)
 	mov eax, cr4
-	or eax, 0x80|0x20
+	or eax, 0x80|0x20|0x10
 	mov cr4, eax
 
 	; Load PDP4
@@ -60,13 +70,6 @@ start:
 
 	; Load GDT
 	lgdt [gGDTPtr - KERNEL_BASE]
-	mov ax, 0x10
-	mov ss, ax
-	mov ds, ax
-	mov es, ax
-	mov fs, ax
-	mov gs, ax
-
 	jmp 0x08:start64 - KERNEL_BASE
 
 .not64bitCapable:
@@ -86,34 +89,47 @@ start:
 
 [section .data]
 [global gGDT]
+[global gGDTPtr]
 gGDT:
 	dd	0,0
-	dd	0x00000000, 0x00209800	; 0x08: 64-bit Code
-	dd	0x00000000, 0x00009000	; 0x10: 64-bit Data
-	dd	0x00000000, 0x00209800	; 0x18: 64-bit User Code
-	dd	0x00000000, 0x00209000	; 0x20: 64-bit User Data
-	dd	0x00000000, 0x00209800	; 0x38: 32-bit User Code
-	dd	0x00000000, 0x00209000	; 0x30: 32-bit User Data
-	times MAX_CPUS	dd	0, 0, 0, 0	; 0x38+16*n: TSS 0
+	dd	0x00000000, 0x00209A00	; 0x08: 64-bit Code
+	dd	0x00000000, 0x00009200	; 0x10: 64-bit Data
+	dd	0x00000000, 0x0020FA00	; 0x18: 64-bit User Code
+	dd	0x00000000, 0x0000F200	; 0x20: 64-bit User Data
+	dd	0x00000000, 0x0040FA00	; 0x38: 32-bit User Code
+	dd	0x00000000, 0x0040F200	; 0x30: 32-bit User Data
+	times MAX_CPUS	dd	0, 0x00008900, 0, 0	; 0x38+16*n: TSS 0
 gGDTPtr:
 	dw	$-gGDT-1
 	dd	gGDT-KERNEL_BASE
 	dd	0
+[global gMultibootPtr]
+[global gMultibootMagic]
+gMultibootMagic:
+	dd	0
+gMultibootPtr:
+	dd	0
 
 [section .padata]
 [global gInitialPML4]
 gInitialPML4:	; Covers 256 TiB (Full 48-bit Virtual Address Space)
 	dd	gInitialPDP - KERNEL_BASE + 3, 0	; Identity Map Low 4Mb
-	times 256-1 dq	0
-	dd	gInitialPDP - KERNEL_BASE + 3, 0	; Map Low 4Mb to kernel base
-	times 256-1-2 dq 0
+	times 512-4-1 dq	0
 	dd	gInitialPML4 - KERNEL_BASE + 3, 0	; Fractal Mapping
 	dq	0
+	dq	0
+	dd	gHighPDP - KERNEL_BASE + 3, 0	; Map Low 4Mb to kernel base
 
 gInitialPDP:	; Covers 512 GiB
 	dd	gInitialPD - KERNEL_BASE + 3, 0
 	times 511	dq	0
 
+gHighPDP:	; Covers 512 GiB
+	times 510	dq	0
+	;dq	0 + 0x143	; 1 GiB Page from zero
+	dd	gInitialPD - KERNEL_BASE + 3, 0
+	dq	0
+
 gInitialPD:	; Covers 1 GiB
 	dd	gInitialPT1 - KERNEL_BASE + 3, 0
 	dd	gInitialPT2 - KERNEL_BASE + 3, 0
@@ -122,13 +138,13 @@ gInitialPD:	; Covers 1 GiB
 gInitialPT1:	; Covers 2 MiB
 	%assign i 0
 	%rep 512
-	dq	i*4096+3
+	dq	i*4096+0x103
 	%assign i i+1
 	%endrep
 gInitialPT2:	; 2 MiB
 	%assign i 512
 	%rep 512
-	dq	i*4096+3
+	dq	i*4096+0x103
 	%assign i i+1
 	%endrep