X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=KernelLand%2FKernel%2Finclude%2Fdrv_pci.h;h=bdc8c850073222ddb4474799b2800bc3bb1a786a;hb=5f4d39ad0059ceec48c59d5ed87457a6bcb1c5f1;hp=33c4a3ecfc41c6901416d5b4b00ebaaceb8f4a24;hpb=48743e39650eb1ef988380e9d95f27fd40d3a9ce;p=tpg%2Facess2.git

diff --git a/KernelLand/Kernel/include/drv_pci.h b/KernelLand/Kernel/include/drv_pci.h
index 33c4a3ec..bdc8c850 100644
--- a/KernelLand/Kernel/include/drv_pci.h
+++ b/KernelLand/Kernel/include/drv_pci.h
@@ -33,6 +33,29 @@ enum ePCIOverClasses
 	PCI_OC_SCSI = 0x010000
 };
 
+typedef enum ePCI_BARTypes	tPCI_BARType;
+
+enum ePCI_BARTypes
+{
+	PCI_BARTYPE_IO,
+	PCI_BARTYPE_MEM,	// Any memory type
+	PCI_BARTYPE_MEMP,	// Prefetchable memory
+	PCI_BARTYPE_MEMNP,	// Non-prefetchable memory
+	PCI_BARTYPE_MEM32,	// 32-bit memory
+	PCI_BARTYPE_MEM64	// 64-bit memory
+};
+
+#define PCI_CMD_IOENABLE	(1 << 0)
+#define PCI_CMD_MEMENABLE	(1 << 1)
+#define PCI_CMD_BUSMASTER	(1 << 2)	// Device can behave as a bus master
+#define PCI_CMD_SPECIALCYCLES	(1 << 3)	// Can monitor 'Special Cycle' operations
+#define PCI_CMD_WRAINVAL	(1 << 4)	// Memory 'Write and Invalidate' can be generated
+#define PCI_CMD_VGAPALSNOOP	(1 << 5)	// VGA Palette Snoop enabled
+#define PCI_CMD_PARITYERRRESP	(1 << 6)	// Pairity Error Response (suppress PERR# generation)
+#define PCI_CMD_SERRENABLE	(1 << 8)	// Enable SERR# Driver
+#define PCI_CMD_FASTBACKBACK	(1 << 9)	// Fast Back-Back Enable
+#define PCI_CMD_INTDISABLE	(1 <<10)	// Disable generation of INTx# signals
+
 typedef int	tPCIDev;
 
 /**
@@ -54,8 +77,11 @@ extern int	PCI_GetDeviceSubsys(tPCIDev id, Uint16 *SubsystemVendor, Uint16 *Subs
 extern Uint32	PCI_ConfigRead(tPCIDev id, int Offset, int Size);
 extern void	PCI_ConfigWrite(tPCIDev id, int Offset, int Size, Uint32 Value);
 
+extern Uint16	PCI_SetCommand(tPCIDev id, Uint16 SBits, Uint16 CBits);
 extern Uint8	PCI_GetIRQ(tPCIDev id);
 extern Uint32	PCI_GetBAR(tPCIDev id, int BAR);
+extern Uint64	PCI_GetValidBAR(tPCIDev id, int BAR, tPCI_BARType BARType);
 //extern Uint16	PCI_AssignPort(tPCIDev id, int bar, int count);
+//extern void*	PCI_MapMemBAR(tPCIDev id, int BAR, tPCI_BARType BARType, size_t* Size, tPAddr* PAddr);
 
 #endif