X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=KernelLand%2FModules%2FInterfaces%2FUDI%2Ftrans%2Fnsr.c;h=d9c4357565e8504ca1f5925f5667f2861f0ded36;hb=3e63a1d155d5324523188482f314c4eaae40d523;hp=2ea4506c42956261b1cdb3cbee259c561646c5f0;hpb=3fe3238f90216eeec97778e3ae91f462d27c60ac;p=tpg%2Facess2.git

diff --git a/KernelLand/Modules/Interfaces/UDI/trans/nsr.c b/KernelLand/Modules/Interfaces/UDI/trans/nsr.c
index 2ea4506c..d9c43575 100644
--- a/KernelLand/Modules/Interfaces/UDI/trans/nsr.c
+++ b/KernelLand/Modules/Interfaces/UDI/trans/nsr.c
@@ -14,6 +14,7 @@
 #include <workqueue.h>
 
 #define NUM_RX_BUFFERS	4
+#define NUM_TX_DESCS	4
 
 enum {
 	ACESSNSR_OPS_CTRL = 1,
@@ -26,23 +27,32 @@ enum {
 enum {
 	ACESSNSR_CB_CTRL = 1,
 	ACESSNSR_CB_RX,
-	ACESSNSR_CB_TX
+	ACESSNSR_CB_TX,
+	ACESSNSR_CB_STD,
 };
 
 // === TYPES ===
+typedef struct acessnsr_txdesc_s
+{
+	//udi_nic_tx_cb_t	cb;
+	tMutex	CompleteMutex;
+	 int	BufIdx;
+	tIPStackBuffer	*IPBuffer;
+} acessnsr_txdesc_t;
+
 typedef struct
 {
 	udi_init_context_t	init_context;	
 	udi_cb_t	*active_cb;
-
-	udi_index_t	init_idx;
-	udi_buf_t	*rx_buffers[NUM_RX_BUFFERS];
-	udi_nic_rx_cb_t	*rx_cbs[NUM_RX_BUFFERS];
+	udi_channel_t	saved_active_channel;
 
 	tWorkqueue	RXQueue;
 
 	tIPStack_AdapterType	AdapterType;
 	void	*ipstack_handle;
+
+	tWorkqueue	TXWorkQueue;
+	acessnsr_txdesc_t	TXDescs[NUM_TX_DESCS];
 	
 	udi_channel_t	rx_channel;
 	udi_channel_t	tx_channel;
@@ -58,8 +68,9 @@ void acessnsr_ctrl_channel_event_ind(udi_channel_event_cb_t *cb);
 void acessnsr_ctrl_ch_ev_ind__rx_channel_spawned(udi_cb_t *gcb, udi_channel_t channel);
 void acessnsr_ctrl_ch_ev_ind__tx_channel_spawned(udi_cb_t *gcb, udi_channel_t channel);
 void acessnsr_ctrl_bind_ack(udi_nic_bind_cb_t *cb, udi_status_t status);
-void acessnsr_ctrl_bind_ack__rx_buf_allocated(udi_cb_t *gcb, udi_buf_t *new_buf);
-void acessnsr_ctrl_bind_ack__rx_cb_allocated(udi_cb_t *gcb, udi_cb_t *new_cb);
+void acessnsr_ctrl_bind_ack__rx_cbs_allocated(udi_cb_t *gcb, udi_cb_t *first_new_cb);
+void acessnsr_ctrl_bind_ack__tx_cbs_allocated(udi_cb_t *gcb, udi_cb_t *first_new_cb);
+void acessnsr_ctrl_bind_ack__std_cb_allocated(udi_cb_t *gcb, udi_cb_t *new_cb);
 void acessnsr_ctrl_unbind_ack(udi_nic_cb_t *cb, udi_status_t status);
 void acessnsr_ctrl_enable_ack(udi_nic_cb_t *cb, udi_status_t status);
 void acessnsr_ctrl_disable_ack(udi_nic_cb_t *cb, udi_status_t status);
@@ -69,12 +80,14 @@ void acessnsr_ctrl_info_ack(udi_nic_info_cb_t *cb);
 // --- NSR TX
 void acessnsr_tx_channel_event_ind(udi_channel_event_cb_t *cb);
 void acessnsr_tx_rdy(udi_nic_tx_cb_t *cb);
+void acessnsr_tx_rdy__buffer_cleared(udi_cb_t *gcb, udi_buf_t *buf);
 // --- NSR RX
 void acessnsr_rx_channel_event_ind(udi_channel_event_cb_t *cb);
 void acessnsr_rx_ind(udi_nic_rx_cb_t *cb);
 void acessnsr_rx_exp_ind(udi_nic_rx_cb_t *cb);
 // --- Acess IPStack
  int	acessnsr_SendPacket(void *Card, tIPStackBuffer *Buffer);
+void	acessnsr_SendPacket__buf_write_complete(udi_cb_t *gcb, udi_buf_t *buf);
 tIPStackBuffer	*acessnsr_WaitForPacket(void *Card);
 
 // === CODE ===
@@ -87,6 +100,7 @@ void acessnsr_usage_ind(udi_usage_cb_t *cb, udi_ubit8_t resource_level)
 	}
 
 	Workqueue_Init(&rdata->RXQueue, "AcessNSR RX", offsetof(udi_nic_rx_cb_t, chain));
+	Workqueue_Init(&rdata->TXWorkQueue, "AcessNSR TX", offsetof(udi_nic_tx_cb_t, chain));
 
 	udi_usage_res(cb);
 }
@@ -146,61 +160,66 @@ void acessnsr_ctrl_bind_ack(udi_nic_bind_cb_t *cb, udi_status_t status)
 		break;
 	}
 
+	// - Register with IPStack
 	if(cb->capabilities & UDI_NIC_CAP_TX_IP_CKSUM)
 		rdata->AdapterType.Flags |= ADAPTERFLAG_OFFLOAD_IP4;
 	if(cb->capabilities & UDI_NIC_CAP_TX_TCP_CKSUM)
 		rdata->AdapterType.Flags |= ADAPTERFLAG_OFFLOAD_TCP;
 	if(cb->capabilities & UDI_NIC_CAP_TX_UDP_CKSUM)
 		rdata->AdapterType.Flags |= ADAPTERFLAG_OFFLOAD_UDP;
-	
 	rdata->AdapterType.Name = "udi";
 	rdata->AdapterType.SendPacket = acessnsr_SendPacket;
 	rdata->AdapterType.WaitForPacket = acessnsr_WaitForPacket;
-
 	rdata->ipstack_handle = IPStack_Adapter_Add(&rdata->AdapterType, rdata, cb->mac_addr);
 
 	// Allocate RX CBs and buffers
-	rdata->init_idx = -1;
-	acessnsr_ctrl_bind_ack__rx_buf_allocated(rdata->active_cb, NULL);
+	// EVIL: Save and change channel of event CB
+	rdata->saved_active_channel = rdata->active_cb->channel;
+	rdata->active_cb->channel = rdata->rx_channel;
+	udi_cb_alloc_batch( acessnsr_ctrl_bind_ack__rx_cbs_allocated, rdata->active_cb,
+		ACESSNSR_CB_RX, NUM_RX_BUFFERS, TRUE, 0, NULL);
 	// V V V V
 }
-void acessnsr_ctrl_bind_ack__rx_buf_allocated(udi_cb_t *gcb, udi_buf_t *new_buf)
+void acessnsr_ctrl_bind_ack__rx_cbs_allocated(udi_cb_t *gcb, udi_cb_t *first_new_cb)
 {
 	acessnsr_rdata_t *rdata = gcb->context;
-	if( rdata->init_idx != (udi_index_t)-1 )
-	{
-		rdata->rx_buffers[rdata->init_idx] = new_buf;
-	}
-	rdata->init_idx ++;
-	if( rdata->init_idx < NUM_RX_BUFFERS )
-	{
-		UDI_BUF_ALLOC(acessnsr_ctrl_bind_ack__rx_buf_allocated, gcb, NULL, 0, NULL);
-		// A A A A
-		return ;
-	}
+	// Send of the entire list
+	ASSERT(first_new_cb);
+	udi_nd_rx_rdy( UDI_MCB(first_new_cb, udi_nic_rx_cb_t) );
 	
-	rdata->init_idx = -1;
-	acessnsr_ctrl_bind_ack__rx_cb_allocated(gcb, NULL);
+	// Allocate batch (no buffers)
+	gcb->channel = rdata->tx_channel;
+	udi_cb_alloc_batch( acessnsr_ctrl_bind_ack__tx_cbs_allocated, gcb,
+		ACESSNSR_CB_TX, NUM_TX_DESCS, FALSE, 0, NULL);
+	// V V V V
 }
-void acessnsr_ctrl_bind_ack__rx_cb_allocated(udi_cb_t *gcb, udi_cb_t *new_cb)
+void acessnsr_ctrl_bind_ack__tx_cbs_allocated(udi_cb_t *gcb, udi_cb_t *first_new_cb)
 {
 	acessnsr_rdata_t *rdata = gcb->context;
-	if( rdata->init_idx != (udi_index_t)-1 )
-	{
-		udi_nic_rx_cb_t	*cb = UDI_MCB(new_cb, udi_nic_rx_cb_t);
-		rdata->rx_cbs[rdata->init_idx] = cb;
-		cb->rx_buf = rdata->rx_buffers[rdata->init_idx];
-		udi_nd_rx_rdy(cb);
-	}
-	rdata->init_idx ++;
-	if( rdata->init_idx < NUM_RX_BUFFERS )
+	ASSERT(first_new_cb);
+	
 	{
-		udi_cb_alloc(acessnsr_ctrl_bind_ack__rx_cb_allocated, gcb, ACESSNSR_CB_RX, rdata->rx_channel);
-		// A A A A
-		return ;
+		udi_nic_tx_cb_t	*cb, *next_cb;
+		cb = UDI_MCB(first_new_cb, udi_nic_tx_cb_t);
+		ASSERT(cb);
+		do {
+			next_cb = cb->chain;
+			cb->chain = NULL;
+			Workqueue_AddWork( &rdata->TXWorkQueue, cb );
+		} while(next_cb);
 	}
-	udi_channel_event_complete( UDI_MCB(rdata->active_cb,udi_channel_event_cb_t), UDI_OK );
-	// = = = =
+	
+	// Allocate standard control CB (for enable/disable)
+	udi_cb_alloc(acessnsr_ctrl_bind_ack__std_cb_allocated, gcb,
+		ACESSNSR_CB_STD, rdata->saved_active_channel);
+	// V V V V
+}
+void acessnsr_ctrl_bind_ack__std_cb_allocated(udi_cb_t *gcb, udi_cb_t *new_cb)
+{
+	// Final Operations:
+	// - Enable card (RX won't happen until this is called)
+	udi_nd_enable_req( UDI_MCB(new_cb, udi_nic_cb_t) );
+	// Continued in acessnsr_ctrl_enable_ack
 }
 void acessnsr_ctrl_unbind_ack(udi_nic_cb_t *cb, udi_status_t status)
 {
@@ -208,7 +227,12 @@ void acessnsr_ctrl_unbind_ack(udi_nic_cb_t *cb, udi_status_t status)
 }
 void acessnsr_ctrl_enable_ack(udi_nic_cb_t *cb, udi_status_t status)
 {
-	UNIMPLEMENTED();
+	udi_cb_t	*gcb = UDI_GCB(cb);
+	acessnsr_rdata_t *rdata = gcb->context;
+	
+	rdata->active_cb->channel = rdata->saved_active_channel;
+	udi_channel_event_complete( UDI_MCB(rdata->active_cb,udi_channel_event_cb_t), UDI_OK );
+	// = = = =
 }
 void acessnsr_ctrl_disable_ack(udi_nic_cb_t *cb, udi_status_t status)
 {
@@ -233,7 +257,16 @@ void acessnsr_tx_channel_event_ind(udi_channel_event_cb_t *cb)
 }
 void acessnsr_tx_rdy(udi_nic_tx_cb_t *cb)
 {
-	UNIMPLEMENTED();
+	//acessnsr_txdesc_t *tx = UDI_GCB(cb)->context;
+	// TODO: Can errors be detected here?
+	UDI_BUF_DELETE(acessnsr_tx_rdy__buffer_cleared, UDI_GCB(cb), cb->tx_buf->buf_size, cb->tx_buf, 0);
+}
+void acessnsr_tx_rdy__buffer_cleared(udi_cb_t *gcb, udi_buf_t *buf)
+{
+	acessnsr_txdesc_t *tx = gcb->scratch;
+	udi_nic_tx_cb_t *cb = UDI_MCB(gcb, udi_nic_tx_cb_t);
+	cb->tx_buf = buf;
+	Mutex_Release(&tx->CompleteMutex);	// triggers acessnsr_SendPacket
 }
 // --- NSR RX
 void acessnsr_rx_channel_event_ind(udi_channel_event_cb_t *cb)
@@ -251,15 +284,56 @@ void acessnsr_rx_ind(udi_nic_rx_cb_t *cb)
 }
 void acessnsr_rx_exp_ind(udi_nic_rx_cb_t *cb)
 {
-	UNIMPLEMENTED();
+	acessnsr_rx_ind(cb);
+	//UNIMPLEMENTED();
 }
 // --- Acess IPStack
 int acessnsr_SendPacket(void *Card, tIPStackBuffer *Buffer)
 {
-	UNIMPLEMENTED();
-	return 1;
+	acessnsr_rdata_t *rdata = Card;
+	LOG("Card=%p,Buffer=%p", Card, Buffer);
+	udi_nic_tx_cb_t	*cb = Workqueue_GetWork(&rdata->TXWorkQueue);
+	ASSERT(cb);
+	acessnsr_txdesc_t *tx = UDI_GCB(cb)->scratch;
+	ASSERT(tx);
+
+	LOG("Mutex acquire #1 %p", cb);
+	Mutex_Acquire(&tx->CompleteMutex);
+	tx->IPBuffer = Buffer;
+	tx->BufIdx = -1;
+	acessnsr_SendPacket__buf_write_complete(UDI_GCB(cb), NULL);
+
+	// Double lock is resolved once TX is complete
+	Mutex_Acquire(&tx->CompleteMutex);
+	Mutex_Release(&tx->CompleteMutex);
+	// TODO: TX status
+	
+	LOG("Release %p", cb);	
+	Workqueue_AddWork(&rdata->TXWorkQueue, cb);
+	return 0;
+}
+void acessnsr_SendPacket__buf_write_complete(udi_cb_t *gcb, udi_buf_t *buf)
+{
+	acessnsr_txdesc_t *tx = gcb->scratch;
+	udi_nic_tx_cb_t	*cb = UDI_MCB(gcb, udi_nic_tx_cb_t);
+	if( tx->BufIdx >= 0 ) {
+		cb->tx_buf = buf;
+	}
+	size_t	buflen;
+	const void	*bufptr;
+	if( (tx->BufIdx = IPStack_Buffer_GetBuffer(tx->IPBuffer, tx->BufIdx, &buflen, &bufptr )) != -1 )
+	{
+		Debug_HexDump("NSR", bufptr, buflen);
+		udi_buf_write(acessnsr_SendPacket__buf_write_complete, gcb,
+			bufptr, buflen, cb->tx_buf, (cb->tx_buf ? cb->tx_buf->buf_size : 0), 0, NULL);
+		// A A A A
+		return ;
+	}
+	
+	udi_nd_tx_req(cb);
+	// continued in acessnsr_tx_rdy
 }
-void _FreeHeapSubBuf(void *Arg, size_t Pre, size_t Post, const void *DataBuf)
+static void _FreeHeapSubBuf(void *Arg, size_t Pre, size_t Post, const void *DataBuf)
 {
 	free(Arg);
 }
@@ -271,6 +345,7 @@ tIPStackBuffer *acessnsr_WaitForPacket(void *Card)
 	tIPStackBuffer	*ret = IPStack_Buffer_CreateBuffer(1);
 	void	*data = malloc( cb->rx_buf->buf_size );
 	udi_buf_read(cb->rx_buf, 0, cb->rx_buf->buf_size, data);
+	Debug_HexDump("NSR WaitForPacket", data, cb->rx_buf->buf_size);
 	IPStack_Buffer_AppendSubBuffer(ret, cb->rx_buf->buf_size, 0, data, _FreeHeapSubBuf, data);
 
 	udi_nd_rx_rdy(cb);
@@ -338,7 +413,8 @@ udi_ops_init_t	acessnsr_ops_list[] = {
 udi_cb_init_t	acessnsr_cb_init_list[] = {
 	{ACESSNSR_CB_CTRL, ACESSNSR_META_NIC, UDI_NIC_BIND_CB_NUM, 0, 0,NULL},
 	{ACESSNSR_CB_RX, ACESSNSR_META_NIC, UDI_NIC_RX_CB_NUM, 0, 0,NULL},
-	{ACESSNSR_CB_TX, ACESSNSR_META_NIC, UDI_NIC_TX_CB_NUM, 0, 0,NULL},
+	{ACESSNSR_CB_TX, ACESSNSR_META_NIC, UDI_NIC_TX_CB_NUM, sizeof(acessnsr_txdesc_t), 0,NULL},
+	{ACESSNSR_CB_STD, ACESSNSR_META_NIC, UDI_NIC_TX_CB_NUM, 0, 0,NULL},
 	{0}
 };
 const udi_init_t	acessnsr_init = {