X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=KernelLand%2FModules%2FNetwork%2FE1000%2Fe1000.c;h=404540aa17ccad191ec44f8bd2194c25d3fa2987;hb=13f6e43bd202691b72e1d17806d575d1935c6f13;hp=66c1c8632b931ce6779bf7845fa59c63a39caf0b;hpb=910b87da7338937ace686848fb915908df0bf09b;p=tpg%2Facess2.git

diff --git a/KernelLand/Modules/Network/E1000/e1000.c b/KernelLand/Modules/Network/E1000/e1000.c
index 66c1c863..404540aa 100644
--- a/KernelLand/Modules/Network/E1000/e1000.c
+++ b/KernelLand/Modules/Network/E1000/e1000.c
@@ -5,7 +5,7 @@
  * e1000.c
  * - Intel 8254x Network Card Driver (core)
  */
-#define DEBUG	1
+#define DEBUG	0
 #define	VERSION	VER2(0,1)
 #include <acess.h>
 #include "e1000.h"
@@ -75,28 +75,16 @@ int E1000_Install(char **Arguments)
 		for( int id = -1, i = 0; (id = PCI_GetDevice(cardtype->Vendor, cardtype->Device, i)) != -1; i ++ )
 		{
 			tCard	*card = &gaE1000_Cards[card_idx++];
-			Uint32	mmiobase = PCI_GetBAR(id, 0);
-			if( mmiobase & (1|8) ) {
+			card->MMIOBasePhys = PCI_GetValidBAR(id, 0, PCI_BARTYPE_MEMNP);
+			if( !card->MMIOBasePhys ) {
 				Log_Warning("E1000", "Dev %i: BAR0 should be non-prefetchable memory", id);
 				continue;
 			}
-			const int addrsize = (mmiobase>>1) & 3;
-			if( addrsize == 0 ) {
-				// Standard 32-bit
-				card->MMIOBasePhys = mmiobase & ~0xF;
-			}
-			else if( addrsize == 2 ) {
-				// 64-bit
-				card->MMIOBasePhys = (mmiobase & ~0xF) | ((Uint64)PCI_GetBAR(id, 1)<<32);
-			}
-			else {
-				Log_Warning("E1000", "Dev %i: Unknown memory address size %i", id, (mmiobase>>1)&3);
-				continue;
-			}
 
 			card->IRQ = PCI_GetIRQ(id);
 			IRQ_AddHandler(card->IRQ, E1000_IRQHandler, card);
-
+			PCI_SetCommand(id, PCI_CMD_MEMENABLE|PCI_CMD_BUSMASTER, 0);
+		
 			Log_Debug("E1000", "Card %i: %P IRQ %i", card_idx, card->MMIOBasePhys, card->IRQ);
 
 			if( E1000_int_InitialiseCard(card) ) {
@@ -118,8 +106,11 @@ void E1000_int_ReleaseRXD(void *Arg, size_t HeadLen, size_t FootLen, const void
 {
 	tCard	**cardptr = Arg;
 	tCard	*Card = *cardptr;
-	 int	rxd = (Arg - (void*)Card->RXDescs) / sizeof(tRXDesc);
-	
+	 int	rxd = (Arg - (void*)Card->RXBackHandles) / sizeof(void*);
+
+	LOG("RXD %p %i being released", Card, rxd);
+	ASSERT(rxd >= 0 && rxd < NUM_RX_DESC);
+
 	Card->RXDescs[rxd].Status = 0;
 	Mutex_Acquire(&Card->lRXDescs);
 	if( rxd == REG32(Card, REG_RDT) ) {
@@ -242,11 +233,8 @@ int E1000_SendPacket(void *Ptr, tIPStackBuffer *Buffer)
 	Card->TXDescs[last_txd].CMD |= TXD_CMD_EOP|TXD_CMD_IDE|TXD_CMD_IFCS;
 	Card->TXSrcBuffers[last_txd] = Buffer;
 
-	// Trigger TX
-	IPStack_Buffer_LockBuffer(Buffer);
-	LOG("Triggering TX - Buffers[%i]=%p", last_txd, Buffer);
-	REG32(Card, REG_TDT) = Card->FirstFreeTXD;
-	Mutex_Release(&Card->lTXDescs);
+	__sync_synchronize();
+	#if DEBUG
 	{
 		volatile tTXDesc *txdp = Card->TXDescs + last_txd;
 		LOG("%p %P: %llx %x %x", txdp, MM_GetPhysAddr((void*)txdp), txdp->Buffer, txdp->Length, txdp->CMD);
@@ -255,6 +243,12 @@ int E1000_SendPacket(void *Ptr, tIPStackBuffer *Buffer)
 		LOG("%p %P: %llx %x %x", txdp, MM_GetPhysAddr((void*)txdp), txdp->Buffer, txdp->Length, txdp->CMD);
 		MM_FreeTemp( (void*)txdp_base);
 	}
+	#endif
+	// Trigger TX
+	IPStack_Buffer_LockBuffer(Buffer);
+	LOG("Triggering TX - Buffers[%i]=%p", last_txd, Buffer);
+	REG32(Card, REG_TDT) = Card->FirstFreeTXD;
+	Mutex_Release(&Card->lTXDescs);
 	LOG("Waiting for TX to complete");
 	
 	// Wait for completion (lock will block, then release straight away)
@@ -383,7 +377,7 @@ int DrvUtil_AllocBuffers(void **Buffers, int NumBufs, int PhysBits, size_t BufSi
 		size_t	ofs = 0;
 		const int 	bufs_per_page = PAGE_SIZE / BufSize;
 		ASSERT(bufs_per_page * BufSize == PAGE_SIZE);
-		void	*page;
+		void	*page = NULL;
 		for( int i = 0; i < NumBufs; i ++ )
 		{
 			if( ofs == 0 ) {