X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=KernelLand%2FModules%2FUSB%2FEHCI%2Fehci.c;h=c970eb49208b56ffc0dadd0a62a6aa19dc383cfc;hb=bc164a02c6f5f9fdcc66bd66d2d6a02dcfff8bec;hp=1f73cf6f070274466c27a53401ed6536724bccc9;hpb=86102de82180e8e3eac12475f065cec5928640dd;p=tpg%2Facess2.git diff --git a/KernelLand/Modules/USB/EHCI/ehci.c b/KernelLand/Modules/USB/EHCI/ehci.c index 1f73cf6f..c970eb49 100644 --- a/KernelLand/Modules/USB/EHCI/ehci.c +++ b/KernelLand/Modules/USB/EHCI/ehci.c @@ -47,7 +47,7 @@ void EHCI_RootHub_ClearPortFeature(void *Ptr, int Port, int Feat); // --- Internals --- tEHCI_qTD *EHCI_int_AllocateTD(tEHCI_Controller *Cont, int PID, void *Data, size_t Length, tUSBHostCb Cb, void *CbData); void EHCI_int_DeallocateTD(tEHCI_Controller *Cont, tEHCI_qTD *TD); -void EHCI_int_AppendTD(tEHCI_QH *QH, tEHCI_qTD *TD); +void EHCI_int_AppendTD(tEHCI_Controller *Cont, tEHCI_QH *QH, tEHCI_qTD *TD); tEHCI_QH *EHCI_int_AllocateQH(tEHCI_Controller *Cont, int Endpoint, size_t MaxPacketSize); void EHCI_int_DeallocateQH(tEHCI_Controller *Cont, tEHCI_QH *QH); void EHCI_int_InterruptThread(void *ControllerPtr); @@ -79,11 +79,16 @@ int EHCI_Initialise(char **Arguments) { Uint32 addr = PCI_GetBAR(id, 0); if( addr == 0 ) { - // Oops, PCI BIOS emulation time + // TODO: PCI BIOS emulation time } + if( addr & 1 ) { + // TODO: Error + continue ; + } + addr &= ~0xF; Uint8 irq = PCI_GetIRQ(id); if( irq == 0 ) { - // TODO: The same + // TODO: Error? } Log_Log("ECHI", "Controller at PCI %i 0x%x IRQ 0x%x", @@ -94,9 +99,32 @@ int EHCI_Initialise(char **Arguments) // TODO: Detect other forms of failure than "out of slots" break ; } + } - // TODO: Register with the USB stack + for( int i = 0; Arguments && Arguments[i]; i ++ ) + { + char *pos = Arguments[i], *next; + LOG("pos = '%s'", pos); + tPAddr base = strtoull(pos, &next, 16); + if( base == 0 ) + continue; + pos = next; + LOG("pos = '%s'", pos); + if( *pos++ != '-' ) + continue; + LOG("pos = '%s'", pos); + int irq = strtol(pos, &next, 16); + if( irq == 0 ) + continue ; + if( *next != 0 ) + continue; + LOG("base=%x, irq=%i", base, irq); + if( EHCI_InitController(base, irq) ) + { + continue ; + } } + return 0; } @@ -127,16 +155,24 @@ int EHCI_InitController(tPAddr BaseAddress, Uint8 InterruptNum) // - Nuke a couple of fields so error handling code doesn't derp cont->CapRegs = NULL; cont->PeriodicQueue = NULL; + cont->TDPool = NULL; // -- Build up structure -- - cont->CapRegs = (void*)MM_MapHWPages(BaseAddress, 1); + cont->CapRegs = (void*)( MM_MapHWPages(BaseAddress, 1) + (BaseAddress % PAGE_SIZE) ); if( !cont->CapRegs ) { Log_Warning("EHCI", "Can't map 1 page at %P into kernel space", BaseAddress); goto _error; } // TODO: Error check if( (cont->CapRegs->CapLength & 3) ) { - Log_Warning("EHCI", "Controller at %P non-aligned op regs", BaseAddress); + Log_Warning("EHCI", "Controller at %P non-aligned op regs (%x)", + BaseAddress, cont->CapRegs->CapLength); + goto _error; + } + if( BaseAddress % PAGE_SIZE + cont->CapRegs->CapLength + sizeof(tEHCI_CapRegs) > PAGE_SIZE ) { + Log_Warning("EHCI", "%P: Cap regs over page boundary (+0x%x bytes)", + BaseAddress % PAGE_SIZE + cont->CapRegs->CapLength + sizeof(tEHCI_CapRegs) + ); goto _error; } cont->OpRegs = (void*)( (Uint32*)cont->CapRegs + cont->CapRegs->CapLength / 4 ); @@ -147,13 +183,24 @@ int EHCI_InitController(tPAddr BaseAddress, Uint8 InterruptNum) Log_Warning("ECHI", "Can't allocate 1 32-bit page for periodic queue"); goto _error; } + for( int i = 0; i < 1024; i ++ ) + cont->PeriodicQueue[i] = 1; // TODO: Error check // > Populate queue + // - Allocate TD pool + cont->TDPool = (void*)MM_AllocDMA(1, 32, &unused); + if( !cont->TDPool ) { + Log_Warning("ECHI", "Can't allocate 1 32-bit page for qTD pool"); + goto _error; + } + for( int i = 0; i < TD_POOL_SIZE; i ++ ) { + cont->TDPool[i].Token = 3 << 8; + } + // Get port count cont->nPorts = cont->CapRegs->HCSParams & 0xF; - // -- Bind IRQ -- IRQ_AddHandler(InterruptNum, EHCI_InterruptHandler, cont); cont->InterruptThread = Proc_SpawnWorker(EHCI_int_InterruptThread, cont); @@ -176,6 +223,11 @@ int EHCI_InitController(tPAddr BaseAddress, Uint8 InterruptNum) // - Route all ports cont->OpRegs->ConfigFlag = 1; + cont->DeadTD = EHCI_int_AllocateTD(cont, 0, NULL, 0, NULL, NULL); + cont->DeadTD->Link = 1; + cont->DeadTD->Link2 = 1; + cont->DeadTD->Token = 0; + // -- Register with USB Core -- cont->RootHub = USB_RegisterHost(&gEHCI_HostDef, cont, cont->nPorts); @@ -186,6 +238,8 @@ _error: MM_Deallocate( (tVAddr)cont->CapRegs ); if( cont->PeriodicQueue ) MM_Deallocate( (tVAddr)cont->PeriodicQueue ); + if( cont->TDPool ) + MM_Deallocate( (tVAddr)cont->TDPool ); return 2; } @@ -249,6 +303,8 @@ void *EHCI_InitInterrupt(void *Ptr, int Endpoint, int bOutbound, int Period, if( Period > 256 ) Period = 256; + LOG("Endpoint=%x, bOutbound=%i, Period=%i, Length=%i", Endpoint, bOutbound, Period, Length); + // Round the period to the closest power of two pow2period = 1; period_pow = 0; @@ -292,7 +348,7 @@ void *EHCI_InitInterrupt(void *Ptr, int Endpoint, int bOutbound, int Period, // Allocate TD for the data tEHCI_qTD *td = EHCI_int_AllocateTD(Cont, (bOutbound ? PID_OUT : PID_IN), Buf, Length, Cb, CbData); - EHCI_int_AppendTD(qh, td); + EHCI_int_AppendTD(Cont, qh, td); // Insert into the periodic list for( int i = 0; i < PERIODIC_SIZE; i += Period ) @@ -354,14 +410,19 @@ void *EHCI_InitControl(void *Ptr, int Endpoint, size_t MaxPacketSize) // Allocate a QH tEHCI_QH *qh = EHCI_int_AllocateQH(Cont, Endpoint, MaxPacketSize); + qh->CurrentTD = MM_GetPhysAddr(Cont->DeadTD); // Append to async list if( Cont->LastAsyncHead ) { Cont->LastAsyncHead->HLink = MM_GetPhysAddr(qh)|2; Cont->LastAsyncHead->Impl.Next = qh; + LOG("- Placed after %p", Cont->LastAsyncHead); } - else + else { Cont->OpRegs->AsyncListAddr = MM_GetPhysAddr(qh)|2; + } + qh->HLink = Cont->OpRegs->AsyncListAddr; + Cont->OpRegs->USBCmd |= USBCMD_AsyncEnable; Cont->LastAsyncHead = qh; LOG("Created %p for %p Ep 0x%x - %i bytes MPS", qh, Ptr, Endpoint, MaxPacketSize); @@ -409,6 +470,8 @@ void *EHCI_SendControl(void *Ptr, void *Dest, tUSBHostCb Cb, void *CbData, if( (tVAddr)Dest <= 256*16 ) return NULL; + LOG("Dest=%p, isOutbound=%i, Lengths(Setup:%i,Out:%i,In:%i)", Dest, isOutbound, SetupLength, OutLength, InLength); + // Check size of SETUP and status // Allocate TDs @@ -422,13 +485,21 @@ void *EHCI_SendControl(void *Ptr, void *Dest, tUSBHostCb Cb, void *CbData, { td_data = InData ? EHCI_int_AllocateTD(Cont, PID_IN, InData, InLength, NULL, NULL) : NULL; td_status = EHCI_int_AllocateTD(Cont, PID_OUT, (void*)OutData, OutLength, Cb, CbData); + td_status->Token |= (1 << 15); // IOC } // Append TDs - EHCI_int_AppendTD(Dest, td_setup); - if( td_data ) - EHCI_int_AppendTD(Dest, td_data); - EHCI_int_AppendTD(Dest, td_status); + if( td_data ) { + td_setup->Link = MM_GetPhysAddr(td_data); + td_data->Link = MM_GetPhysAddr(td_status) | 1; + td_data->Token |= (1 << 8); // Active + } + else { + td_setup->Link = MM_GetPhysAddr(td_status) | 1; + } + td_setup->Token |= (1 << 8); // Active + td_status->Token |= (1 << 8); + EHCI_int_AppendTD(Cont, Dest, td_setup); return td_status; } @@ -444,7 +515,7 @@ void *EHCI_SendBulk(void *Ptr, void *Dest, tUSBHostCb Cb, void *CbData, int Dir, // Allocate single TD tEHCI_qTD *td = EHCI_int_AllocateTD(Cont, (Dir ? PID_OUT : PID_IN), Data, Length, Cb, CbData); - EHCI_int_AppendTD(Dest, td); + EHCI_int_AppendTD(Cont, Dest, td); return td; } @@ -495,9 +566,32 @@ int EHCI_RootHub_GetPortStatus(void *Ptr, int Port, int Flag) // -------------------------------------------------------------------- // Internals // -------------------------------------------------------------------- +tEHCI_qTD *EHCI_int_GetTDFromPhys(tEHCI_Controller *Cont, Uint32 Addr) +{ + if( Addr == 0 ) return NULL; + LOG("%p + (%x - %x)", Cont->TDPool, Addr, MM_GetPhysAddr(Cont->TDPool)); + return Cont->TDPool + (Addr - MM_GetPhysAddr(Cont->TDPool))/sizeof(tEHCI_qTD); +} + tEHCI_qTD *EHCI_int_AllocateTD(tEHCI_Controller *Cont, int PID, void *Data, size_t Length, tUSBHostCb Cb, void *CbData) { - UNIMPLEMENTED(); +// Semaphore_Wait(&Cont->TDSemaphore, 1); + Mutex_Acquire(&Cont->TDPoolMutex); + for( int i = 0; i < TD_POOL_SIZE; i ++ ) + { + if( ((Cont->TDPool[i].Token >> 8) & 3) != 3 ) + continue ; + Cont->TDPool[i].Token = (PID << 8) | (Length << 16); + // NOTE: Assumes that `Length` is <= PAGE_SIZE + Cont->TDPool[i].Pages[0] = MM_GetPhysAddr(Data); + if( (Cont->TDPool[i].Pages[0] & (PAGE_SIZE-1)) + Length - 1 > PAGE_SIZE ) + Cont->TDPool[i].Pages[1] = MM_GetPhysAddr((char*)Data + Length - 1) & ~(PAGE_SIZE-1); + Mutex_Release(&Cont->TDPoolMutex); + LOG("Allocated %p for PID %i on %p", &Cont->TDPool[i], PID, Cont); + return &Cont->TDPool[i]; + } + + Mutex_Release(&Cont->TDPoolMutex); return NULL; } @@ -506,20 +600,60 @@ void EHCI_int_DeallocateTD(tEHCI_Controller *Cont, tEHCI_qTD *TD) UNIMPLEMENTED(); } -void EHCI_int_AppendTD(tEHCI_QH *QH, tEHCI_qTD *TD) +void EHCI_int_AppendTD(tEHCI_Controller *Cont, tEHCI_QH *QH, tEHCI_qTD *TD) { - UNIMPLEMENTED(); + tEHCI_qTD *ptd = NULL; + Uint32 link = QH->CurrentTD; + + // TODO: Need locking and validation here + while( link && !(link & 1) ) + { + ptd = EHCI_int_GetTDFromPhys(Cont, link); + link = ptd->Link; + } + // TODO: Figure out how to follow this properly + if( !ptd ) { + QH->CurrentTD = MM_GetPhysAddr(TD); + LOG("Appended %p to beginning of %p", TD, QH); + } + else { + ptd->Link = MM_GetPhysAddr(TD); + LOG("Appended %p to end of %p", TD, QH); + } } tEHCI_QH *EHCI_int_AllocateQH(tEHCI_Controller *Cont, int Endpoint, size_t MaxPacketSize) { - UNIMPLEMENTED(); + tEHCI_QH *ret; + Mutex_Acquire(&Cont->QHPoolMutex); + for( int i = 0; i < QH_POOL_SIZE; i ++ ) + { + if( !MM_GetPhysAddr( Cont->QHPools[i/QH_POOL_NPERPAGE] ) ) { + tPAddr tmp; + Cont->QHPools[i/QH_POOL_NPERPAGE] = (void*)MM_AllocDMA(1, 32, &tmp); + memset(Cont->QHPools[i/QH_POOL_NPERPAGE], 0, PAGE_SIZE); + } + + ret = &Cont->QHPools[i/QH_POOL_NPERPAGE][i%QH_POOL_NPERPAGE]; + if( ret->HLink == 0 ) { + ret->HLink = 1; + ret->Overlay.Link = 1; + ret->Endpoint = (Endpoint >> 4) | 0x80 | ((Endpoint & 0xF) << 8) + | (MaxPacketSize << 16); + // TODO: Endpoint speed (13:12) 0:Full, 1:Low, 2:High + // TODO: Control Endpoint Flag (27) 0:*, 1:Full/Low Control + Mutex_Release(&Cont->QHPoolMutex); + return ret; + } + } + Mutex_Release(&Cont->QHPoolMutex); return NULL; } void EHCI_int_DeallocateQH(tEHCI_Controller *Cont, tEHCI_QH *QH) { - UNIMPLEMENTED(); + // TODO: Ensure it's unused (somehow) + QH->HLink = 0; } void EHCI_int_HandlePortConnectChange(tEHCI_Controller *Cont, int Port)