X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=KernelLand%2FModules%2FUSB%2FUHCI%2Fuhci.h;h=fbbeba32b1dca62894285e21494e183750147b54;hb=c5680ddd7aa4934759203aac95f14ac40e5c456b;hp=a93459a96d791e6e6779f3cbe3bbc5df3a11ffa9;hpb=48743e39650eb1ef988380e9d95f27fd40d3a9ce;p=tpg%2Facess2.git

diff --git a/KernelLand/Modules/USB/UHCI/uhci.h b/KernelLand/Modules/USB/UHCI/uhci.h
index a93459a9..fbbeba32 100644
--- a/KernelLand/Modules/USB/UHCI/uhci.h
+++ b/KernelLand/Modules/USB/UHCI/uhci.h
@@ -8,55 +8,40 @@
 
 // === TYPES ===
 typedef struct sUHCI_Controller	tUHCI_Controller;
+typedef struct sUHCI_EndpointInfo	tUHCI_EndpointInfo;
+typedef struct sUHCI_ExtraTDInfo	tUHCI_ExtraTDInfo;
+
 typedef struct sUHCI_TD	tUHCI_TD;
 typedef struct sUHCI_QH	tUHCI_QH;
 
 // === STRUCTURES ===
-struct sUHCI_Controller
+struct sUHCI_ExtraTDInfo
 {
-	/**
-	 * \brief PCI Device ID
-	 */
-	Uint16	PciId;
-	
-	/**
-	 * \brief IO Base Address
-	 */
-	Uint16	IOBase;
-	
-	/**
-	 * \brief Memory Mapped-IO base address
-	 */
-	Uint16	*MemIOMap;
-
-	/**
-	 * \brief IRQ Number assigned to the device
-	 */
-	 int	IRQNum;
-
-	/**
-	 * \brief Number of the last frame to be cleaned
-	 */
-	 int	LastCleanedFrame;
+	 int	Offset;
+	tPAddr	FirstPage;
+	tPAddr	SecondPage;
 	
-	/**
-	 * \brief Frame list
-	 * 
-	 * 31:4 - Frame Pointer
-	 * 3:2 - Reserved
-	 * 1 - QH/TD Selector
-	 * 0 - Terminate (Empty Pointer)
-	 */
-	Uint32	*FrameList;
-	
-	/**
-	 * \brief Physical Address of the Frame List
-	 */
-	tPAddr	PhysFrameList;
+	tUSBHostCb	Callback;
+	void	*CallbackPtr;
+};
 
-	tUSBHub	*RootHub;
+struct sUHCI_EndpointInfo
+{
+	unsigned MaxPacketSize : 12;
+	unsigned Type : 3;
+	unsigned Tgl : 1;
 };
 
+#define TD_CTL_IOC	(1 << 24)
+#define TD_CTL_ACTIVE	(1 << 23)
+#define TD_CTL_STALLED	(1 << 22)
+#define TD_CTL_DATABUFERR	(1 << 21)
+#define TD_CTL_BABBLE	(1 << 20)
+#define TD_CTL_NAK	(1 << 19)
+#define TD_CTL_CRCERR	(1 << 18)
+#define TD_CTL_BITSTUFF	(1 << 17)
+#define TD_CTL_RESERVED	(1 << 16)
+
 struct sUHCI_TD
 {
 	/**
@@ -116,10 +101,10 @@ struct sUHCI_TD
 
 	struct
 	{
-		tUSBHostCb	Callback;
-		void	*CallbackPtr;
-		void	*DataPtr;
-		 int	bCopyData;
+		tUHCI_ExtraTDInfo	*ExtraInfo;
+		char	bActive;	// Allocated
+		Uint8	QueueIndex;	// QH, 0-127 are interrupt, 128 undef, 129 Control, 130 Bulk
+		char	bFreePointer;	// Free \a BufferPointer once done
 	} _info;
 } __attribute__((aligned(16)));
 
@@ -135,7 +120,6 @@ struct sUHCI_QH
 	 */
 	Uint32	Next;
 
-	
 	/**
 	 * \brief Next Entry in list
 	 * 
@@ -145,6 +129,87 @@ struct sUHCI_QH
 	 * 0 - Terminate (Last in List)
 	 */
 	Uint32	Child;
+	
+	/*
+	 * \note Area for software use
+	 * \brief Last TD in this list, used to add things to the end
+	 */
+	tUHCI_TD	*_LastItem;
+} __attribute__((aligned(16)));
+
+struct sUHCI_Controller
+{
+	/**
+	 * \brief PCI Device ID
+	 */
+	Uint16	PciId;
+	
+	/**
+	 * \brief IO Base Address
+	 */
+	Uint16	IOBase;
+	
+	/**
+	 * \brief Memory Mapped-IO base address
+	 */
+	Uint16	*MemIOMap;
+
+	/**
+	 * \brief IRQ Number assigned to the device
+	 */
+	 int	IRQNum;
+
+	/**
+	 * \brief Number of the last frame to be cleaned
+	 */
+	 int	LastCleanedFrame;
+	
+	/**
+	 * \brief Frame list
+	 * 
+	 * 31:4 - Frame Pointer
+	 * 3:2 - Reserved
+	 * 1 - QH/TD Selector
+	 * 0 - Terminate (Empty Pointer)
+	 */
+	Uint32	*FrameList;
+	
+	/**
+	 * \brief Physical Address of the Frame List
+	 */
+	tPAddr	PhysFrameList;
+
+	tUSBHub	*RootHub;
+
+	/**
+	 * \brief Load in bytes on each interrupt queue
+	 */
+	 int	InterruptLoad[128];
+
+	tPAddr  	PhysTDQHPage;
+	struct
+	{
+		// 127 Interrupt Queue Heads
+		// - 4ms -> 256ms range of periods
+		tUHCI_QH	InterruptQHs[0];
+		tUHCI_QH	InterruptQHs_256ms[64];
+		tUHCI_QH	InterruptQHs_128ms[32];
+		tUHCI_QH	InterruptQHs_64ms [16];
+		tUHCI_QH	InterruptQHs_32ms [ 8];
+		tUHCI_QH	InterruptQHs_16ms [ 4];
+		tUHCI_QH	InterruptQHs_8ms  [ 2];
+		tUHCI_QH	InterruptQHs_4ms  [ 1];
+		tUHCI_QH	_padding;
+	
+		tUHCI_QH	ControlQH;
+		tUHCI_QH	BulkQH;
+		
+		tUHCI_TD	LocalTDPool[ (4096-(128+2)*sizeof(tUHCI_QH)) / sizeof(tUHCI_TD) ];
+	}	*TDQHPage;
+	
+	struct {
+		tUHCI_EndpointInfo EndpointInfo[16];
+	} *DevInfo[256];
 };
 
 // === ENUMERATIONS ===