X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=Modules%2FStorage%2FATA%2Fio.c;h=128fdca08e4b7564a640cdd04cf743a40bef7f4b;hb=6b71b6d8b62bc72fa91f6bc87b39185705f66f6c;hp=b1342c642e3925b71ebd7afc03a29f7b789aab05;hpb=a86fdbe9713b75ad1d9b3b8bcbfb88f87c000ea2;p=tpg%2Facess2.git

diff --git a/Modules/Storage/ATA/io.c b/Modules/Storage/ATA/io.c
index b1342c64..128fdca0 100644
--- a/Modules/Storage/ATA/io.c
+++ b/Modules/Storage/ATA/io.c
@@ -4,7 +4,7 @@
  *
  * Disk Input/Output control
  */
-#define DEBUG	1
+#define DEBUG	0
 #include <acess.h>
 #include <modules.h>	// Needed for error codes
 #include <drv_pci.h>
@@ -79,8 +79,8 @@ Uint16	ATA_GetBasePort(int Disk);
  int	ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer);
  int	ATA_WriteDMA(Uint8 Disk, Uint64 Address, Uint Count, const void *Buffer);
 // IRQs
-void	ATA_IRQHandlerPri(int UNUSED(IRQ));
-void	ATA_IRQHandlerSec(int UNUSED(IRQ));
+void	ATA_IRQHandlerPri(int UNUSED(IRQ), void *UNUSED(Ptr));
+void	ATA_IRQHandlerSec(int UNUSED(IRQ), void *UNUSED(Ptr));
 // Controller IO
 Uint8	ATA_int_BusMasterReadByte(int Ofs);
 Uint32	ATA_int_BusMasterReadDWord(int Ofs);
@@ -141,12 +141,12 @@ int ATA_SetupIO(void)
 	}
 	else {
 		// Bit 0 is left set as a flag to other functions
-		LOG("gATA_BusMasterBase = 0x%x", gATA_BusMasterBase & ~1);
+		LOG("gATA_BusMasterBase = IO 0x%x", gATA_BusMasterBase & ~1);
 	}
 
 	// Register IRQs and get Buffers
-	IRQ_AddHandler( gATA_IRQPri, ATA_IRQHandlerPri );
-	IRQ_AddHandler( gATA_IRQSec, ATA_IRQHandlerSec );
+	IRQ_AddHandler( gATA_IRQPri, ATA_IRQHandlerPri, NULL );
+	IRQ_AddHandler( gATA_IRQSec, ATA_IRQHandlerSec, NULL );
 
 	gATA_PRDTs[0].PBufAddr = MM_GetPhysAddr( (tVAddr)&gATA_Buffers[0] );
 	gATA_PRDTs[1].PBufAddr = MM_GetPhysAddr( (tVAddr)&gATA_Buffers[1] );
@@ -164,6 +164,8 @@ int ATA_SetupIO(void)
 	// Enable controllers
 	outb(IDE_PRI_BASE+1, 1);
 	outb(IDE_SEC_BASE+1, 1);
+	outb(IDE_PRI_CTRL, 0);
+	outb(IDE_SEC_CTRL, 0);
 	
 	// Make sure interrupts are ACKed
 	ATA_int_BusMasterWriteByte(2, 0x4);
@@ -314,14 +316,14 @@ int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
 
 	#if 1
 	if( cont == 0 ) {
-		outb(base+IDE_PRI_CTRL, 4);
+		outb(IDE_PRI_CTRL, 4);
 		IO_DELAY();
-		outb(base+IDE_PRI_CTRL, 0);
+		outb(IDE_PRI_CTRL, 0);
 	}
 	else {
-		outb(base+IDE_SEC_CTRL, 4);
+		outb(IDE_SEC_CTRL, 4);
 		IO_DELAY();
-		outb(base+IDE_SEC_CTRL, 0);
+		outb(IDE_SEC_CTRL, 0);
 	}
 	#endif
 
@@ -385,7 +387,8 @@ int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
 			ATA_int_BusMasterWriteByte(cont*8 + 2, 4);	// Clear interrupt
 			memcpy( Buffer, gATA_Buffers[cont], Count*SECTOR_SIZE );
 			Mutex_Release( &glaATA_ControllerLock[ cont ] );
-			LEAVE_RET('i', 0);
+			LEAVE('i', 0);
+			return 0;
 		}
 
 		#if 1
@@ -500,7 +503,7 @@ int ATA_WriteDMA(Uint8 Disk, Uint64 Address, Uint Count, const void *Buffer)
 /**
  * \brief Primary ATA Channel IRQ handler
  */
-void ATA_IRQHandlerPri(int UNUSED(IRQ))
+void ATA_IRQHandlerPri(int UNUSED(IRQ), void *UNUSED(Ptr))
 {
 	Uint8	val;
 
@@ -518,7 +521,7 @@ void ATA_IRQHandlerPri(int UNUSED(IRQ))
 /**
  * \brief Second ATA Channel IRQ handler
  */
-void ATA_IRQHandlerSec(int UNUSED(IRQ))
+void ATA_IRQHandlerSec(int UNUSED(IRQ), void *UNUSED(Ptr))
 {
 	Uint8	val;
 	// IRQ bit set for Secondary Controller