X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=Modules%2FStorage%2FATA%2Fio.c;h=b1342c642e3925b71ebd7afc03a29f7b789aab05;hb=a86fdbe9713b75ad1d9b3b8bcbfb88f87c000ea2;hp=73c33b28240a2b9cfcf4b9ce3914f5ce27b44e8b;hpb=abe6c6cf7fac39102e20cd28687b24c67f4952f8;p=tpg%2Facess2.git

diff --git a/Modules/Storage/ATA/io.c b/Modules/Storage/ATA/io.c
index 73c33b28..b1342c64 100644
--- a/Modules/Storage/ATA/io.c
+++ b/Modules/Storage/ATA/io.c
@@ -4,7 +4,7 @@
  *
  * Disk Input/Output control
  */
-#define DEBUG	0
+#define DEBUG	1
 #include <acess.h>
 #include <modules.h>	// Needed for error codes
 #include <drv_pci.h>
@@ -119,7 +119,7 @@ int ATA_SetupIO(void)
 	// Get IDE Controller's PCI Entry
 	ent = PCI_GetDeviceByClass(0x0101, 0xFFFF, -1);
 	LOG("ent = %i", ent);
-	gATA_BusMasterBase = PCI_GetBAR4( ent );
+	gATA_BusMasterBase = PCI_GetBAR(ent, 4);
 	if( gATA_BusMasterBase == 0 ) {
 		Log_Warning("ATA", "It seems that there is no Bus Master Controller on this machine. Get one");
 		// TODO: Use PIO mode instead
@@ -127,8 +127,8 @@ int ATA_SetupIO(void)
 		return MODULE_ERR_NOTNEEDED;
 	}
 	
-	LOG("BAR5 = 0x%x", PCI_GetBAR5( ent ));
-	LOG("IRQ = %i", PCI_GetIRQ( ent ));
+	LOG("BAR5 = 0x%x", PCI_GetBAR(ent, 5));
+	LOG("IRQ = %i", PCI_GetIRQ(ent));
 	
 	// Map memory
 	if( !(gATA_BusMasterBase & 1) )
@@ -353,7 +353,8 @@ int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
 	
 	// HACK: Ensure the PRDT is reset
 	ATA_int_BusMasterWriteDWord(cont*8+4, gaATA_PRDT_PAddrs[cont]);
-		
+	ATA_int_BusMasterWriteByte(cont*8, 4);	// Reset IRQ
+	
 	LOG("gATA_PRDTs[%i].Bytes = %i", cont, gATA_PRDTs[cont].Bytes);
 	if( Address > 0x0FFFFFFF )
 		outb(base+0x07, HDD_DMA_R48);	// Read Command (LBA48)
@@ -377,8 +378,16 @@ int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
 	LOG("Status byte = 0x%02x, Controller Status = 0x%02x",
 		val, ATA_int_BusMasterReadByte(cont * 8 + 2));
 
-	if( gaATA_IRQs[cont] == 0 ) {
-		
+	if( gaATA_IRQs[cont] == 0 )
+	{
+		if( ATA_int_BusMasterReadByte(cont * 8 + 2) & 0x4 ) {
+			Log_Error("ATA", "BM Status reports an interrupt, but none recieved");
+			ATA_int_BusMasterWriteByte(cont*8 + 2, 4);	// Clear interrupt
+			memcpy( Buffer, gATA_Buffers[cont], Count*SECTOR_SIZE );
+			Mutex_Release( &glaATA_ControllerLock[ cont ] );
+			LEAVE_RET('i', 0);
+		}
+
 		#if 1
 		Debug_HexDump("ATA", Buffer, 512);
 		#endif