X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=ROM2%2Fdisplay_basic.c;h=9d3264e4c563f515db6d564dda8301d90117bdbd;hb=12a32b8bede21a6011d240bf7e63fc6705322717;hp=72d8ac0ad08918e478cbf89ea5dc39b4c267cf01;hpb=41ad37ba6d86ccc4f8f720cb09f7891ae166cb38;p=uccvend-snackrom.git diff --git a/ROM2/display_basic.c b/ROM2/display_basic.c index 72d8ac0..9d3264e 100644 --- a/ROM2/display_basic.c +++ b/ROM2/display_basic.c @@ -13,36 +13,42 @@ void display_send_byte(char c); void display_reset(); -void set_msg(char newmsg[10]) { +void set_msg(char newmsg[11]) { int i; display_reset(); + spi_enable(); for (i=0; i < 10; i++) { + if (newmsg[i] == 0) break; + } + for (i--; i >= 0; i--) { display_send_byte(newmsg[i]&0x7f); } + spi_disable(); } void display_send_byte(char c) { bset_misc_output(A3800_DISPLAY_WRITE); /* enable the display clock */ _io_ports[M6811_SPDR] = c; /* load SPI with byte */ - while(!(_io_ports[M6811_SPDR]&M6811_SPIE)); /* wait for completion */ - _io_ports[M6811_SPDR]; /* SPDR read to clear SPIE flag */ + while(!(_io_ports[M6811_SPSR]&M6811_SPIF)); /* wait for completion */ + _io_ports[M6811_SPDR]; /* SPDR read to clear SPIF flag */ bclr_misc_output(A3800_DISPLAY_WRITE); /* disable the display clock */ } -#define DISPLAY_DELAY 100 /* ms to delay between ops - could be tweaked */ +#define DISPLAY_DELAY 50 /* ms to delay between ops - could be tweaked */ void display_reset() { /* lower the reset line for a while */ bclr((void*)&_io_ports[M6811_PORTA], PORTA_DISP_RESET); delay(DISPLAY_DELAY); bset((void*)&_io_ports[M6811_PORTA], PORTA_DISP_RESET); + delay(DISPLAY_DELAY); spi_enable(); - delay(DISPLAY_DELAY); display_send_byte(0xC0 | 10); /* tell the controller there are 10 digits */ - display_send_byte(0xE0); /* set duty cycle to 100% */ + //display_send_byte(0xE0); /* set duty cycle to 0% */ + display_send_byte(0xFF); /* set duty cycle to 100% */ spi_disable(); }