X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=ROM2%2Fvectors.s;h=04bfb72f4983dda5c5332f69c349e5eba4f698fc;hb=77f2f2b514bc8b3a5e4c23ab02afc16bdcedb3c6;hp=14ae9866996a27f9d185d6124fa33b8cc5323cad;hpb=9366107abfbfbe85f00b27449c79284d0e1aa59e;p=uccvend-snackrom.git

diff --git a/ROM2/vectors.s b/ROM2/vectors.s
index 14ae986..04bfb72 100644
--- a/ROM2/vectors.s
+++ b/ROM2/vectors.s
@@ -27,14 +27,27 @@ Boston, MA 02111-1307, USA.  */
 
 	.sect .text
 	.globl _start
+	.globl sci_interrupt_serial
+	.globl sci_interrupt_coinmech
+	;.globl uart_interrupt
 
 ;; Default interrupt handler.
 	.sect .text
 def:
 	rti
 
-	.globl _debug_user_vectors
-_debug_user_vectors = 0
+;;	.globl _debug_user_vectors
+;;_debug_user_vectors = 0
+
+
+;; RTI interrupt handler
+	.sect .text
+rti:
+	jsr chime
+	jsr serial_rti
+	ldaa #0x40
+	staa 0x1025
+	rti
 
 ;; 
 ;; Interrupt vectors are in a specific section that is
@@ -56,7 +69,7 @@ vectors:
 	.word def		; ffd4
 
 	;; SCI
-	.word def		; ffd6
+	.word sci_interrupt_serial	; ffd6
 
 	;; SPI
 	.word def		; ffd8
@@ -65,8 +78,8 @@ vectors:
 	.word def		; ffde (TOI)
 
 	;; Timer Output Compare
-	.word def          	; ffe0
-	.word def	 	; ffe2
+	.word def		; ffe0
+	.word def		; ffe2
 	.word def		; ffe4
 	.word def		; ffe6
 	.word def		; ffe8
@@ -77,12 +90,14 @@ vectors:
 	.word def		; ffee
 
 	;;  Misc
+	;.word def	 	; fff0 (RTII) ; uncomment to disable the RTI & comment below
 	.word rti	 	; fff0 (RTII)
-	.word def       ; fff2 (IRQ)
+	;.word uart_interrupt	; fff2 (IRQ)
+	.word def     	; fff2 (IRQ)
 	.word def		; fff4 (XIRQ)
 	.word def		; fff6 (SWI)
 	.word def		; fff8 (ILL)
-	.word def		; fffa (COP Failure)
-	.word def		; fffc (COP Clock monitor)
+	.word _start		; fffa (COP Failure)
+	.word _start		; fffc (COP Clock monitor)
 	.word _start		; fffe (reset)