X-Git-Url: https://git.ucc.asn.au/?a=blobdiff_plain;f=research%2FTCS%2F2012-08-20%2Fchecklist;h=b054d62d0b6706988a1c865dbce761c82eb8963f;hb=6da2fbb2e712c657f7e80848f6b9b45de35b11c8;hp=4c3a9287c2ee2b2ceef8aded302fd640512ccb78;hpb=2f97fc2b41a6bc5416765c8f48e999aab2e948f2;p=matches%2Fhonours.git

diff --git a/research/TCS/2012-08-20/checklist b/research/TCS/2012-08-20/checklist
index 4c3a9287..b054d62d 100644
--- a/research/TCS/2012-08-20/checklist
+++ b/research/TCS/2012-08-20/checklist
@@ -1,4 +1,4 @@
-# File opened at 2012-08-20 11:32:50.826641
+# File opened at 2012-08-20 15:36:56.285769
 # Accelerating Voltage = 38.5
 # Focus Voltage = -0.108
 # Deflection Voltage = 1.352
@@ -6,7 +6,7 @@
 # Initial Voltage = 0.00
 # Heating Current = 1.141
 # Heating Voltage = 1.163 (* 1.45 at PS *)
-# Chamber Pressure = 3.11e-8
+# Chamber Pressure = 3.72e-8
 # 610B Zero = 0.00
 # 602 Zero = 0.00
 # 610B Scale = 1e-7 x 0.03
@@ -17,10 +17,10 @@
 # 602 0.003 Battery = 7.35
 # 602 0.001 Battery = 8.20
 # ADC Regulator = 3.30
-# Sample = Au on Si (+20min 3.5A total ~50min)
+# Sample = Au on Si (+25 min @ 3.5A, total ~75 min)
 # Sample Angle = 136
-# Title = Au on Si (50min)
-# Comment = First sample. Au layer visible now, but there is a streak through the middle (still).
+# Title = Au on Si (75min)
+# Comment = First sample +25min 3.5A
 # Data = time DAC ADC4 ADC4_sigma ADC5 ADC5_sigma
-# Parameters last checked = 2012-08-20 10:34:05.213638
-# File closed at 2012-08-20 11:32:50.827059
+# Parameters last checked = 2012-08-20 15:36:56.285508
+# File closed at 2012-08-20 15:36:56.286276