Comments

diff --git a/ROM2/start.s b/ROM2/start.s
index c370263..15ce855 100644 (file)
--- a/ROM2/start.s
+++ b/ROM2/start.s
@@ -12,7 +12,7 @@ _start:
 
        ;; set RTI intervals, and PA3/7 DDRs
        ldaa #0x81
-       staa 0x1026
+       staa 0x1026  ;; RTI interval becomes E/2^14 = 6.6ms (or 150 Hz)
 
        ;; clear ADC register
        clra