From: John Hodge Date: Sat, 14 Jan 2012 13:03:13 +0000 (+0800) Subject: Modules/Tegra2Vid - Renamed properly X-Git-Tag: rel0.14~15 X-Git-Url: https://git.ucc.asn.au/?a=commitdiff_plain;h=80b88a349e37b8493506c7e28cf169c9314cdbf4;hp=8de6b4e1a2050289458d6489551eb61b6c1d3645;p=tpg%2Facess2.git Modules/Tegra2Vid - Renamed properly --- diff --git a/BuildConf/armv7/tegra2.mk b/BuildConf/armv7/tegra2.mk index ece6ccf5..4abc5c88 100644 --- a/BuildConf/armv7/tegra2.mk +++ b/BuildConf/armv7/tegra2.mk @@ -1,4 +1,4 @@ include $(ACESSDIR)/BuildConf/armv7/default.mk -MODULES += Display/Tegra2 +MODULES += Display/Tegra2Vid diff --git a/Modules/Display/Tegra2/Makefile b/Modules/Display/Tegra2/Makefile deleted file mode 100644 index 3155db3c..00000000 --- a/Modules/Display/Tegra2/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# - -OBJ = main.o -NAME = Tegra2 - --include ../Makefile.tpl diff --git a/Modules/Display/Tegra2/main.c b/Modules/Display/Tegra2/main.c deleted file mode 100644 index dfafb2a2..00000000 --- a/Modules/Display/Tegra2/main.c +++ /dev/null @@ -1,281 +0,0 @@ -/** - * main.c - * - Driver core - */ -#define DEBUG 0 -#define VERSION ((0<<8)|10) -#include -#include -#include -#include -#include -#include -#include -#include -#include // ARM Arch -#include "tegra2.h" - -#define ABS(a) ((a)>0?(a):-(a)) - -// === PROTOTYPES === -// Driver - int Tegra2Vid_Install(char **Arguments); -void Tegra2Vid_Uninstall(); -// Internal -// Filesystem -Uint64 Tegra2Vid_Read(tVFS_Node *node, Uint64 off, Uint64 len, void *buffer); -Uint64 Tegra2Vid_Write(tVFS_Node *node, Uint64 off, Uint64 len, void *buffer); - int Tegra2Vid_IOCtl(tVFS_Node *node, int id, void *data); -// -- Internals - int Tegra2Vid_int_SetMode(int Mode); - -// === GLOBALS === -MODULE_DEFINE(0, VERSION, Video_Tegra2, Tegra2Vid_Install, NULL, NULL); -tDevFS_Driver gTegra2Vid_DriverStruct = { - NULL, "PL110", - { - .Read = Tegra2Vid_Read, - .Write = Tegra2Vid_Write, - .IOCtl = Tegra2Vid_IOCtl - } -}; -// -- Options -tPAddr gTegra2Vid_PhysBase = TEGRA2VID_BASE; - int gbTegra2Vid_IsVersatile = 1; -// -- KeyVal parse rules -const tKeyVal_ParseRules gTegra2Vid_KeyValueParser = { - NULL, - { - {"Base", "P", &gTegra2Vid_PhysBase}, - {NULL, NULL, NULL} - } -}; -// -- Driver state - int giTegra2Vid_CurrentMode = 0; - int giTegra2Vid_BufferMode; -size_t giTegra2Vid_FramebufferSize; -Uint8 *gpTegra2Vid_IOMem; -tPAddr gTegra2Vid_FramebufferPhys; -void *gpTegra2Vid_Framebuffer; -// -- Misc -tDrvUtil_Video_BufInfo gTegra2Vid_DrvUtil_BufInfo; -tVideo_IOCtl_Pos gTegra2Vid_CursorPos; - -// === CODE === -/** - */ -int Tegra2Vid_Install(char **Arguments) -{ -// KeyVal_Parse(&gTegra2Vid_KeyValueParser, Arguments); - - gpTegra2Vid_IOMem = (void*)MM_MapHWPages(gTegra2Vid_PhysBase, 256/4); - - Tegra2Vid_int_SetMode(4); - - DevFS_AddDevice( &gTegra2Vid_DriverStruct ); - - return 0; -} - -/** - * \brief Clean up resources for driver unloading - */ -void Tegra2Vid_Uninstall() -{ -} - -/** - * \brief Read from the framebuffer - */ -Uint64 Tegra2Vid_Read(tVFS_Node *node, Uint64 off, Uint64 len, void *buffer) -{ - return 0; -} - -/** - * \brief Write to the framebuffer - */ -Uint64 Tegra2Vid_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer) -{ - gTegra2Vid_DrvUtil_BufInfo.BufferFormat = giTegra2Vid_BufferMode; - return DrvUtil_Video_WriteLFB(&gTegra2Vid_DrvUtil_BufInfo, Offset, Length, Buffer); -} - -const char *csaTegra2Vid_IOCtls[] = {DRV_IOCTLNAMES, DRV_VIDEO_IOCTLNAMES, NULL}; - -/** - * \brief Handle messages to the device - */ -int Tegra2Vid_IOCtl(tVFS_Node *Node, int ID, void *Data) -{ - int ret = -2; - ENTER("pNode iID pData", Node, ID, Data); - - switch(ID) - { - BASE_IOCTLS(DRV_TYPE_VIDEO, "PL110", VERSION, csaTegra2Vid_IOCtls); - - case VIDEO_IOCTL_SETBUFFORMAT: - DrvUtil_Video_RemoveCursor( &gTegra2Vid_DrvUtil_BufInfo ); - ret = giTegra2Vid_BufferMode; - if(Data) giTegra2Vid_BufferMode = *(int*)Data; - if(gTegra2Vid_DrvUtil_BufInfo.BufferFormat == VIDEO_BUFFMT_TEXT) - DrvUtil_Video_SetCursor( &gTegra2Vid_DrvUtil_BufInfo, &gDrvUtil_TextModeCursor ); - break; - - case VIDEO_IOCTL_GETSETMODE: - if(Data) - { - int newMode; - - if( !CheckMem(Data, sizeof(int)) ) - LEAVE_RET('i', -1); - - newMode = *(int*)Data; - - if(newMode < 0 || newMode >= ciTegra2Vid_ModeCount) - LEAVE_RET('i', -1); - - if(newMode != giTegra2Vid_CurrentMode) - { - giTegra2Vid_CurrentMode = newMode; - Tegra2Vid_int_SetMode( newMode ); - } - } - ret = giTegra2Vid_CurrentMode; - break; - - case VIDEO_IOCTL_FINDMODE: - { - tVideo_IOCtl_Mode *mode = Data; - int closest, closestArea, reqArea = 0; - if(!Data || !CheckMem(Data, sizeof(tVideo_IOCtl_Mode))) - LEAVE_RET('i', -1); - if( mode->bpp != 32 ) - LEAVE_RET('i', 0); - if( mode->flags != 0 ) - LEAVE_RET('i', 0); - - ret = 0; - - for( int i = 0; i < ciTegra2Vid_ModeCount; i ++ ) - { - int area; - if(mode->width == caTegra2Vid_Modes[i].W && mode->height == caTegra2Vid_Modes[i].H) { - mode->id = i; - ret = 1; - break; - } - - area = caTegra2Vid_Modes[i].W * caTegra2Vid_Modes[i].H; - if(!reqArea) { - reqArea = mode->width * mode->height; - closest = i; - closestArea = area; - } - else if( ABS(area - reqArea) < ABS(closestArea - reqArea) ) { - closest = i; - closestArea = area; - } - } - - if( ret == 0 ) - { - mode->id = closest; - ret = 1; - } - mode->width = caTegra2Vid_Modes[mode->id].W; - mode->height = caTegra2Vid_Modes[mode->id].H; - break; - } - - case VIDEO_IOCTL_MODEINFO: - { - tVideo_IOCtl_Mode *mode = Data; - if(!Data || !CheckMem(Data, sizeof(tVideo_IOCtl_Mode))) - LEAVE_RET('i', -1); - if(mode->id < 0 || mode->id >= ciTegra2Vid_ModeCount) - LEAVE_RET('i', 0); - - - mode->bpp = 32; - mode->flags = 0; - mode->width = caTegra2Vid_Modes[mode->id].W; - mode->height = caTegra2Vid_Modes[mode->id].H; - - ret = 1; - break; - } - - case VIDEO_IOCTL_SETCURSOR: - if( !Data || !CheckMem(Data, sizeof(tVideo_IOCtl_Pos)) ) - LEAVE_RET('i', -1); - - DrvUtil_Video_RemoveCursor( &gTegra2Vid_DrvUtil_BufInfo ); - - gTegra2Vid_CursorPos = *(tVideo_IOCtl_Pos*)Data; - if(gTegra2Vid_DrvUtil_BufInfo.BufferFormat == VIDEO_BUFFMT_TEXT) - DrvUtil_Video_DrawCursor( - &gTegra2Vid_DrvUtil_BufInfo, - gTegra2Vid_CursorPos.x*giVT_CharWidth, - gTegra2Vid_CursorPos.y*giVT_CharHeight - ); - else - DrvUtil_Video_DrawCursor( - &gTegra2Vid_DrvUtil_BufInfo, - gTegra2Vid_CursorPos.x, - gTegra2Vid_CursorPos.y - ); - break; - - default: - LEAVE('i', -2); - return -2; - } - - LEAVE('i', ret); - return ret; -} - -// -// -// - -int Tegra2Vid_int_SetMode(int Mode) -{ - const struct sTegra2_Disp_Mode *mode = &caTegra2Vid_Modes[Mode]; - int w = mode->W, h = mode->H; // Horizontal/Vertical Active - *(Uint32*)(gpTegra2Vid_IOMem + DC_DISP_FRONT_PORCH_0) = (mode->VFP << 16) | mode->HFP; - *(Uint32*)(gpTegra2Vid_IOMem + DC_DISP_SYNC_WIDTH_0) = (mode->HS << 16) | mode->HS; - *(Uint32*)(gpTegra2Vid_IOMem + DC_DISP_BACK_PORCH_0) = (mode->VBP << 16) | mode->HBP; - *(Uint32*)(gpTegra2Vid_IOMem + DC_DISP_DISP_ACTIVE_0) = (mode->H << 16) | mode->W; - - *(Uint32*)(gpTegra2Vid_IOMem + DC_WIN_A_POSITION_0) = 0; - *(Uint32*)(gpTegra2Vid_IOMem + DC_WIN_A_SIZE_0) = (mode->H << 16) | mode->W; - *(Uint8*)(gpTegra2Vid_IOMem + DC_WIN_A_COLOR_DEPTH_0) = 12; // Could be 13 (BGR/RGB) - *(Uint32*)(gpTegra2Vid_IOMem + DC_WIN_A_PRESCALED_SIZE_0) = (mode->H << 16) | mode->W; - - if( !gpTegra2Vid_Framebuffer || w*h*4 != giTegra2Vid_FramebufferSize ) - { - if( gpTegra2Vid_Framebuffer ) - { - // TODO: Free framebuffer for reallocation - } - - giTegra2Vid_FramebufferSize = w*h*4; - - gpTegra2Vid_Framebuffer = (void*)MM_AllocDMA( - (giTegra2Vid_FramebufferSize + PAGE_SIZE-1) / PAGE_SIZE, - 32, - &gTegra2Vid_FramebufferPhys - ); - // TODO: Catch allocation failures - - // Tell hardware - *(Uint32*)(gpTegra2Vid_IOMem + DC_WINBUF_A_START_ADDR_0) = gTegra2Vid_FramebufferPhys; - *(Uint32*)(gpTegra2Vid_IOMem + DC_WINBUF_A_ADDR_V_OFFSET_0) = 0; // Y offset - *(Uint32*)(gpTegra2Vid_IOMem + DC_WINBUF_A_ADDR_H_OFFSET_0) = 0; // X offset - } - - return 0; -} diff --git a/Modules/Display/Tegra2/tegra2.h b/Modules/Display/Tegra2/tegra2.h deleted file mode 100644 index b05ca8c1..00000000 --- a/Modules/Display/Tegra2/tegra2.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Acess2 NVidia Tegra2 Display Driver - * - By John Hodge (thePowersGang) - * - * tegra2.h - * - Driver definitions - */ -#ifndef _TEGRA2_DISP_H_ -#define _TEGRA2_DISP_H_ - -#define TEGRA2VID_BASE 0x54200000 // 0x40000 Large (256 KB) - -const struct sTegra2_Disp_Mode -{ - Uint16 W, H; - Uint16 HFP, VFP; - Uint16 HS, VS; - Uint16 HBP, VBP; -} caTegra2Vid_Modes[] = { - // TODO: VESA timings - {720, 487, 16,33, 63, 33, 59, 133}, // NTSC 2 - {720, 576, 12,33, 63, 33, 69, 193}, // PAL 2 (VFP shown as 2/33, used 33) - {720, 483, 16, 6, 63, 6, 59, 30}, // 480p - {1280, 720, 70, 5, 804, 6, 220, 20}, // 720p - {1920,1080, 44, 4, 884, 5, 148, 36}, // 1080p - // TODO: Can all but HA/VA be constant and those select the resolution? -}; -const int ciTegra2Vid_ModeCount = sizeof(caTegra2Vid_Modes)/sizeof(caTegra2Vid_Modes[0]); - -enum eTegra2_Disp_Regs -{ - DC_DISP_DISP_SIGNAL_OPTIONS0_0 = 0x400, - DC_DISP_DISP_SIGNAL_OPTIONS1_0, - DC_DISP_DISP_WIN_OPTIONS_0, - DC_DISP_MEM_HIGH_PRIORITY_0, - DC_DISP_MEM_HIGH_PRIORITY_TIMER_0, - DC_DISP_DISP_TIMING_OPTIONS_0, - DC_DISP_REF_TO_SYNC_0, - DC_DISP_SYNC_WIDTH_0, - DC_DISP_BACK_PORCH_0, - DC_DISP_DISP_ACTIVE_0, - DC_DISP_FRONT_PORCH_0, - - DC_DISP_H_PULSE0_CONTROL_0, - - DC_WINC_A_COLOR_PALETTE_0 = 0x500, - DC_WINC_A_PALETTE_COLOR_EXT_0 = 0x600, - DC_WIN_A_WIN_OPTIONS_0 = 0x700, - DC_WIN_A_BYTE_SWAP_0, - DC_WIN_A_BUFFER_CONTROL_0, - DC_WIN_A_COLOR_DEPTH_0, - DC_WIN_A_POSITION_0, - DC_WIN_A_SIZE_0, - DC_WIN_A_PRESCALED_SIZE_0, - DC_WIN_A_H_INITIAL_DDA_0, - DC_WIN_A_V_INITIAL_DDA_0, - DC_WIN_A_DDA_INCREMENT_0, - DC_WIN_A_LINE_STRIDE_0, - DC_WIN_A_BUF_STRIDE_0, - DC_WIN_A_BUFFER_ADDR_MODE_0, - DC_WIN_A_DV_CONTROL_0, - DC_WIN_A_BLEND_NOKEY_0, - - DC_WINBUF_A_START_ADDR_0 = 0x800, - DC_WINBUF_A_START_ADDR_NS_0, - DC_WINBUF_A_ADDR_H_OFFSET_0, - DC_WINBUF_A_ADDR_H_OFFSET_NS_0, - DC_WINBUF_A_ADDR_V_OFFSET_0, - DC_WINBUF_A_ADDR_V_OFFSET_NS_0, -}; - -#endif - diff --git a/Modules/Display/Tegra2Vid/Makefile b/Modules/Display/Tegra2Vid/Makefile new file mode 100644 index 00000000..ecab050e --- /dev/null +++ b/Modules/Display/Tegra2Vid/Makefile @@ -0,0 +1,7 @@ +# +# + +OBJ = main.o +NAME = Tegra2Vid + +-include ../Makefile.tpl diff --git a/Modules/Display/Tegra2Vid/main.c b/Modules/Display/Tegra2Vid/main.c new file mode 100644 index 00000000..deae8f6b --- /dev/null +++ b/Modules/Display/Tegra2Vid/main.c @@ -0,0 +1,289 @@ +/** + * main.c + * - Driver core + */ +#define DEBUG 0 +#define VERSION ((0<<8)|10) +#include +#include +#include +#include +#include +#include +#include +#include +#include // ARM Arch +#include "tegra2.h" + +#define ABS(a) ((a)>0?(a):-(a)) + +// === PROTOTYPES === +// Driver + int Tegra2Vid_Install(char **Arguments); +void Tegra2Vid_Uninstall(); +// Internal +// Filesystem +Uint64 Tegra2Vid_Read(tVFS_Node *node, Uint64 off, Uint64 len, void *buffer); +Uint64 Tegra2Vid_Write(tVFS_Node *node, Uint64 off, Uint64 len, void *buffer); + int Tegra2Vid_IOCtl(tVFS_Node *node, int id, void *data); +// -- Internals + int Tegra2Vid_int_SetMode(int Mode); + +// === GLOBALS === +MODULE_DEFINE(0, VERSION, Tegra2Vid, Tegra2Vid_Install, NULL, NULL); +tDevFS_Driver gTegra2Vid_DriverStruct = { + NULL, "Tegra2Vid", + { + .Read = Tegra2Vid_Read, + .Write = Tegra2Vid_Write, + .IOCtl = Tegra2Vid_IOCtl + } +}; +// -- Options +tPAddr gTegra2Vid_PhysBase = TEGRA2VID_BASE; + int gbTegra2Vid_IsVersatile = 1; +// -- KeyVal parse rules +const tKeyVal_ParseRules gTegra2Vid_KeyValueParser = { + NULL, + { + {"Base", "P", &gTegra2Vid_PhysBase}, + {NULL, NULL, NULL} + } +}; +// -- Driver state + int giTegra2Vid_CurrentMode = 0; + int giTegra2Vid_BufferMode; +size_t giTegra2Vid_FramebufferSize; +Uint32 *gpTegra2Vid_IOMem; +tPAddr gTegra2Vid_FramebufferPhys; +void *gpTegra2Vid_Framebuffer; +// -- Misc +tDrvUtil_Video_BufInfo gTegra2Vid_DrvUtil_BufInfo; +tVideo_IOCtl_Pos gTegra2Vid_CursorPos; + +// === CODE === +/** + */ +int Tegra2Vid_Install(char **Arguments) +{ +// KeyVal_Parse(&gTegra2Vid_KeyValueParser, Arguments); + + gpTegra2Vid_IOMem = (void*)MM_MapHWPages(gTegra2Vid_PhysBase, 256/4); + + Tegra2Vid_int_SetMode(4); + + DevFS_AddDevice( &gTegra2Vid_DriverStruct ); + + return 0; +} + +/** + * \brief Clean up resources for driver unloading + */ +void Tegra2Vid_Uninstall() +{ +} + +/** + * \brief Read from the framebuffer + */ +Uint64 Tegra2Vid_Read(tVFS_Node *node, Uint64 off, Uint64 len, void *buffer) +{ + return 0; +} + +/** + * \brief Write to the framebuffer + */ +Uint64 Tegra2Vid_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer) +{ + gTegra2Vid_DrvUtil_BufInfo.BufferFormat = giTegra2Vid_BufferMode; + return DrvUtil_Video_WriteLFB(&gTegra2Vid_DrvUtil_BufInfo, Offset, Length, Buffer); +} + +const char *csaTegra2Vid_IOCtls[] = {DRV_IOCTLNAMES, DRV_VIDEO_IOCTLNAMES, NULL}; + +/** + * \brief Handle messages to the device + */ +int Tegra2Vid_IOCtl(tVFS_Node *Node, int ID, void *Data) +{ + int ret = -2; + ENTER("pNode iID pData", Node, ID, Data); + + switch(ID) + { + BASE_IOCTLS(DRV_TYPE_VIDEO, "PL110", VERSION, csaTegra2Vid_IOCtls); + + case VIDEO_IOCTL_SETBUFFORMAT: + DrvUtil_Video_RemoveCursor( &gTegra2Vid_DrvUtil_BufInfo ); + ret = giTegra2Vid_BufferMode; + if(Data) giTegra2Vid_BufferMode = *(int*)Data; + if(gTegra2Vid_DrvUtil_BufInfo.BufferFormat == VIDEO_BUFFMT_TEXT) + DrvUtil_Video_SetCursor( &gTegra2Vid_DrvUtil_BufInfo, &gDrvUtil_TextModeCursor ); + break; + + case VIDEO_IOCTL_GETSETMODE: + if(Data) + { + int newMode; + + if( !CheckMem(Data, sizeof(int)) ) + LEAVE_RET('i', -1); + + newMode = *(int*)Data; + + if(newMode < 0 || newMode >= ciTegra2Vid_ModeCount) + LEAVE_RET('i', -1); + + if(newMode != giTegra2Vid_CurrentMode) + { + giTegra2Vid_CurrentMode = newMode; + Tegra2Vid_int_SetMode( newMode ); + } + } + ret = giTegra2Vid_CurrentMode; + break; + + case VIDEO_IOCTL_FINDMODE: + { + tVideo_IOCtl_Mode *mode = Data; + int closest, closestArea, reqArea = 0; + if(!Data || !CheckMem(Data, sizeof(tVideo_IOCtl_Mode))) + LEAVE_RET('i', -1); + if( mode->bpp != 32 ) + LEAVE_RET('i', 0); + if( mode->flags != 0 ) + LEAVE_RET('i', 0); + + ret = 0; + + for( int i = 0; i < ciTegra2Vid_ModeCount; i ++ ) + { + int area; + if(mode->width == caTegra2Vid_Modes[i].W && mode->height == caTegra2Vid_Modes[i].H) { + mode->id = i; + ret = 1; + break; + } + + area = caTegra2Vid_Modes[i].W * caTegra2Vid_Modes[i].H; + if(!reqArea) { + reqArea = mode->width * mode->height; + closest = i; + closestArea = area; + } + else if( ABS(area - reqArea) < ABS(closestArea - reqArea) ) { + closest = i; + closestArea = area; + } + } + + if( ret == 0 ) + { + mode->id = closest; + ret = 1; + } + mode->width = caTegra2Vid_Modes[mode->id].W; + mode->height = caTegra2Vid_Modes[mode->id].H; + break; + } + + case VIDEO_IOCTL_MODEINFO: + { + tVideo_IOCtl_Mode *mode = Data; + if(!Data || !CheckMem(Data, sizeof(tVideo_IOCtl_Mode))) + LEAVE_RET('i', -1); + if(mode->id < 0 || mode->id >= ciTegra2Vid_ModeCount) + LEAVE_RET('i', 0); + + + mode->bpp = 32; + mode->flags = 0; + mode->width = caTegra2Vid_Modes[mode->id].W; + mode->height = caTegra2Vid_Modes[mode->id].H; + + ret = 1; + break; + } + + case VIDEO_IOCTL_SETCURSOR: + if( !Data || !CheckMem(Data, sizeof(tVideo_IOCtl_Pos)) ) + LEAVE_RET('i', -1); + + DrvUtil_Video_RemoveCursor( &gTegra2Vid_DrvUtil_BufInfo ); + + gTegra2Vid_CursorPos = *(tVideo_IOCtl_Pos*)Data; + if(gTegra2Vid_DrvUtil_BufInfo.BufferFormat == VIDEO_BUFFMT_TEXT) + DrvUtil_Video_DrawCursor( + &gTegra2Vid_DrvUtil_BufInfo, + gTegra2Vid_CursorPos.x*giVT_CharWidth, + gTegra2Vid_CursorPos.y*giVT_CharHeight + ); + else + DrvUtil_Video_DrawCursor( + &gTegra2Vid_DrvUtil_BufInfo, + gTegra2Vid_CursorPos.x, + gTegra2Vid_CursorPos.y + ); + break; + + default: + LEAVE('i', -2); + return -2; + } + + LEAVE('i', ret); + return ret; +} + +// +// +// + +int Tegra2Vid_int_SetMode(int Mode) +{ + const struct sTegra2_Disp_Mode *mode = &caTegra2Vid_Modes[Mode]; + int w = mode->W, h = mode->H; // Horizontal/Vertical Active + *(Uint32*)(gpTegra2Vid_IOMem + DC_DISP_FRONT_PORCH_0) = (mode->VFP << 16) | mode->HFP; + *(Uint32*)(gpTegra2Vid_IOMem + DC_DISP_SYNC_WIDTH_0) = (mode->HS << 16) | mode->HS; + *(Uint32*)(gpTegra2Vid_IOMem + DC_DISP_BACK_PORCH_0) = (mode->VBP << 16) | mode->HBP; + *(Uint32*)(gpTegra2Vid_IOMem + DC_DISP_DISP_ACTIVE_0) = (mode->H << 16) | mode->W; + + *(Uint32*)(gpTegra2Vid_IOMem + DC_WIN_A_POSITION_0) = 0; + *(Uint32*)(gpTegra2Vid_IOMem + DC_WIN_A_SIZE_0) = (mode->H << 16) | mode->W; + *(Uint32*)(gpTegra2Vid_IOMem + DC_DISP_DISP_COLOR_CONTROL_0) = 0x8; // BASE888 + *(Uint32*)(gpTegra2Vid_IOMem + DC_WIN_A_COLOR_DEPTH_0) = 12; // Could be 13 (BGR/RGB) + *(Uint32*)(gpTegra2Vid_IOMem + DC_WIN_A_PRESCALED_SIZE_0) = (mode->H << 16) | mode->W; + + Log_Debug("Tegra2Vid", "Mode %i (%ix%i) selected", Mode, w, h); + + if( !gpTegra2Vid_Framebuffer || w*h*4 != giTegra2Vid_FramebufferSize ) + { + if( gpTegra2Vid_Framebuffer ) + { + // TODO: Free framebuffer for reallocation + } + + giTegra2Vid_FramebufferSize = w*h*4; + + gpTegra2Vid_Framebuffer = (void*)MM_AllocDMA( + (giTegra2Vid_FramebufferSize + PAGE_SIZE-1) / PAGE_SIZE, + 32, + &gTegra2Vid_FramebufferPhys + ); + // TODO: Catch allocation failures + Log_Debug("Tegra2Vid", "0x%x byte framebuffer at %p (%P phys)", + giTegra2Vid_FramebufferSize, + gpTegra2Vid_Framebuffer, + gTegra2Vid_FramebufferPhys + ); + + // Tell hardware + *(Uint32*)(gpTegra2Vid_IOMem + DC_WINBUF_A_START_ADDR_0) = gTegra2Vid_FramebufferPhys; + *(Uint32*)(gpTegra2Vid_IOMem + DC_WINBUF_A_ADDR_V_OFFSET_0) = 0; // Y offset + *(Uint32*)(gpTegra2Vid_IOMem + DC_WINBUF_A_ADDR_H_OFFSET_0) = 0; // X offset + } + + return 0; +} diff --git a/Modules/Display/Tegra2Vid/tegra2.h b/Modules/Display/Tegra2Vid/tegra2.h new file mode 100644 index 00000000..b5666f33 --- /dev/null +++ b/Modules/Display/Tegra2Vid/tegra2.h @@ -0,0 +1,75 @@ +/* + * Acess2 NVidia Tegra2 Display Driver + * - By John Hodge (thePowersGang) + * + * tegra2.h + * - Driver definitions + */ +#ifndef _TEGRA2_DISP_H_ +#define _TEGRA2_DISP_H_ + +#define TEGRA2VID_BASE 0x54200000 // 0x40000 Large (256 KB) + +const struct sTegra2_Disp_Mode +{ + Uint16 W, H; + Uint16 HFP, VFP; + Uint16 HS, VS; + Uint16 HBP, VBP; +} caTegra2Vid_Modes[] = { + // TODO: VESA timings + {720, 487, 16,33, 63, 33, 59, 133}, // NTSC 2 + {720, 576, 12,33, 63, 33, 69, 193}, // PAL 2 (VFP shown as 2/33, used 33) + {720, 483, 16, 6, 63, 6, 59, 30}, // 480p + {1280, 720, 70, 5, 804, 6, 220, 20}, // 720p + {1920,1080, 44, 4, 884, 5, 148, 36}, // 1080p + // TODO: Can all but HA/VA be constant and those select the resolution? +}; +const int ciTegra2Vid_ModeCount = sizeof(caTegra2Vid_Modes)/sizeof(caTegra2Vid_Modes[0]); + +enum eTegra2_Disp_Regs +{ + DC_DISP_DISP_SIGNAL_OPTIONS0_0 = 0x400, + DC_DISP_DISP_SIGNAL_OPTIONS1_0, + DC_DISP_DISP_WIN_OPTIONS_0, + DC_DISP_MEM_HIGH_PRIORITY_0, + DC_DISP_MEM_HIGH_PRIORITY_TIMER_0, + DC_DISP_DISP_TIMING_OPTIONS_0, + DC_DISP_REF_TO_SYNC_0, + DC_DISP_SYNC_WIDTH_0, + DC_DISP_BACK_PORCH_0, + DC_DISP_DISP_ACTIVE_0, + DC_DISP_FRONT_PORCH_0, + + DC_DISP_H_PULSE0_CONTROL_0, + + DC_DISP_DISP_COLOR_CONTROL_0 = 0x430, + + DC_WINC_A_COLOR_PALETTE_0 = 0x500, + DC_WINC_A_PALETTE_COLOR_EXT_0 = 0x600, + DC_WIN_A_WIN_OPTIONS_0 = 0x700, + DC_WIN_A_BYTE_SWAP_0, + DC_WIN_A_BUFFER_CONTROL_0, + DC_WIN_A_COLOR_DEPTH_0, + DC_WIN_A_POSITION_0, + DC_WIN_A_SIZE_0, + DC_WIN_A_PRESCALED_SIZE_0, + DC_WIN_A_H_INITIAL_DDA_0, + DC_WIN_A_V_INITIAL_DDA_0, + DC_WIN_A_DDA_INCREMENT_0, + DC_WIN_A_LINE_STRIDE_0, + DC_WIN_A_BUF_STRIDE_0, + DC_WIN_A_BUFFER_ADDR_MODE_0, + DC_WIN_A_DV_CONTROL_0, + DC_WIN_A_BLEND_NOKEY_0, + + DC_WINBUF_A_START_ADDR_0 = 0x800, + DC_WINBUF_A_START_ADDR_NS_0, + DC_WINBUF_A_ADDR_H_OFFSET_0, + DC_WINBUF_A_ADDR_H_OFFSET_NS_0, + DC_WINBUF_A_ADDR_V_OFFSET_0, + DC_WINBUF_A_ADDR_V_OFFSET_NS_0, +}; + +#endif +