From: John Hodge Date: Mon, 24 Oct 2011 10:44:25 +0000 (+0800) Subject: Kernel - Cleaned up rear PCI api X-Git-Tag: rel0.14~198 X-Git-Url: https://git.ucc.asn.au/?a=commitdiff_plain;h=986359336a3d117cddbf33023aefdf585f6500f7;p=tpg%2Facess2.git Kernel - Cleaned up rear PCI api --- diff --git a/Kernel/arch/armv7/lib.c b/Kernel/arch/armv7/lib.c index a1fbfb77..5a6928e7 100644 --- a/Kernel/arch/armv7/lib.c +++ b/Kernel/arch/armv7/lib.c @@ -4,6 +4,7 @@ * lib.c - Library Functions */ #include +#include "../helpers.h" // === IMPORTS === extern void __memcpy_align4(void *_dest, const void *_src, size_t _length); @@ -114,25 +115,9 @@ void *memset(void *_dest, int _value, size_t _length) return _dest; } -// Divide -// - Find what power of two times Den is > Num -// - Iterate down in bit significance -// > If the `N` value is greater than `D`, we can set this bit -#define DEF_DIVMOD(s) Uint##s __divmod##s(Uint##s N, Uint##s D, Uint##s*Rem){\ - Uint##s ret=0,add=1;\ - while(N>=D&&add) {D<<=1;add<<=1;}\ - while(add>1){\ - add>>=1;D>>=1;\ - if(N>=D){ret+=add;N-=D;}\ - }\ - if(Rem)*Rem = N;\ - return ret;\ -} - DEF_DIVMOD(64) DEF_DIVMOD(32) - Uint64 DivMod64U(Uint64 Num, Uint64 Den, Uint64 *Rem) { Uint64 ret; diff --git a/Kernel/arch/armv7/mm_virt.c b/Kernel/arch/armv7/mm_virt.c index 7d0c85ad..a49febd1 100644 --- a/Kernel/arch/armv7/mm_virt.c +++ b/Kernel/arch/armv7/mm_virt.c @@ -179,12 +179,11 @@ int MM_int_SetPageInfo(tVAddr VAddr, tMM_PageInfo *pi) else { // Large page - // TODO: Log_Warning("MMVirt", "TODO: Implement large pages in MM_int_SetPageInfo"); } break; case 20: // Section or unmapped - Warning("TODO: Implement sections"); + Log_Warning("MMVirt", "TODO: Implement sections in MM_int_SetPageInfo"); break; case 24: // Supersection // Error if not aligned @@ -196,20 +195,21 @@ int MM_int_SetPageInfo(tVAddr VAddr, tMM_PageInfo *pi) { if( pi->PhysAddr == 0 ) { *desc = 0; - // TODO: Apply to all entries - LEAVE('i', 0); - return 0; } - // Apply - *desc = pi->PhysAddr & 0xFF000000; -// *desc |= ((pi->PhysAddr >> 32) & 0xF) << 20; -// *desc |= ((pi->PhysAddr >> 36) & 0x7) << 5; - *desc |= 2 | (1 << 18); + else { + // Apply + *desc = pi->PhysAddr & 0xFF000000; +// *desc |= ((pi->PhysAddr >> 32) & 0xF) << 20; +// *desc |= ((pi->PhysAddr >> 36) & 0x7) << 5; + *desc |= 2 | (1 << 18); + } // TODO: Apply to all entries + Log_Warning("MMVirt", "TODO: Apply changes to all entries of supersections"); LEAVE('i', 0); return 0; } // TODO: What here? + Log_Warning("MMVirt", "TODO: 24-bit not on supersection?"); LEAVE('i', 1); return 1; } @@ -631,10 +631,9 @@ tPAddr MM_Clone(void) return ret; } -tPAddr MM_ClearUser(void) +void MM_ClearUser(void) { - // TODO: Implement ClearUser - return 0; + Log_KernelPanic("MMVirt", "TODO: Implement MM_ClearUser"); } tVAddr MM_MapTemp(tPAddr PAddr) @@ -659,7 +658,6 @@ tVAddr MM_MapTemp(tPAddr PAddr) void MM_FreeTemp(tVAddr VAddr) { - // TODO: Implement FreeTemp if( VAddr < MM_TMPMAP_BASE || VAddr >= MM_TMPMAP_END ) { Log_Warning("MMVirt", "MM_FreeTemp: Passed an addr not from MM_MapTemp (%p)", VAddr); return ; diff --git a/Kernel/arch/armv7/pci.c b/Kernel/arch/armv7/pci.c index 0d25049f..2e674bbc 100644 --- a/Kernel/arch/armv7/pci.c +++ b/Kernel/arch/armv7/pci.c @@ -2,6 +2,7 @@ * */ #include +#include // Realview //#define PCI_BASE 0x60000000 @@ -9,40 +10,23 @@ //#define PCI_BASE 0xF0400000 // VMM Mapping #define PCI_BASE 0 -// === PROTOTYPES === -#if 1 -void PCI_CfgWriteDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset, Uint32 data); -Uint32 PCI_CfgReadDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset); -Uint16 PCI_CfgReadWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset); -Uint8 PCI_CfgReadByte(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset); -#endif - // === CODE === -void PCI_CfgWriteDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset, Uint32 data) +void PCI_CfgWriteDWord(Uint32 Addr, Uint32 Data) { #if PCI_BASE - Uint32 address = PCI_BASE | ((Uint)bus<<16) | ((Uint)dev<<11) | ((Uint)func<<8) | (offset&0xFC); - *(Uint32*)(address) = data; + Uint32 address = PCI_BASE | Addr; + *(Uint32*)(address) = Data; #else #endif } -Uint32 PCI_CfgReadDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset) +Uint32 PCI_CfgReadDWord(Uint32 Addr) { #if PCI_BASE - Uint32 address = PCI_BASE | ((Uint)bus<<16) | ((Uint)dev<<11) | ((Uint)func<<8) | (offset&0xFC); + Uint32 address = PCI_BASE | Addr; return *(Uint32*)address; #else return 0xFFFFFFFF; #endif } -Uint16 PCI_CfgReadWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset) -{ - return PCI_CfgReadDWord(bus, dev, func, offset & ~3) >> (8*(offset&2)); -} - -Uint8 PCI_CfgReadByte(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset) -{ - return PCI_CfgReadDWord(bus, dev, func, offset & ~3) >> (8*(offset&3)); -} diff --git a/Kernel/arch/x86/mm_virt.c b/Kernel/arch/x86/mm_virt.c index 82f8f970..e616fc71 100644 --- a/Kernel/arch/x86/mm_virt.c +++ b/Kernel/arch/x86/mm_virt.c @@ -15,6 +15,7 @@ #include #include #include +#include #define TAB 22 @@ -69,8 +70,8 @@ extern void Error_Backtrace(Uint eip, Uint ebp); void MM_PreinitVirtual(void); void MM_InstallVirtual(void); void MM_PageFault(tVAddr Addr, Uint ErrorCode, tRegs *Regs); -void MM_DumpTables(tVAddr Start, tVAddr End); -tVAddr MM_ClearUser(void); +//void MM_DumpTables(tVAddr Start, tVAddr End); +//void MM_ClearUser(void); tPAddr MM_DuplicatePage(tVAddr VAddr); // === GLOBALS === @@ -475,10 +476,9 @@ int MM_Map(tVAddr VAddr, tPAddr PAddr) } /** - * \fn tVAddr MM_ClearUser() * \brief Clear user's address space */ -tVAddr MM_ClearUser(void) +void MM_ClearUser(void) { Uint i, j; @@ -504,8 +504,6 @@ tVAddr MM_ClearUser(void) INVLPG( &gaPageTable[i*1024] ); } INVLPG( gaPageDir ); - - return *gpPageCR3; } /** diff --git a/Kernel/arch/x86/pci.c b/Kernel/arch/x86/pci.c index b5410a39..7a0a2c11 100644 --- a/Kernel/arch/x86/pci.c +++ b/Kernel/arch/x86/pci.c @@ -4,58 +4,19 @@ */ #define DEBUG 0 #include - -// === PROTOTYPES === -Uint32 PCI_CfgReadDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset); -void PCI_CfgWriteDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset, Uint32 data); -Uint16 PCI_CfgReadWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset); -Uint8 PCI_CfgReadByte(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset); +#include // === CODE === -Uint32 PCI_CfgReadDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset) -{ - Uint32 address; - Uint32 data; - - bus &= 0xFF; // 8 Bits - dev &= 0x1F; // 5 Bits - func &= 0x7; // 3 Bits - offset &= 0xFF; // 8 Bits - - address = 0x80000000 | ((Uint)bus<<16) | ((Uint)dev<<11) | ((Uint)func<<8) | (offset&0xFC); - outd(0xCF8, address); - - data = ind(0xCFC); - //Debug("PCI(0x%x) = 0x%08x", address, data); - return data; -} -void PCI_CfgWriteDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset, Uint32 data) +Uint32 PCI_CfgReadDWord(Uint32 Address) { - Uint32 address; - - bus &= 0xFF; // 8 Bits - dev &= 0x1F; // 5 Bits - func &= 0x7; // 3 Bits - offset &= 0xFF; // 8 Bits - - address = 0x80000000 | ((Uint)bus<<16) | ((Uint)dev<<11) | ((Uint)func<<8) | (offset&0xFC); - outd(0xCF8, address); - outd(0xCFC, data); -} -Uint16 PCI_CfgReadWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset) -{ - Uint32 data = PCI_CfgReadDWord(bus, dev, func, offset); - - data >>= (offset&2)*8; // Allow Access to Upper Word - - return (Uint16)data; + Address |= 0x80000000; + outd(0xCF8, Address); + return ind(0xCFC); } -Uint8 PCI_CfgReadByte(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset) +void PCI_CfgWriteDWord(Uint32 Address, Uint32 Data) { - Uint32 data = PCI_CfgReadDWord(bus, dev, func, offset); - - data >>= (offset&3)*8; //Allow Access to Upper Word - return (Uint8)data; + Address |= 0x80000000; + outd(0xCF8, Address); + outd(0xCFC, Data); } - diff --git a/Kernel/drv/pci.c b/Kernel/drv/pci.c index f75b5acb..41233367 100644 --- a/Kernel/drv/pci.c +++ b/Kernel/drv/pci.c @@ -8,15 +8,10 @@ #include #include #include +#include #define LIST_DEVICES 1 -// === IMPORTS === -extern Uint32 PCI_CfgReadDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset); -extern void PCI_CfgWriteDWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset, Uint32 data); -extern Uint16 PCI_CfgReadWord(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset); -extern Uint8 PCI_CfgReadByte(Uint16 bus, Uint16 dev, Uint16 func, Uint16 offset); - // === STRUCTURES === typedef struct sPCIDevice { @@ -44,6 +39,7 @@ typedef struct sPCIDevice char *PCI_int_ReadDirRoot(tVFS_Node *node, int pos); tVFS_Node *PCI_int_FindDirRoot(tVFS_Node *node, const char *filename); +Uint32 PCI_int_GetBusAddr(Uint16 Bus, Uint16 Slot, Uint16 Fcn, Uint8 Offset); Uint64 PCI_int_ReadDevice(tVFS_Node *node, Uint64 pos, Uint64 length, void *buffer); int PCI_int_EnumDevice(Uint16 bus, Uint16 dev, Uint16 fcn, tPCIDevice *info); @@ -339,10 +335,20 @@ int PCI_GetDeviceSubsys(tPCIDev ID, Uint16 *SubsystemVendor, Uint16 *SubsystemID return 0; } +Uint32 PCI_int_GetBusAddr(Uint16 Bus, Uint16 Slot, Uint16 Fcn, Uint8 Offset) +{ + Bus &= 0xFF; + Slot &= 0x1F; + Fcn &= 7; + Offset &= 0xFC; + return ((Uint32)Bus << 16) | (Slot << 11) | (Fcn << 8) | (Offset & 0xFC); +} + Uint32 PCI_ConfigRead(tPCIDev ID, int Offset, int Size) { tPCIDevice *dev; - Uint32 dword; + Uint32 dword, addr; + if( ID < 0 || ID >= giPCI_DeviceCount ) return 0; if( Offset < 0 || Offset > 256 ) return 0; @@ -350,8 +356,9 @@ Uint32 PCI_ConfigRead(tPCIDev ID, int Offset, int Size) if( Offset & (Size - 1) ) return 0; dev = &gPCI_Devices[ID]; + addr = PCI_int_GetBusAddr(dev->bus, dev->slot, dev->fcn, Offset); - dword = PCI_CfgReadDWord(dev->bus, dev->slot, dev->fcn, Offset / 4); + dword = PCI_CfgReadDWord(addr); gPCI_Devices[ID].ConfigCache[Offset/4] = dword; switch( Size ) { @@ -366,15 +373,16 @@ Uint32 PCI_ConfigRead(tPCIDev ID, int Offset, int Size) void PCI_ConfigWrite(tPCIDev ID, int Offset, int Size, Uint32 Value) { tPCIDevice *dev; - Uint32 dword; + Uint32 dword, addr; int shift; if( ID < 0 || ID >= giPCI_DeviceCount ) return ; if( Offset < 0 || Offset > 256 ) return ; dev = &gPCI_Devices[ID]; + addr = PCI_int_GetBusAddr(dev->bus, dev->slot, dev->fcn, Offset); if(Size != 4) - dword = PCI_CfgReadDWord(dev->bus, dev->slot, dev->fcn, Offset/4); + dword = PCI_CfgReadDWord(addr); switch(Size) { case 1: @@ -393,7 +401,7 @@ void PCI_ConfigWrite(tPCIDev ID, int Offset, int Size, Uint32 Value) default: return; } - PCI_CfgWriteDWord(dev->bus, dev->slot, dev->fcn, Offset/4, dword); + PCI_CfgWriteDWord(addr, dword); } /** @@ -424,26 +432,29 @@ Uint32 PCI_GetBAR(tPCIDev id, int BARNum) */ int PCI_int_EnumDevice(Uint16 bus, Uint16 slot, Uint16 fcn, tPCIDevice *info) { - Uint16 vendor; + Uint32 vendor_dev, tmp; int i; - - vendor = PCI_CfgReadWord(bus, slot, fcn, 0x0|0); - if(vendor == 0xFFFF) // Invalid Device + Uint32 addr; + addr = PCI_int_GetBusAddr(bus, slot, fcn, 0); + + vendor_dev = PCI_CfgReadDWord( addr ); + if((vendor_dev & 0xFFFF) == 0xFFFF) // Invalid Device return 0; - + + info->ConfigCache[0] = vendor_dev; + for( i = 1; i < 256/4; i ++, addr += 4 ) + { + info->ConfigCache[i] = PCI_CfgReadDWord(addr); + } + info->bus = bus; info->slot = slot; info->fcn = fcn; - info->vendor = vendor; - info->device = PCI_CfgReadWord(bus, slot, fcn, 0x0|2); - info->revision = PCI_CfgReadWord(bus, slot, fcn, 0x8|0); - info->oc = PCI_CfgReadWord(bus, slot, fcn, 0x8|2); - - // Load Config Bytes - for(i=0;i<256/4;i++) - { - info->ConfigCache[i] = PCI_CfgReadDWord(bus, slot, fcn, i*4); - } + info->vendor = vendor_dev & 0xFFFF; + info->device = vendor_dev >> 16; + tmp = info->ConfigCache[2]; + info->revision = tmp & 0xFFFF; + info->oc = tmp >> 16; //#if LIST_DEVICES //Log("BAR0 0x%08x BAR1 0x%08x BAR2 0x%08x", info->ConfigCache[4], info->ConfigCache[5], info->ConfigCache[6]); diff --git a/Kernel/include/hal_proc.h b/Kernel/include/hal_proc.h index f41c938c..c8079344 100644 --- a/Kernel/include/hal_proc.h +++ b/Kernel/include/hal_proc.h @@ -68,7 +68,7 @@ extern void Proc_Reschedule(void); /** * \brief Clear the user's memory space back to the minimum required to run */ -extern tPAddr MM_ClearUser(void); +extern void MM_ClearUser(void); /** * \brief Dump the address space to the debug channel * \param Start First address