From: John Hodge <tpg@ucc.asn.au>
Date: Sun, 8 Jan 2012 07:04:39 +0000 (+0800)
Subject: Kernel/armv7 - Fiddling with prefetch abort output
X-Git-Tag: rel0.14~18
X-Git-Url: https://git.ucc.asn.au/?a=commitdiff_plain;h=de37bdfbcd4814c20babda4a7198736bf0effd3e;p=tpg%2Facess2.git

Kernel/armv7 - Fiddling with prefetch abort output
---

diff --git a/Kernel/arch/armv7/start.S b/Kernel/arch/armv7/start.S
index 3f53cc2c..670989f6 100644
--- a/Kernel/arch/armv7/start.S
+++ b/Kernel/arch/armv7/start.S
@@ -203,16 +203,18 @@ DataAbort:
 .globl PrefetchAbort
 PrefetchAbort:
 	sub lr, #4	@ Adjust LR to the correct value
-@	srsdb sp!, #19	@ Switch to supervisor mode (DDI0406B D1.6.5) (actually SRSFD)
+	srsdb sp!, #23	@ Switch to supervisor mode (DDI0406B D1.6.5) (actually SRSFD)
 @	cpsid ifa, #19
-@	PUSH_GPRS
+	PUSH_GPRS
 
 	ldr r0, =csAbort_Tag
 	ldr r1, =csPrefetchAbort_Fmt
-	mov r2, lr
-	mrc p15, 0, r3, c5, c0, 0	@ Read IFSR (Instruction Fault Address Register) into R3
-	ldr r4, =Log_Error
-	blx r4
+#	mov r2, lr
+	mrc p15, 0, r2, c6, c0, 2	@ Read IFAR (Instruction Fault Address Register) into R3
+	mrc p15, 0, r3, c5, c0, 1	@ Read IFSR (Instruction Fault Status Register) into R3
+	ldr r5, =Log_Error
+	blx r5
+
 	b .
 
 .section .rodata