From: Sam Moore Date: Sun, 3 Aug 2014 12:50:10 +0000 (+0800) Subject: VFPU derpage fixed X-Git-Url: https://git.ucc.asn.au/?a=commitdiff_plain;h=e0cd98bdff7f026b92f2c0e5b08639e08b98874e;p=ipdf%2Fcode.git VFPU derpage fixed In my defence, hex and binary are only 14 digits apart --- diff --git a/src/tests/calculator.cpp b/src/tests/calculator.cpp new file mode 100644 index 0000000..89009f1 --- /dev/null +++ b/src/tests/calculator.cpp @@ -0,0 +1,43 @@ +#include "main.h" +#include "real.h" +#include +#include +#include +#include +#include + +using namespace std; +using namespace IPDF; + +int main(int argc, char ** argv) +{ + while (true) + { + double da; double db; + char op; + cin >> da >> op >> db; + + Real a(da); + Real b(db); + + Real c; + switch (op) + { + case '+': + c = a + b; + break; + case '-': + c = a - b; + break; + case '*': + c = a * b; + break; + case '/': + c = a / b; + break; + } + + cout << Double(c) << '\n'; + + } +} diff --git a/src/vfpu.h b/src/vfpu.h index 04de136..a2102f9 100644 --- a/src/vfpu.h +++ b/src/vfpu.h @@ -11,8 +11,8 @@ namespace VFPU { extern int Start(const char * vcd_output = NULL); // Starts the VFPU extern int Halt(); // Halts the VFPU - typedef enum {ADD=0x000, SUB=0x001, MULT=0x010, DIV=0x011, SQRT=0x100} Opcode; - typedef enum {EVEN=0x00, ZERO=0x01, UP=0x10, DOWN=0x11} Rmode; // Rounding mode; to even, towards zero, always up, always down + typedef enum {ADD=0x0, SUB=0x1, MULT=0x2, DIV=0x3, SQRT=0x4} Opcode; + typedef enum {EVEN=0x0, ZERO=0x1, UP=0x2, DOWN=0x3} Rmode; // Rounding mode; to even, towards zero, always up, always down typedef std::bitset<32> Register; extern Register Exec(const Register & a, const Register & b, Opcode op, Rmode rmode = EVEN); // operate with registers extern float Exec(float a, float b, Opcode op, Rmode rmode = EVEN); //converts floats into registers and back