From ecbc325cc08fb2731d1fc820a87979b75b4306bc Mon Sep 17 00:00:00 2001 From: Sam Moore Date: Fri, 11 Apr 2014 12:53:55 +0800 Subject: [PATCH] Add Makefile, change original tester to be the vfpu --- .gitignore | 1 + src/COPYRIGHT.jop | 25 +++ src/Makefile | 24 +++ src/main.vhd | 147 +++++++++++++++++ src/test_bench/fpu_wave.do | 34 ---- src/test_bench/fpusim.bat | 29 ---- src/test_bench/maketest.bat | 23 --- src/test_bench/readme.txt | 9 -- src/test_bench/tb_fpu.vhd | 259 ------------------------------ src/test_bench/timesoftfloat.exe | Bin 44226 -> 0 bytes src/{test_bench => }/txt_util.vhd | 0 src/vfpu | 1 + 12 files changed, 198 insertions(+), 354 deletions(-) create mode 100644 src/COPYRIGHT.jop create mode 100644 src/Makefile create mode 100644 src/main.vhd delete mode 100644 src/test_bench/fpu_wave.do delete mode 100644 src/test_bench/fpusim.bat delete mode 100644 src/test_bench/maketest.bat delete mode 100644 src/test_bench/readme.txt delete mode 100644 src/test_bench/tb_fpu.vhd delete mode 100644 src/test_bench/timesoftfloat.exe rename src/{test_bench => }/txt_util.vhd (100%) create mode 120000 src/vfpu diff --git a/.gitignore b/.gitignore index 365a631..b7bbba4 100644 --- a/.gitignore +++ b/.gitignore @@ -5,3 +5,4 @@ *.test *.out *.err +*.cf diff --git a/src/COPYRIGHT.jop b/src/COPYRIGHT.jop new file mode 100644 index 0000000..6b82061 --- /dev/null +++ b/src/COPYRIGHT.jop @@ -0,0 +1,25 @@ +-- Author: Jidan Al-eryani +-- E-mail: jidan@gmx.net +-- +-- Copyright (C) 2006 +-- +-- This source file may be used and distributed without +-- restriction provided that this copyright statement is not +-- removed from the file and that any derivative work contains +-- the original copyright notice and the associated disclaimer. +-- +-- THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY +-- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +-- TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +-- FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR +-- OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE +-- GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +-- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +-- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT +-- OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +-- POSSIBILITY OF SUCH DAMAGE. +-- + diff --git a/src/Makefile b/src/Makefile new file mode 100644 index 0000000..71fe9e2 --- /dev/null +++ b/src/Makefile @@ -0,0 +1,24 @@ +#Makefile for a VHDL FPU based on https://github.com/jop-devel/jop +GHDL = ghdl +GHDL_FLAGS = --std=93c --ieee=synopsys -fexplicit +OBJ = fpupack.o pre_norm_addsub.o addsub_28.o post_norm_addsub.o pre_norm_mul.o mul_24.o serial_mul.o post_norm_mul.o pre_norm_div.o serial_div.o post_norm_div.o pre_norm_sqrt.o sqrt.o post_norm_sqrt.o comppack.o fpu.o txt_util.o + +RM = rm -f + +BIN = ../bin/vfpu + +$(BIN) : $(OBJ) main + mv main $(BIN) + +% : %.o + $(GHDL) -e $(GHDL_FLAGS) $@ + + +%.o : %.vhd + $(GHDL) -a $(GHDL_FLAGS) $< + +clean : + rm -f $(OBJ) + rm -f main.o + rm -f *~ + rm -f $(BIN) diff --git a/src/main.vhd b/src/main.vhd new file mode 100644 index 0000000..99596ee --- /dev/null +++ b/src/main.vhd @@ -0,0 +1,147 @@ +-- Simulates the fpu by reading signals from stdin and writing results to stdout +-- See COPYRIGHT.jop for the original copyright notice. + +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_unsigned.all; +use ieee.math_real.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_misc.all; +use std.textio.all; +use work.txt_util.all; + + -- fpu operations (fpu_op_i): + -- ======================== + -- 000 = add, + -- 001 = substract, + -- 010 = multiply, + -- 011 = divide, + -- 100 = square root + -- 101 = unused + -- 110 = unused + -- 111 = unused + + -- Rounding Mode: + -- ============== + -- 00 = round to nearest even(default), + -- 01 = round to zero, + -- 10 = round up, + -- 11 = round down + + +entity main is +end main; + +architecture rtl of main is + +component fpu + port ( + clk_i : in std_logic; + opa_i : in std_logic_vector(31 downto 0); + opb_i : in std_logic_vector(31 downto 0); + fpu_op_i : in std_logic_vector(2 downto 0); + rmode_i : in std_logic_vector(1 downto 0); + output_o : out std_logic_vector(31 downto 0); + ine_o : out std_logic; + overflow_o : out std_logic; + underflow_o : out std_logic; + div_zero_o : out std_logic; + inf_o : out std_logic; + zero_o : out std_logic; + qnan_o : out std_logic; + snan_o : out std_logic; + start_i : in std_logic; + ready_o : out std_logic + ); +end component; + + +signal clk_i : std_logic:= '1'; +signal opa_i, opb_i : std_logic_vector(31 downto 0) := (others => '0'); +signal fpu_op_i : std_logic_vector(2 downto 0) := (others => '0'); +signal rmode_i : std_logic_vector(1 downto 0) := (others => '0'); +signal output_o : std_logic_vector(31 downto 0) := (others => '0'); +signal start_i, ready_o : std_logic := '0'; +signal ine_o, overflow_o, underflow_o, div_zero_o, inf_o, zero_o, qnan_o, snan_o: std_logic := '0'; + + + +signal slv_out : std_logic_vector(31 downto 0); + +constant CLK_PERIOD :time := 10 ns; -- period of clk period + + +begin + + -- instantiate fpu + i_fpu: fpu port map ( + clk_i => clk_i, + opa_i => opa_i, + opb_i => opb_i, + fpu_op_i => fpu_op_i, + rmode_i => rmode_i, + output_o => output_o, + ine_o => ine_o, + overflow_o => overflow_o, + underflow_o => underflow_o, + div_zero_o => div_zero_o, + inf_o => inf_o, + zero_o => zero_o, + qnan_o => qnan_o, + snan_o => snan_o, + start_i => start_i, + ready_o => ready_o); + + + --------------------------------------------------------------------------- + -- toggle clock + --------------------------------------------------------------------------- + clk_i <= not(clk_i) after 5 ns; + + + mainloop : process + --The operands and results are in Hex format. + file input_file: TEXT open read_mode is "STD_INPUT"; + + variable file_line: line; + variable str_in: string(8 downto 1); + variable str_fpu_op: string(3 downto 1); + variable str_rmode: string(2 downto 1); + + + + begin + -- Read ops from input_file + start_i <= '0'; + while not endfile(input_file) loop + + wait for CLK_PERIOD; + start_i <= '1'; + + str_read(input,str_in); + opa_i <= strhex_to_slv(str_in); + + str_read(input,str_in); + opb_i <= strhex_to_slv(str_in); + + str_read(input_file,str_fpu_op); + fpu_op_i <= to_std_logic_vector(str_fpu_op); + + str_read(input_file,str_rmode); + rmode_i <= to_std_logic_vector(str_rmode); + + str_read(input_file,str_in); + slv_out <= strhex_to_slv(str_in); + + wait for CLK_PERIOD; + start_i <= '0'; + wait until ready_o='1'; + + + print(hstr(output_o)); + + end loop; + wait; + end process mainloop; + +end rtl; diff --git a/src/test_bench/fpu_wave.do b/src/test_bench/fpu_wave.do deleted file mode 100644 index 51181b0..0000000 --- a/src/test_bench/fpu_wave.do +++ /dev/null @@ -1,34 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_fpu/clk_i -add wave -noupdate -format Literal /tb_fpu/opa_i -add wave -noupdate -format Literal /tb_fpu/opb_i -add wave -noupdate -format Literal /tb_fpu/fpu_op_i -add wave -noupdate -format Literal /tb_fpu/rmode_i -add wave -noupdate -format Literal /tb_fpu/output_o -add wave -noupdate -format Logic /tb_fpu/start_i -add wave -noupdate -format Logic /tb_fpu/ready_o -add wave -noupdate -format Logic /tb_fpu/ine_o -add wave -noupdate -format Logic /tb_fpu/overflow_o -add wave -noupdate -format Logic /tb_fpu/underflow_o -add wave -noupdate -format Logic /tb_fpu/div_zero_o -add wave -noupdate -format Logic /tb_fpu/inf_o -add wave -noupdate -format Logic /tb_fpu/zero_o -add wave -noupdate -format Logic /tb_fpu/qnan_o -add wave -noupdate -format Logic /tb_fpu/snan_o -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {16182 ns} 0} -configure wave -namecolwidth 255 -configure wave -valuecolwidth 317 -configure wave -justifyvalue left -configure wave -signalnamewidth 0 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -update -WaveRestoreZoom {0 ns} {544 ns} diff --git a/src/test_bench/fpusim.bat b/src/test_bench/fpusim.bat deleted file mode 100644 index f77b287..0000000 --- a/src/test_bench/fpusim.bat +++ /dev/null @@ -1,29 +0,0 @@ -set REL= ..\ - -vlib work - -vcom %REL%fpupack.vhd -vcom %REL%pre_norm_addsub.vhd -vcom %REL%addsub_28.vhd -vcom %REL%post_norm_addsub.vhd -vcom %REL%pre_norm_mul.vhd -vcom %REL%mul_24.vhd -vcom %REL%serial_mul.vhd -vcom %REL%post_norm_mul.vhd -vcom %REL%pre_norm_div.vhd -vcom %REL%serial_div.vhd -vcom %REL%post_norm_div.vhd -vcom %REL%pre_norm_sqrt.vhd -vcom %REL%sqrt.vhd -vcom %REL%post_norm_sqrt.vhd -vcom %REL%comppack.vhd -vcom %REL%fpu.vhd - -vcom txt_util.vhd -vcom tb_fpu.vhd - -pause Start simulation? - -vsim -do fpu_wave.do tb_fpu - - diff --git a/src/test_bench/maketest.bat b/src/test_bench/maketest.bat deleted file mode 100644 index 6500bb2..0000000 --- a/src/test_bench/maketest.bat +++ /dev/null @@ -1,23 +0,0 @@ -timesoftfloat -nearesteven float32_add > testcases.txt -timesoftfloat -nearesteven float32_sub >> testcases.txt -timesoftfloat -nearesteven float32_mul >> testcases.txt -timesoftfloat -nearesteven float32_div >> testcases.txt -timesoftfloat -nearesteven float32_sqrt >> testcases.txt - -timesoftfloat -tozero float32_add >> testcases.txt -timesoftfloat -tozero float32_sub >> testcases.txt -timesoftfloat -tozero float32_mul >> testcases.txt -timesoftfloat -tozero float32_div >> testcases.txt -timesoftfloat -tozero float32_sqrt >> testcases.txt - -timesoftfloat -up float32_add >> testcases.txt -timesoftfloat -up float32_sub >> testcases.txt -timesoftfloat -up float32_mul >> testcases.txt -timesoftfloat -up float32_div >> testcases.txt -timesoftfloat -up float32_sqrt >> testcases.txt - -timesoftfloat -down float32_add >> testcases.txt -timesoftfloat -down float32_sub >> testcases.txt -timesoftfloat -down float32_mul >> testcases.txt -timesoftfloat -down float32_div >> testcases.txt -timesoftfloat -down float32_sqrt >> testcases.txt \ No newline at end of file diff --git a/src/test_bench/readme.txt b/src/test_bench/readme.txt deleted file mode 100644 index 2511475..0000000 --- a/src/test_bench/readme.txt +++ /dev/null @@ -1,9 +0,0 @@ -To test the FPU core, do the following: - -1) Build timesoftfloat.exe for your specific platform(read instructions in folder SoftFloat for howto do that). - Before you do that, try the already included file. - -2) Create the testcases by running maketest.bat in folder test_bench. Default value is 100000 cases for each - arithmetic operation and for each rounding mode. This comes up to 2 million test cases. - -3) run fpusim.bat to simulate and test the FPU core using modelsim. \ No newline at end of file diff --git a/src/test_bench/tb_fpu.vhd b/src/test_bench/tb_fpu.vhd deleted file mode 100644 index 9a9f78f..0000000 --- a/src/test_bench/tb_fpu.vhd +++ /dev/null @@ -1,259 +0,0 @@ -------------------------------------------------------------------------------- --- --- Project: --- --- Description: test bench for the FPU core -------------------------------------------------------------------------------- --- --- 100101011010011100100 --- 110000111011100100000 --- 100000111011000101101 --- 100010111100101111001 --- 110000111011101101001 --- 010000001011101001010 --- 110100111001001100001 --- 110111010000001100111 --- 110110111110001011101 --- 101110110010111101000 --- 100000010111000000000 --- --- Author: Jidan Al-eryani --- E-mail: jidan@gmx.net --- --- Copyright (C) 2006 --- --- This source file may be used and distributed without --- restriction provided that this copyright statement is not --- removed from the file and that any derivative work contains --- the original copyright notice and the associated disclaimer. --- --- THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY --- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED --- TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS --- FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR --- OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, --- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES --- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE --- GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR --- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF --- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT --- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT --- OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE --- POSSIBILITY OF SUCH DAMAGE. --- - -library ieee; -use ieee.std_logic_1164.all; -use ieee.std_logic_unsigned.all; -use ieee.math_real.all; -use ieee.std_logic_arith.all; -use ieee.std_logic_misc.all; -use std.textio.all; -use work.txt_util.all; - - -- fpu operations (fpu_op_i): - -- ======================== - -- 000 = add, - -- 001 = substract, - -- 010 = multiply, - -- 011 = divide, - -- 100 = square root - -- 101 = unused - -- 110 = unused - -- 111 = unused - - -- Rounding Mode: - -- ============== - -- 00 = round to nearest even(default), - -- 01 = round to zero, - -- 10 = round up, - -- 11 = round down - - -entity tb_fpu is -end tb_fpu; - -architecture rtl of tb_fpu is - -component fpu - port ( - clk_i : in std_logic; - opa_i : in std_logic_vector(31 downto 0); - opb_i : in std_logic_vector(31 downto 0); - fpu_op_i : in std_logic_vector(2 downto 0); - rmode_i : in std_logic_vector(1 downto 0); - output_o : out std_logic_vector(31 downto 0); - ine_o : out std_logic; - overflow_o : out std_logic; - underflow_o : out std_logic; - div_zero_o : out std_logic; - inf_o : out std_logic; - zero_o : out std_logic; - qnan_o : out std_logic; - snan_o : out std_logic; - start_i : in std_logic; - ready_o : out std_logic - ); -end component; - - -signal clk_i : std_logic:= '1'; -signal opa_i, opb_i : std_logic_vector(31 downto 0); -signal fpu_op_i : std_logic_vector(2 downto 0); -signal rmode_i : std_logic_vector(1 downto 0); -signal output_o : std_logic_vector(31 downto 0); -signal start_i, ready_o : std_logic ; -signal ine_o, overflow_o, underflow_o, div_zero_o, inf_o, zero_o, qnan_o, snan_o: std_logic; - - - -signal slv_out : std_logic_vector(31 downto 0); - -constant CLK_PERIOD :time := 10 ns; -- period of clk period - - -begin - - -- instantiate fpu - i_fpu: fpu port map ( - clk_i => clk_i, - opa_i => opa_i, - opb_i => opb_i, - fpu_op_i => fpu_op_i, - rmode_i => rmode_i, - output_o => output_o, - ine_o => ine_o, - overflow_o => overflow_o, - underflow_o => underflow_o, - div_zero_o => div_zero_o, - inf_o => inf_o, - zero_o => zero_o, - qnan_o => qnan_o, - snan_o => snan_o, - start_i => start_i, - ready_o => ready_o); - - - --------------------------------------------------------------------------- - -- toggle clock - --------------------------------------------------------------------------- - clk_i <= not(clk_i) after 5 ns; - - - verify : process - --The operands and results are in Hex format. The test vectors must be placed in a strict order for the verfication to work. - file testcases_file: TEXT open read_mode is "testcases.txt"; --Name of the file containing the test cases. - - variable file_line: line; - variable str_in: string(8 downto 1); - variable str_fpu_op: string(3 downto 1); - variable str_rmode: string(2 downto 1); - begin - - - --------------------------------------------------------------------------------------------------------------------------------------------------- - ---------------------------------------------------SoftFloat test vectors (10000 test cases for each operation) -------------------------------------------------------------------- - start_i <= '0'; - while not endfile(testcases_file) loop - - wait for CLK_PERIOD; start_i <= '1'; - - str_read(testcases_file,str_in); - opa_i <= strhex_to_slv(str_in); - - str_read(testcases_file,str_in); - opb_i <= strhex_to_slv(str_in); - - str_read(testcases_file,str_fpu_op); - fpu_op_i <= to_std_logic_vector(str_fpu_op); - - str_read(testcases_file,str_rmode); - rmode_i <= to_std_logic_vector(str_rmode); - - str_read(testcases_file,str_in); - slv_out <= strhex_to_slv(str_in); - - wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1'; - - assert output_o = slv_out - report "Error!!!" - severity failure; - str_read(testcases_file,str_in); - - end loop; - - -------- Boundary values----- - - start_i <= '0'; - -- seeeeeeeefffffffffffffffffffffff - --infinity - wait for CLK_PERIOD; start_i <= '1'; - opa_i <= "01111111011111111111111111111111"; - opb_i <= "01111111011111111111111111111111"; - fpu_op_i <= "000"; - rmode_i <= "00"; - wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1'; - assert output_o="01111111100000000000000000000000" - report "Error!!!" - severity failure; - - -- seeeeeeeefffffffffffffffffffffff - -- 1 x1.001 - 1x1.000 = 0x0.001 - wait for CLK_PERIOD; start_i <= '1'; - opa_i <= "00000000100100000000000000000000"; - opb_i <= "10000000100000000000000000000000"; - fpu_op_i <= "000"; - rmode_i <= "00"; - wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1'; - assert output_o="00000000000100000000000000000000" - report "Error!!!" - severity failure; - - -- seeeeeeeefffffffffffffffffffffff - -- 10 x 1.0001 - 10 x 1.0000 = - wait for CLK_PERIOD; start_i <= '1'; - opa_i <= "00000001000010000000000000000000"; - opb_i <= "10000001000000000000000000000000"; - fpu_op_i <= "000"; - rmode_i <= "00"; - wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1'; - assert output_o="00000000000100000000000000000000" - report "Error!!!" - severity failure; - - - -- seeeeeeeefffffffffffffffffffffff - -- -0 -0 = -0 - wait for CLK_PERIOD; start_i <= '1'; - opa_i <= "10000000000000000000000000000000"; - opb_i <= "10000000000000000000000000000000"; - fpu_op_i <= "000"; - rmode_i <= "00"; - wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1'; - assert output_o="10000000000000000000000000000000" - report "Error!!!" - severity failure; - - -- seeeeeeeefffffffffffffffffffffff - -- 0 + x = x - wait for CLK_PERIOD; start_i <= '1'; - opa_i <= "00000000000000000000000000000000"; - opb_i <= "01000010001000001000000000100000"; - fpu_op_i <= "000"; - rmode_i <= "00"; - wait for CLK_PERIOD; start_i <= '0'; wait until ready_o='1'; - assert output_o="01000010001000001000000000100000" - report "Error!!!" - severity failure; - - - ---------------------------------------------------------------------------------------------------------------------------------------------------- - assert false - report "Success!!!.......Yahoooooooooooooo" - severity failure; - - wait; - - end process verify; - -end rtl; \ No newline at end of file diff --git a/src/test_bench/timesoftfloat.exe b/src/test_bench/timesoftfloat.exe deleted file mode 100644 index 1f747bf9730a69e8db17f8b4a8fa9136343f3aac..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 44226 zcmeIb4SW>U)jvKPf@CE)QL)k%&03)~R*+~!Q&3i6thOvrVb!W@46s0ymo(W$w658> zyPA21XllXwJk^Rn(bDIk4`~}ET7=ysCIJx=LLs~qmKSlBjk16x;icK%_uME_d?qvZ+I!T>=KGI7P@f>4h;{jBWoh5vYweM#;I zmk4#{Pp+vqP5$JX8S_fYEv03P=9U#Nu*@o6xNwonGSg`(b1$@%EVN9TI^D8h(QN1F zAww=6p`o583BqL4Kw;*Md6NXcApFWC2w`E+fWfAW+l2WjG!$0`t{m<1;!f028gQZ; zRoERjK?vdkuzReD^-B;eyew6qI{0Zfo~RXsd4&JJ`8V3-T;f8TZI9y*5k!5Z&KQ0c zL3nKR>|$3jU>5467Z=f5ip%h`qSvF#ctOh$WYplg1Xmd@!_NxFjh{m=9N%Q#?{KlOEG`3}e46joS;K+t8{yvx%ou9bR6 z24nH~99d$CArqh^D6wlnZ%gI~!DSWHYvu~V#>Se|AMibJ|8!qhwk*Z!ijf%aMCR;he%Y@rCD+Bd)b&DUK{fQpL4)H5AQ}w}jLjaZRhZ z=7hMWLtN8oYL{C9GBp;qmtR!bNE1JFASXWv{H861TNGQD_;S$Hn72DWn0LI;O{u(w zz&5#K$-SY2)L10Pyot5AI8ScN-`3r2mQ=LoYs!B3(IQ7mghog`zsgV-UUujcG zFGhD(zehu>xU)h>a;g^#)$6`P>B$g$AE)~}KYA(E*88)9)nz&@Lcz8;ulY6q@^<* zjXWbuf5-uCG#sh{`Rr$W%$)>Msc}d_dQJ(htGu2s1^2C9&tC+&)14v5d`(#oKZ*`B`SE(X z0d_?xTU;-F>DnI%y7wgIsXBYC+*v*Jn}zLVErpxpSXrp>q};jqk8&)!miU3mM;%f9 zkbvk*@+snvEqi+Y9`K+#(~QyDA76ZFV4FLu@<2Q;3a){FWF03t(fBzX64Fe>J`?2K@^ROvR2+;x?7mX5t56Xr ziehpbD=2S5e}nE%ll*Uy!e~zb-s;S;ibpkVD{LtLDWJqf40M>V`h)K37HKalD0Nj2 z9jn+>Q?Rh1>=JQVFn?R&$KuNkfi~A5l+mi~<&FD;VqhA2S$Let6`!->Sw4Z@pbwE- zk*LwfcjdWwJTj0N!Z7Y<7)AfnfJ7EjLF0I2fqQZzIUt$o!#x%?2>I+`N6)cVnI3=Gk?SAT2onPRu z1?{SnpcC<&MbEe48AA(Am|G3I$Xk&g^m=v(;5@aN*C4mi>fpUS2kn@erF!Hv_2Uaz=HUqLma-^Ud$&$K})j^G_b~)A& z#=-&VfP6N$Jk(E!kNUcO?i?o?;Oni5QBDpk@EmDwREm9M|kv)r49o?#=o$jmiH$uFJ zk$8)N>oH#-_8H=`P#_M@TS6qrgT&{5hSHE^a6^3Q78DZw7vV2vS>Tl7fW5Q&sh>7W z8w5>G3^F46e~E&~Gs&KMh)T?RAh)|y415BpyjyXsmV0G)PW~ycXM-TyvoUa@|2Kr% zlLHC@FXNHPqra6ZoJOaT^B2wY#shKpbpJ-zLvrWD!bVsj@@@#2Nm{K)t08#RnG>Mr zFthACy0=}kn_B5$B7bD4?5I_2t0DWQn5k8k>J)pOBGvkurZJmHn_d2m?srhiyo(Di z=3#Sm1Fa{$t&tAM7AFI%Pp$w)FrDQ)3*FV=hlm$LU->tR{vYG6&%dVb>O+~B=mOK^1DW+eefS=VMe^}SpR;FAku{qW zc?d9HPj1B|#lBixzfs=Tairs5Rj4CsrV;Ll<_CQqXbvcY=Ex-|OWksPFMlKJRp1st z0&&+pzcWRyXNWBFJ|J>kVczfSnEE(jqT znppleH(g?M-8M{XDLZfqrp*nID=3>|dEGF;vG`}95ZM4UzlV;HR|68V~L zU~+_N$GJ8*YHo{u#I^yLLhEBx35ZAJR!N7tq4GOjlYO4f+=>}MeMpw}%Fvy*z0~Sq zxw9jTL}v$3P|j{}0$f!YSCMVU=Hakn+l#G-Y|D<2IZ-3qQLaTgOr41S8JI1y{jluV z>$(Qd6J)zuF&rol$(=rDXD&yNmO7#+lD{pw0)?!yqGY*AnQI!$e#LxrZ5RvgBc%(!&cG19VyIG=uAPiqepDU4Z~-j8%0Qin{(lDqtf2jBMUuyieo(qyK2f;| z11oeKBouB;99Wyla)BUMiVXiVy&K(wO$~|tRQK*^oA0dW*+&#sw##QQ znK42KnRp}FaTI&+L7KJ|-y1?^7?kc?f#6gBVhY{`hkD`b#Y%(=OX5cA>pRkR|^p$rKKR@e-pT7cL@N>zJIS*a8>HNFmgvP(2 zM*d-WBz1flXB;!EHCgIQqbA?Jv(G*|j(E{acE4BfIk)GAj%0OrR)ypf9Y-0v+d7T} zP9>PZ*!sV^JEOlMHD*4W$Uqy|`zK8Pgnd-mwUoL+o0BZsnP9YHa(9aa(+&%OdZm1_ zMIu)OgsC-jEVo6fqD18(;)mSRB2jIj@-&G_i{zz5i{z)9jFsB9s!Do;+rOBYKZ5og zfqC_Yh6E&Wf-uQsX{lmgsz_DL;FeZb+gD+CgxPg3rmA9Fg;n8RpiA42VlS{8C_>?@ zfGc!hs4RIyM+XpBr4`hWY+ni7)qaxd+u&wUB(H4uD|WwT)(7^u7GnRZ9)|OVb{j7+ z@`Lz`z5!*GRF7$IuWyms2o?&P8SZtVBUj1xPT39{5;tix^lM1XhM_IHYt3zND)wN_ ztfS6JwTV4a9W~0k&zNiMzP8LRQ|!wWsfG&bvb6CSme6^SO>IBQ?NPRSAxjj47Q-lE zrdOV&ZN{^?n#lQAQYTKp{KV`t7@!cTit*U3$tN&{4v6copt(aha<%E?J7W_4WbBDA zV*UxfGZ~_vj5!#c=wS3ewO!Bqq)qa6Z6MY{7C-X`tEa}@cDV;`mWDvPJF|P|HD|Cd z*;IH!^e+be8hTKZY7uugv#I5$ogVD)SZa1eM*m@MzAK*$MRUhzxJF~lR#gwZB>L8P z)7OI|F)KFEHbn47E(HR>wsmi-JV@Y(006cF0cssJ*#0K4O$^+GG}s^p^6;Q(O8-@O zhUzA90Xpx5NCQj(=6~{a&7+CY0>g;82_W~FBv1{#ye^g%c*`(T+~JWl4MImQB7@1% z1l?gfj0^^qrC?rT=)gr-4M5Y2@1S6%r-^A-KRNVZU12~LSK5g67MPV-3j%u-sm^u1 z?`*F4(%S%6?ZSf7;5&r#@m^_JsIFDA7Cn)xB>Mqfl9Lp*mYqC?p;$u7f%s7o&lyH?R zo+en(i$P^|=GQ{%McA-mvCOT`%!vLvK@{IlhVF`1ReFNdQP)gGYJzT_1{@QyF2=fd zyT0i=lUp&bs+~HeR_&4-I*!12AnS~*mat+E%FU6{7@NWFI=Lq@2TvdtovdDZ5l~tq z*U=b4IijQPaP&9$6WA#Ch=Dt3Jm13_&TLq3MPx7l8tUlV3Ht&5#RtguQz4L*_XsAk z;@C?gjU|{XxzK?@FbqP624S2P*inw4Y+J{sTo1+)W8A9`ab7dVJ#gyTrz*)Oh#k)c z{Ka|~ps@qhQ_vyoelVop@%3UziE7w+`!J+@3!FBji?KThD`-!uBQKgjwiRk)Nk5Yp zqOtq|4dyTmrmyJ{W;cpU*&6RS%qc)0Tu;MLez4F{SN733N1gcGdf@TiPIDf+1MJuz zd6)}5?b+p1T>7kR$iopfBhe&DEcG1NUQtg+lg-t@n4$U4ltA>~h9y>Vxsf=YS?S7G2KShAq4l76VU!FhY?c8|zR(cO59H_CI``n#S`7 zT_QBmccFxCfyeezc=OS;^=DQ=ZJJ8XeWWH*>OG{QF+u~#-2_=lkbOwqOQ}~V)u!q5 z>DXA1RZn(WBo}J7xqe4=xC0(7LE#)oep)1YmSR+Hi>K6 zOdsPc1E)g`g&*T|sDVypLWgiVWZGA_5B?BSgRX_)&oc#=WcgaWa)a#IOQd7Js@V6c z$1vYgx*(rY?459ke@*K)xgmU>?O345?sZ~u?@>R1A)QhQG=n9F20J=k_YiVJCRpTv zVdSl7WQ9b36Na~1Qme5iB|dFeZy*wMK1Gfod$4VL^gYM~sU@`mt&Y|sq^LYAEwINpOFUcCrI8xcvkmvzbKQp6;#+DZ?%-}D{t()?*_;l9R~Es zXShTi=WCEIaVj?`uva6YlWp9@YlR|XmYQtq8q>h#3<4+m??G>MQG1+3ZKK=H`I-m5 z!kPmNbY~Jzp8AyLBa=VITixYgkiYHfcAVl7U(ue_X_UV`qJJ2WDef+LcixHWyF5(l zI+?V|AuN>;Id~;x8)P?DxseIsfh?S&VP9yAm5J>OI(-e#!p#6FhfpfE?Kq*!W-=ec z*^}Jt3s3O%WIPE=AttWf!9;gET(4k2j=UAeoa}`2%-=fUR83n8w~`n)%BSgovwIhF zPUbZ%DTiEdWPT+k$puW3N20qrANUm2ML5t7!C|a)l|g=(2zMVgmWK4Y#OM)je<_|$ ztZ$DJYQhHrrgc@p4z_iQX;)zgB$1!74Qo+@DANwV|GXue*>+Ty04;uaP+qv1p1J{me`gE4)Wna!1F$ZVjM+dmhA$BYQk zA0QzQy03k-5T3fp2RHRg*0~Y z^JxVqRy)aZfbKk$CGW~>fsagArDWVeLSd7LRbzk;M^}y}@fDnzivc1MPQmDnvJIXv zY)i4J%nd`Jp+~WUT0Efou3p7`7?$3#t7#{bfdhKj@(|04Pkb#FNGIED8EPNc->3Hb z7Ggz1-f2+YaWwP=PD|UPV3fF~0ei2GLwSwzuDkM1K6M(btj-)92tM`1ItmvdH=4%a+Ct{F6Jo78TY%ZY+8 zXR}<#k|5!wqc#}J`xZ3>!DP-xaeS&*45u|42*x9>l?B=CU=^TivcG9hBXBz zm>b>LrpIV~a~(-&JqXTz%reD|!iE2^m_7#CkKgUNv} zT;b~(_~g^RUX%FzNem7JRjh5suGPI*!R9s4m$9WxiM5WrE*O zTYbgn)}SI^dmVcV!5-{CXaVltleZHdS9na%_&j@Qmk0IrsChRYphL_tMuB`HKiGb> zyBVG2`#@$fv*pnq&JU_Tq&^u~kK))?cUz z*jr?&s$WMTw(2$m0kcw{oW!(FIcc4T`LmCnr{YaUJMYJ?E)(8S^6$4naC(ET>xuXDFg<@`;cl1Nyt_K{GH4TiY=Kx0I{dF=@fY0< zWC^;qz~WJZ`^ZOxMH@udv1eDd-scfWKa?Lt#qLH{S_k=24D{tcGm`xRy%;Yh7V;~4m;G3`7wKgwvvnM9K78arK4Mt}6M#=`{7J$s4f zWchTOJ6V2oAMuaTy^`o247z{GDP0DlYxtv_<`1O(h{kT5izddK78H#4o%wqTH(|Ut zY2&TOYxEs&oqv-VEe}%xwyJiA*yyg+^KZ~-)%7ddztDKkN*V96{>S^#e#V>R&x*Em z`72=0N%>p3Cmw$k@`u0~&QA9y#-`lMHF-{zgXN5gtUa*w1ziqO?T3E)W7Xxi)YypV ze-`peeR2)cWk6&ykksdL>>)-YpH}tMtrC!~cgw+^lim7cH=kCCcp$BFEyi};OOyCn z|6bGO{O7DktVQ%M(0~7YU6W~jv1ilbhV`Xg-ie)HC^8hMFj5oDa-3jS!pIT@c@sR4 zl}9hngd@(;D))+2Loh=tPhSmy_>xMK6#+F(RqZesa)gf0aJ1j-c0grT_9D+KAAhn` ze2=+X{jeAUfMMCM$_Eawrxn3gVn7BA;T)~-8C5BiztNQm#Z(9v&ScGfnxf2Wx_5UR z@g2-Xdd2ncA9yE{I^X&4UwV&<*rqKdUm z4n^uw9|!c+KQh6J#!j$Z43PUqZu5nEW%x-BM}Esnh~1r$?*VBad)P4EaN@ShJ3uBM zZ_hbxykQDqyjwBeqx9kK7OUvIhYxqf9L3#K6`}*G90A8sM`)CYm^Q}64C0-g4I}Xq z!bijSJ;O0g$_R9Kb{ymfTo^@LlX+9LPU9zMw5wbn$8|gTI3}upJ&3acHl{3It@3m) z*j{m!`S@U4)A^2mJNyVx9pRYp-H=2lD|sa6iTuZ4NKrt)YdNfVr%KZQm>=MlrEon*;vjz-#N!aHcI zjczmVa?RBJUlTf+W?2YN-zvm`92*)sfE~z}vMq>X9USV=#=0#O&IT&DHq9&;&Ty!+ zj-TtuT_M%%fOFg2K(3Zxh1^DmIBOC^fCBJS@K7k^=|gqt4mdsieb*;n*MrR8gjJRu zBAjiJIzhe=iVoGz%CRW|le8nJ%CmGL-6GNPEVkWQsc}2$p*pa;sPH;|tK~O3P!OIi zs62ZUDXJHJj1rdh9WH@P?x{6OrEA-zR4$Ga-MemNnFo@-dJFbeqz*v z6QdCsgnR=2V*d^=6)?9*i~@N7z#%%6up@S+F8VSw0&<1-X=>%+90NfDq&)>0UM5Z5>i)_P%sw#A3btxG-y zdOBo>N)!bs4zbYFg&he^rMdV6f0=X`?t>)?j{V6Q($#(xhm?g4K%}DyU=`|euSLP` zwrg-AqRI`?-=KW^QPUZ@?V3(=%$?OuQ3Hps*@W2A$Qe?FXDE(W6wEkzyPDDk*cT&! z0h@L8@joF=@snm`Aj}eTTfQH((5@%*vOA%s2KWy2VrLbx0!m%HigN90WDHLSUS$=# zbpK!*4ws~^$a8?wh`j-ZXi|w2EgtOPr86mNb2&T?Fb|3~*;b@BCfKnJihVmP;6ec! z*#_Jzne2&y_wa1&(K|?MbB0S6+*q***zS`n%Cu0}0@t&NW)8$5fSPq4fBionBh~&v`kycSl&@Ko;X^~b_0_Fl{ z7nC6B87Z49!WQXO%7eQPD+`Wzd-BkE3UYxQ$#4+a!s3e#2()5bhQk}whd)R3f0INV z>bDW)Ds45i++fSDX->sf1HW@s=+rKR$PwE;8u+gi2aeK~ zQH5p`jD*dk%CK_TJ58Gko4Kq_MZ`Sx0>z{`+7^H3`!Ygzq4wIp$Pb!N$o9=4tQ0%i zqqG-A0aDT->}8<}>uC=LhcM|~#5Ez5DS%~)I9l1nVha$w%e)G(M|c$BJs?pdn@%}{ zfu?OyBPX<+5M_we-%7{RwLnmO|iYk4xi;yz8;H=fZiJTAMAAqMSJ$^Ea0rh z5OB69e_P}hkR$KY0@U)ibwnfA0>T$Z1T%sZtb&1;h$P!GENqC`^CKZth2Sn^;gD6f zU%MsQ0ZVQf8*9bml^vb3W0~yPF7J$7Omoy$gJ3!-%M87+EV3IAeSLv{%R*xqp}jX) zUNIk*-meit=UE1Re+GU>&HI5__IP@qVv8=Yd{ zS>PiMX_G>+uL6r`dLkNPH3A|dQA|G+CpPT^cEo)-{9seXFhsKaTJ8l$|2sywcW@}{L>ClmjakvXdw)(XeX$7&|+zb}BNGs_Xb_&-7h!hMRM9IBcNj9^Q zYi{s))BIzO$K+NbYNvcWuO)AnzFOsl;JmAz_7~;~#416SmI-s%*Yu2btUMJh zC1@vGghc>|e%hrJo&fdF9iyim;&Ue`Q(A>^%)+*^SJ1+9M*z`|oHeH6u`Jap=95X8Qgr=}{|DG~i4l$=3(K6n*hVBwVBub21?rk!O%Q*uKg=mB`oDEKDdZjDjZe zYl{6fMS3-|AN723i|cM*d_u)dkXAAzSxj0@#}V_sq!h9(BRQ1dl0l^FE3rc> z0urWjl34IRLUJP$kY@70_7~)Fqa_CR3v^AkVjD_PPiGZ-4%?x@B)hHAH4^cm;`&Bd zIar%v*k`AO5pBcDCZGBng@)jGBjr5cAJ_ixyZ?^%M}f%n_MzV@yU3u22eSolQ_zzq zhZ!3LrI&l4N)dTPs?383xVq36L$Mgbo|J|{!$I3f$A&e4kXG><3jl<{NP5My8tXun{bSL87dC9Vgg=jGIGtz8 zt%IdH_qU*BKGx$4X!+Y+35DkXjru=N2=)hXWYl*aOnRe0{wm+l}tvn{cfL1jO>|j}g{pSUYFMwGJ;p z9IGj&px+--OLE{5hLoN|U*yQ|K1e{kY5Fm>$l4OuoJC{$Tc_#GDa)ybek|LpaD3Io z3sX;FkMbcgQ4Y+&U$jq$q%q}P&e)G-_7)iME3b3j?NC_z;+m8FH>WJ89`QZ`TXpu8 zre)xjR9$cz*;DQ|W*XCLs(42guai2qD{L%b zYSS4^k9n)?+00Gm#rX)}IRO)ynajt?v4CLEE$va}&Ol8wl&~LGw7hdv9MTDw6HNnB zX-u^tB+}lb+BQQKC#M1Q70nni@E1%BKA99LNA!P!q~fVHdsYvYR=Xzh`LqH+!wVbQ zx@y42>|ZHoFcWh36NnHr?=x=^1HVQ+eYtz&BU_RWdLh05yxw+BIPLdp=6X}*@kLrRS!3(bW~w;*^HN8pq7m9UnqFn0y+)*S6C%c z#xhMkB@Ih`Jz7V~Qwl=?aLv)lPL&WR!aA(xZ^EST?3F(x+Mz!pdr+R+j|Tn9S9&+! z%rT=7`gOl%&oZ3}70M@ryjxeFIMK|3a@BT!P`_O5Vp|LqtSMik+LZ%r_Am{70d326 zfm-l2wujKHP_az8egw92Wi0yXEea@CH)t5l@VdwG$z^UaZxsXXfyvQ*wy}R>#xPW* zdHd*Hdyc{|tDm=mb(;1ieNaOdY$pgHp{OQ^8QxfWyWnr@cy8~t4rYo#4BQ2EtaoWR zo;d=(w>In{n8jtFH_>Y`Kngu|DkQ8+Lxuh&gh*FK>K%Lt;4>o%#|rd@j6IAf00xlT zLr1R&9T;5M!kpW-@DR3%wk-{X2O|apD~P#`997cZd^jn?91A%ovD4mxdZ=w~M`%pw z$l$_|j5qF|`vj^0#xNoY_E8`~n;7^bAj$I#xd(^!BjZw2dz6#V{#zmy!f(dLGt6Ps z6rwY;M<5oS(W$<@fpjV9K*iAo%EYxyAtIJcT-zvDGwIuf_xlkG5A`j-PMT3+tAK3x zB08QvC*Y`3JXKhx#5Gt$PMbRD%qPdxQrLlTv6e)*n5NdT5q0|&o4=5Dq*bI~Tg0_Y zW+?uQ0?vRZhUk71trr|sf01X^*>_N7n6!n*vG(8@okO?`0?YP_%L5glQ{I=i1xM2B zt0^JA+?a>La(CfzyzEXd?I763EAPnLiqrFEgzAb_7sJ7)yw1AZ149x4#p?6xi9Kvt zliEg-I`;KsiZ48XJ%hORb%J9Q$szYHE7MM#Vx6G{AB&&13c&J&*(S!X5uCT=OYCV068$9kol6& z>Vmg=BwsU&UMAryBu@NV9z?u?q}@fR*EdO(Y#bR zXKmXmqzsS*6npVEns80t|t7@|%$k}}lH{@U-Xw!w+0;a}s2)c&wzz|u_42A|%s1WaZ zY~x>4khfN6Uc`d9nwR{iQoRJd0pXEXupwfR&=Khz6s;C-XNItGwZzQozU$VrXHdVI zNu6Vz@*xu`J4TO0)^v89V;z`G!?S4|4GM?~nIPvI3)^I**%ux_P4)OJ#3uDFc`xF^ z)++HnmA<~wI?enTOrg?Yrvp2MPBm@4v*nEX6py}r_E@I7A0GD9{l6*x?%QaJ+p=!!sIRs zozC@z2Gg6Ev<1$=nJPMt9rfUjaN-S1C`NLS(%XtF83)|kd11LFbO@>)s_zPOW9YNN za5drs6VSH~KipUP2Mo3{-Ax}bSV?XN9R01t@s+*Sb)~#1Z(rUSxLGy3Q*MV=a&Px7 zsIx={vq|H}9AIH<$KS`eNwpL~Uz@oYUu&rKshI%K(rP=bxNAvSuMI)};DaxlSINb_FDe7>g+*HVe% zzNRwFj9@h{6Iy@hi>%NBKLfUbomhD2Xc+Hy*}yAfylNa<+mGp`uM=`NIb!^@T8yI= z0`%uKKeZpVt24ij_*98jt?Hq7kk_3eG{ve@7|Ou_vojv{_K|-NjcE5ioJiA%vN%$0 zM8`PlX^Da}+;=pSTpSbtxE}UaKW=dH$u=WMnxDZ14nkSTt@!AHzY|YM4F+2|n#+>p zIl&|n{X3}utTEeA&5^<#V(Rig@`j?z!Fk02Umv)JN@h5=-$I>gjLvR8pSJV))W(Hw z_y#tYBI{7-lvImjJbJ;Ke8|1n&%ni-i6p%)7o!F@sgu_tH(f|^rbk~QAXx?fF%X+V z2Zx2!EOP?}&L`F3Tnui|uvkU=7PzW#4%n%<>nQS-y&v64??<~X?RM04gcC2tvX_>( zvxBj)xYkn(+Y75On6MV7W3W+bY3FUPp^ur=h--E#Zv2Ifaa^`9#iv5n?9`XvW@fM$ zRz;HjrG<{ARF7nsWS$u*J1IgB=EG8P%~lh9`&dajO(7HP5YU+ibE`9N3xvnMl!;E{ z=g{`7GakI>2SPhFZ{088ZH>7ug}<(1sC*JH6~iZH?f`qh&FjI<{5|9^Gn2pUB=X?s zhA2gHkOQ+XMPJ+C?^ywsLA&W5X!&D#i@pJh4wYLqCk@xpaMgg*nwn<91+9!DDAE5e zY#=Y*r*}=j>rv*D<_?!d*T;`zL=(-dVET{r@yc|4T=#9FB(SI2gQJ?afv?(Ug3!n( z+It4l8L@VtghO5kfIS>KIGA*119ngLPW6`e;_-IXii0i*D%$J51P6fVa0R^ibi=%U z-%S0am#@O6Z3qZ~_Qcrdg-Ak3W8-c1RE<3d;|4MC!UN9(E%D*2-I&%ek8I150hWD? zB74~6z&Y5mLdP;T{IVOX;NiRza!cM;xqX~OP$&SrUsXk4l29DAh>#@1QJq#tvcDNJ z$UdBez)$goY_7v`YKksxMgndzKi#0C{fYx7aV_YqC3|{@?5JVd8uG=BYS_ayCVZ)@ zmD|H1CaIx>X-(&J+xg2FA&Rf7$=j;fmUcrBSL3S%WR-!^H5(~J8M41ewpAgUux&DJ z;@HyM1~n68p{=53MPt6@*K z$c|NF)z?{Xb8nSq?!`D~poy_GLpNU>I`B34+H9?0Lg*k~5xf{fZ-(C74CR;w z<%1P~eE9Y{^+8Q}rAZv$A3|JrxSb@sk$W)Va4O_mP@5s2ft8OH@`s32HIaq7lg1M9 zHgaeQjy>BV5>^p13nA`u8;;1wYm)}&cG{G|nH_KNVZ6b&iM{;>4Tnck-s&U>ENO0b zOi#h(9 zj?6VTH`m}UVV0R|5(O&^WhNX4JdIuEahJ$KJ@n`qM`Phx*CmLEjv!dN#}tGh@Be`0 zH`>Yhznj~8=1s0z+F(9{eyf-V2-wTfyfSJhODBW&hW!D2NqyPecznMYGd}u;X}ncph}*$S))K|32+_|pdf?OH zkrSI-iEm5Y^Lug|rc_JskFHFwVnw4J2tfZXzA~_{+ALIK+rwY&L#Xr`H^AO+@hQ{$FIeJku`F#>!*WV`(Gt&9@xRHOZB}v}pq;tu@ zOIXO9V|&u&V};IyVZXZozg+*K7du`{#iBd=;}!pk3=7Zwdw9i*pNCiJ=PAA}_%{A4 z^XH-e!}+6kyl2gY`15aiv36EW|B#|_y!rcUe{24y&ll1E3MAb)=A!?%DRbsqhH?HH zXIr`?=%e4?e9`qoD+bo6AL>~;sULd&^8)(8{eB9C?DHIk{XK-`hOaQOYQFN!N;^+t z`u6YR_m9)&m*}VXjg;Q_>5D7Ld3ISkcj516T9|3AgF3Hw8I;m5btcb(bQqaDou!jZ z{`qhFFqy4~iO4YbyD6lxpfveZfBe0`WbBu}7o3eLU-ztG?+-(P{ZRyC)c9qvx2)Ox z)04D?f)l73uWd{kLGM{ue}Pv(o7X6_k@YmNwuR~8qZs&=8 zr}rKIGcAZMmxAsgV^A0i=~e1&j0S3&UQ%H#{skpA(q{zKZ}Q9!1}6!e-G{(eP+UDu zSgl!9|4qV8ef%7-H?7oA(De&-D=&eDN_7+rEew@pXMaGr-ZtQ(>V)e}%2=8}@r;gw z3~@ASKrsk~B6Kjr-lus$ZlPBKus7*KNg;oaO8Iz6di{#$O+woIA?=+Rur9L-y^Y>O zxo9`ObBa4sDRog{^^+X*(H+Z+-ToQ25Q{%l*8u=jc)c`#52B^7?6-dOGj$nNbi}YL z!?9YI_C?yr9Z5qesV_BphbQQ5mZE|>oj1g2HjIC=J>omI^HGg_MtQFk^*W=uUQg8I z?chC{f>1iGGw>~8rxwd=#QNl1HY& z9;W>w#)EZ(1|@$_vvksMe$c16ld1hV>2;n&e@+_vWBk4^;iu6ajvi=1y3NvOf;yCS zs%ry{qPD=Y_f5gE&y?XGOW#hgQ<$@RevXM;RYe{RqMNVSMK zw5PqL&@3Iorw0!T>P?IcmG?05{bG=FNEyoem&yCb;!XiSnAUIdV7o>j{(vH{AU>q3 z;`Xjy>5$iX2s}Sz^4bpyz0yIi^B|b=cBOQfG39+6DxvdvJ&Y;h^G{>qC8&B0nH1UK zISl6D%N_qDYNBtcHxU_bH7`aSJ*>SP9oY+CwQ;<4`S{!XJebWW|L^B#2^z)`SYB&? z{G80G`fuRpL8xX#QNu-TbTp%WDIVUU)d=XKh*&)8>oHZaSDN@iwD=+gEVCB?=$$9v zjQp=0Do)6IzV+m#K(-k;>SMF4g1Qj%)9d+MfDZvW6$haW=C)NP_Yl&v9=sy`;(d^P zujdP10DVXn=<<5HGQ}5jP{7wTp9c+Lzt6Dw^8p2MpI6zVY~5lg{1h1v=oeLplK(>U z51><~`j_-hMZV4E+R*{^%Mu{+hoY2F|5^ehXdpO-t{`4SjsaV<6fxERhRVANMb7W~U@@M;^i=a0o>=a*B0Ozo|Ih5G{qIK|-CSQg0|WjEPU~1~a($c4DnyUfm)?V$ zT0bohnPV^)BA;VXtFO6^GPO5d)KyvNp!Zw6gPU0g6Z_xf`j%#2w6cyYKvhKk>q~N@ z`Un7UsVMGN-jNM3JNm^DJ*2&(pypBYZ5H1A_I~)=uYJ?T+W#C!WN;4ajBHT%(wP|! zo7`=@{j&47Umwl|Qe>^3VGc{COXHtCP{= zAbRY3b$+y}lNmjG5p>MyIhmpJBMk@fBg|UAAGsy@(+WA z$^R;fM`y7lsq$aT$Q(;#+Us;Stx-oZGU4a1| ziqG0c9>SVm-*zjTud%U!{`yNmClSSDxeb1z z4?2O6{xfrpI9?N}@2#)%R7wmV)#IfnD| z7;6}BAw;47lC7zGp&zg*{^R#CJlsz}W;Xc>xRYQh_4EN0O4bqAJ6MmR+1P(;J$Q08 z;fIlw>9qT8r*U)VQQZD=)r4F&>6G8SYQ@I`>kYo#!@?Y4kqifcN_w z=QeDA4FK$u_&{BT;WtI@Ll@EK%*efXIJe;t6~RV>7crwqM&w48bDVOxJe+)o{&B!b zd`h3mk|{ETl{j_Y5*h3@n{yk^QVB4MVW&YAe?f02-qzs0#(+U&BXZ+!YBO4(1(_ZnX7Qi z-}r%_rLsN;8v?^5Q=5Xb{sCJvj%(!;InW*Nh7lPq-OqotN% z0Og6#fb^D$1+>9vnRuI}l5XP#AZeLst-(!I&^U8mDUNd+8?prD=PLo>)a67T#ViCu z(k|+ygb>jjzB6$b{%H}b6p3MK=wnUy_(&3xDS3_w^RYH+^}R-fx6Rf(U}Bt3iIIO@m%Ak9IKZPS5}I`|2E6f$tHSAb`K4JE}Km z>Frwjq;|jPWnS)^xM!f?ceMM>+I@m{{~_Ih=KYF-?aOGX!muv zQ@u921J5y*HVGNn2@w2B+^PL*wfl|iZW6|6>F?7W^`_%aW-=?&A^jBv(l1LkE)1M@HX?x35p?l#Z8c+|yfvK|_gchNTn z=4IYL;8z(!##1JfB&}!Y0MZQKVKM= zFXWFAMlP}N-^Ichz>`TzQ=u`qaMylXVbmOR{$7+UblrSYk!w-WocW82@hGGM#uf-# z29;rX_&ct=T8#w`Of5{u|QFI$=rp-^Gg=aP3Aj`e&Q~1CQHqC83AJp68$7D zYCTH8`s+KdqH!rvqi^3)F41>9C;E=(MBnk8=sTVheW&t?z9XUc9glk7=~3$yE0ErI zRy3`viN5O+^VA<<#`ip8rF13?)C}Q7e0lea+3`z-*d}c9dw(eihi2Xr?>!cO1A%df zO^XkH`Xu1{FBOn2Tx5yG+p!ZGAXsvo-PQXt?tmrob>zphgh#MT?XB1!-*98op!lJ< zc=;QHGkXvbem`QuPhBYp|58KefoG;%_lLF+9=un-RdPrC4(}Q~PQcgdul&ZCAK(-GjF5s9GMQJW6K@TNqq??{Z(~`kP?49195+A?RrN!vyiW zQ@@23uOcp3@xK~xd=nq8z%Psu>BT(y4eCwSSq~a6CSTWqNdDGIbH3mM@S`U1u^LhSo6CF!>Tl`xDIK}b&conH(U)Q_yUhT|KW zs9f*<_$yRM2u`r}V%-GZ_$j(utt2iPSAX%^_rq^2nHrDZ+RzIE4E?_q`PBdNwEj=g z`j70C{twXlf9HAnf6Z6yKX}0Ue`{L*zn|9s30nWHY5kw1_5W*W{jWGr|L>yyyGj-~ z%NNaYF>Ufai!l0PVdQP2^XFKeSX5emWBKv&{k3?#;EI=7 zg&tfHT!pw^`U%eGas3q6RN%M=S0OG1G*sex64wG;vvBynVdOUuLK7nM?lJ4TNl?XZlWqt(CTVv9x3 z`JTmc-Sw7|a?5PzoMQKUS03^#mQmC;J?OttqaG+LaXBq6`tQ^juJYo!PD}B^*%s%L z64z*6$3QBpHfq$=h4Y`nU@gGEucqabM$fg#qLsUm`lMCmwG6?IFNjcPt>Ag%t!UPVq8hh0b5?;)RBROK< zV=PV>F5}r;xx?6h_N>8a%|%*IIe)@x>q*_pId5&O(uUgeo&DBMwF(U7v923Z^Ihq+ z`=?ze4witSw(}>+6+HzHWSvo? zrenU%cjAA^J7<-YLkn<9Si!Lc#)6X;xo4&pgdX7h_r8ME;8gz#C$tf%HaS+bD! zUCuIWTab4)WA^;{MYGCWV~UFIo|d1F8C6tTwrCbs9bx1ET5ts6p#gJB-L6@}!|Yxz zI0noC4TA8K0dt9a!!v zo3)^n%AOs#c#d9ks_FYqmu=B(_k8C)nBw!DccK7|>p$q?oX8)I-U~y4^M}%XQ>4i^ z-^2h!%>VrUAIkykE7;EjL!5kS>A%q~=MpwSkU`l4Oe8$)Xd+Q`^z33+v6dpg8y#c)Uk$y(n4BskCrp?^m#V1Je@^8-L?v9V4<<^d8*f%vEl zjvkU_UZpaK>q=>jAy8X?)pXv;A|EP!|~GeX7! z61$v3i2H(YH`Thr2)Uoi!1s`BYc3$uh8ZDlKx$GT&jFGHuST*~4b@74ybefP3gkZk z34YU9s~!;Ra3iD{klL$_kPbk`3|b^=lg&p@)R!&EB;a-7QCW-LSRU$)(Dgbc{kkrDD3;eldEmMH@yHeHA4`jG1%Oli~c893=+9MJ!K z6@7?lA)o=^LATR>qsx+tm2wA|UclT+{pmWB{wEjLnJGKzgx>U1Bltnon06C{mjEIC z!!WbF*8#EONY)ye&3kb2F#*5<_2S{xSWI7-<4;srj0g0tRJb(m$Y%H@J zker8&kY5Ax*dsb5VJ^<*kPIOq8?0aGg$a&Up$!Bke|=?R7&!E;WC1+sYo!Ixj2kB6 zLh4VKjTNZPIB)VocVCxM2)5@;Cm>_z5{0x#%wDvR0D>(6(PoQ|i!pAH$@)(5kt4`#AvQs}v*HXTm^&4QFNW9fspsoWUT2lMbg zn1ktf3LZ;`jCJ+FZ0&=2SRc&m((x2PvFQ}@Sul2fAI#JGV4l9TWGIm;`r#j|fAIzD3 zFt19-Q*ci@WGt<9ye(u2yYR>{_s>Hra};G_taX%0tgs1sO!uPb4L^}bskPv>e@pT4gKjuajiOiqW4y)Myr9rKtzn8)|Q98Skm;7x~&ZR&&B+6VK9 zKA2n6@f6HUhm57Ke`x*EX4AAjm~ZHVxh)+}L1{W&e! z8ZWAw`uj(XJ7N7A=qdd>=;3Al`Sg4T^mzXcdU%CBIF|th}WTW19jgz~(I#GIo4IGIh+gNzB@YEMW;JZ1u;0hiQ^T>ofYa{$+Yw z15yBx(jm9rqxV!O(hfNIj*M1( z`rQj{V*wLLjyPlBTQJ zJV`#k4M-5UlKuKUAgSZ^C#sd`DZ`BBxn)kR7daO$E-72Ia0ZGcG1Ci&^h@%YzS8*^ zAjvX=vjm|NkYwxM0EB+LR#6e1$rUk3l84u$3|un?Ja+=J7my?#n}&ziD$D=I6E565PoG)UhhsCMVl5IBDqUWmtNw!s_9f(>|=FTXT;rlp_dCr1G zvz_duCP_~r%INc*(>z&gE6MpHKn|nLBxC^~D^nmprCLCsjgEE*Iwpml7g44yrPgbJ z5G_eb_#Ge^90SK%0STwn+6l;t1f&SUI$M*dq+~`=MqhIw&)Na*v=n*^|TGy#(2&jWzydl1f5Cm?kxWu5_qeo2~TKlap$eSgA|)96YrZb-Bn!X zLV#Wo0`f{06uX?0N*0eTn6U^E*%XR1b@uE#XFu*PcTr?p`RIHGln^6kgx-{_JsovW zbrvGaT$7!}6kYZZ!o$k%DVaNO^cbuj=@}@@L%@s5ic89!S^}ZrCFMm6ix;M(6EW00 z2QJ{!;<+ICZXOptrFe=~91+GT)p`1Y)yEdF>I)Z@LA*}{xhG_K*V58hbpc#u6BF3dcsEn4C2ovuMNevN8$!C>~ zSd0N(0>!Vfe%yT1^pd&dupitrQ_@U=IeMlX6U3mRKFSza3O!F`0f!+Asbm&H)(lw` zn4YMGcr-&6#i=K*g9Bu|k@auJCn-;hZ1jp`&Bg;au3cup{i zo^?jCGJP1uN~g0W5$9i&h?*lYCXxC5Q#{!VK=7(FmJRrv=aI003xI4KKqmz_u8bQ zY11Y9q^U*sNt35eESh}p^ck=sc;6H3F5+4tmG+rfdWy*Nfb9rYBC1tXG-<}v`w~cs z7A^qD5VVGrYkqmM{P_dZST(fAqS}fep-(%D7R{lWvz}mFE8z{MW*|1*S+>~8NLf() z_@XkJL*-AEyPOM(7CXx*YLkB$B1lOJWZo0yt|zEdS{^sBiqfOjtQhYi z#1R?lqRU0vMg`T+&uD4NBu04b~43QG~4L{>!22R7_i=u9weD)DG~drLHd=o z)H#+SJH`pXx#daq% Q7q-_bGGOG~