X-Git-Url: https://git.ucc.asn.au/?p=ipdf%2Fdocuments.git;a=blobdiff_plain;f=papers.bib;h=0dec3ca5784660c5d2da9615f82fa7bced1aa64f;hp=52350bcfedb721447cfdc1690161856e081c826d;hb=4d1387ba0e70247be33b2058ce8a603712bbc615;hpb=4e29c54be001b88f60fd055ddb01d9b6bb12097f diff --git a/papers.bib b/papers.bib index 52350bc..0dec3ca 100644 --- a/papers.bib +++ b/papers.bib @@ -333,7 +333,7 @@ Goldberg:1991:CSK:103162.103163, title = "Infinite-precision Document Formats (Project Proposal)", author = "David Gow", year = "2014", - howpublished = "http://davidgow.net/stuff/ProjectProposal.pdf" + howpublished = "\url{http://davidgow.net/stuff/ProjectProposal.pdf}" } % Note the different title @@ -341,7 +341,7 @@ Goldberg:1991:CSK:103162.103163, title = "Infinite Precision Document Formats (Project Proposal)", author = "Sam Moore", year = "2014", - howpublished = "http://szmoore.net/ipdf/documents/ProjectProposalSam.pdf" + howpublished = "\url{http://szmoore.net/ipdf/documents/ProjectProposalSam.pdf}" } % The Fractal Nature of Bezier Curves @@ -424,4 +424,107 @@ doi={10.1109/ARITH.1991.145549},} howpublished = {\url{http://www.boost.org/doc/libs/1_53_0/libs/multiprecision/doc/html/boost_multiprecision/}} } +% A CMOS Floating Point Unit +@MISC{kelley1997acmos, + author = {Michael J. Kelley and Matthew A. Postiff and Advisor Richard and B. Brown}, + title = {A CMOS Floating Point Unit}, + year = {1997} +} + +@misc{filiatreault2003simply, + author = {Raymond Filiatreault}, + title = "Simply FPU", + year = 2003, + howpublished = {\url{http://www.website.masmforum.com/tutorials/fptute/index.html}} +} + +@article{bishop2008floating, + author = {David Bishop}, + year = 2008, + howpublished = {\url{http://www.vhdl.org/fphdl/Float_ug.pdf}}, + title = {Floating Point Package User's Guide}, + note = {Technical Report}, + journal = {EDA Industry Working Groups} +} + +@article{dieter2007lowcost, + author = {Dieter, William R. and Kaveti, Akil and Dietz, Henry G.}, + title = {Low-Cost Microarchitectural Support for Improved Floating-Point Accuracy}, + journal = {IEEE Comput. Archit. Lett.}, + issue_date = {January 2007}, + volume = {6}, + number = {1}, + month = jan, + year = {2007}, + issn = {1556-6056}, + pages = {13--16}, + numpages = {4}, + url = {http://dx.doi.org/10.1109/L-CA.2007.1}, + doi = {10.1109/L-CA.2007.1}, + acmid = {1271937}, + publisher = {IEEE Computer Society}, + address = {Washington, DC, USA}, + keywords = {B Hardware, B.2 Arithmetic and Logic Structures, B.2.4 High-Speed Arithmetic, B.2.4.b Cost/performance, C Computer Systems Organization, C.0 General, C.0.b Hardware/software interfaces, C.1 Processor Architectures, C.1.5 Micro-architecture implementation considerations, G Mathematics of Computing, G.1 Numerical Analysis, G.1.0 General, G.1.0.e Multiple precision arithmetic, I Computing Methodologies, I.3 Computer Graphics, I.3.1 Hardware Architecture, I.3.1.a Graphics processors}, +} + +@misc{jop, + author = "jop-devel", + title = "Java Optimized Processor", + howpublished = "\url{https://github.com/jop-devel/jop}" +} + +@inproceedings{kadric2013accurate, + title={Accurate Parallel Floating-Point Accumulation}, + author={Kadric, Edin and Gurniak, Paul and DeHon, Andr{\'e}}, + booktitle={Computer Arithmetic (ARITH), 2013 21st IEEE Symposium on}, + pages={153--162}, + year={2013}, + organization={IEEE} +} + +%ghdl, the least shitty of the open source vhdl tools +@misc{ghdl, + title = "GHDL Guide", + author = "Tristan Gingold", + year = "2007", + howpublished = "\url{http://ghdl.free.fr/ghdl/}" +} + +% Look into as an alternative to using text files for FPU simulation? +@misc{tang2000using, + title = "Using Binary Files in VHDL Test Benches", + author = "Stephen Tang", + year = "2000", + howpublished = "\url{http://www.ece.ualberta.ca/~elliott/ee552/studentAppNotes/2000_w/vhdl/BinaryFileTestbenching/binary.html}", + note = "Application Notes (webpage)" +} + +% On the design of IEEE floating point adders +% Has algorithms! +@INPROCEEDINGS{seidal2001onthe, +author={Seidel, P.-M. and Even, G.}, +booktitle={Computer Arithmetic, 2001. Proceedings. 15th IEEE Symposium on}, +title={On the design of fast IEEE floating-point adders}, +year={2001}, +month={}, +pages={184-194}, +keywords={adders;circuit optimisation;floating point arithmetic;logic design;IEEE rounding modes;IEEE standard;addition;approximate counting;borrow-save representation;clock periods;complement subtraction;compound adders;double precision;fast IEEE floating-point adder design;fast circuits;latches;latency;leading zeros;logic levels;normalized numbers;normalized rounded sum/difference;optimization techniques;rounding algorithm;sign-magnitude computation;subtraction;Adders;Algorithm design and analysis;Circuits;Clocks;Delay;Design optimization;Latches;Logic design;Partitioning algorithms;Pipelines}, +doi={10.1109/ARITH.2001.930118}, +ISSN={1063-6889},} + + +@article{demmel1996basic, + title = "Basic Issues in Floating Point Arithmetic and Error Analysis", + author = "Jim Demmel", + journal = "U.C. Berkeley CS267", + note = "Lecture Notes", + howpublished = "\url{http://www.cs.berkeley.edu/~demmel/cs267/lecture21/lecture21.html}" +} + +@misc{grfpu_dasia, + title = "GRFPU - High Performance IEEE- 7 5 4 Floating- Point Unit", + author = "Edvin Catovic", + howpublished = "\url{http://www.gaisler.com/doc/grfpu_dasia.pdf}" +} +