#Makefile for a VHDL FPU based on https://github.com/jop-devel/jop
GHDL = ghdl 
GHDL_FLAGS = --std=93c --ieee=synopsys -fexplicit
OBJ = fpupack.o pre_norm_addsub.o addsub_28.o post_norm_addsub.o pre_norm_mul.o mul_24.o serial_mul.o post_norm_mul.o pre_norm_div.o serial_div.o  post_norm_div.o pre_norm_sqrt.o sqrt.o post_norm_sqrt.o comppack.o fpu.o txt_util.o

RM = rm -f

BIN = ../bin/vfpu

$(BIN) : $(OBJ) main
	mv main $(BIN)

% : %.o
	$(GHDL) -e $(GHDL_FLAGS) $@


%.o : %.vhd
	$(GHDL) -a $(GHDL_FLAGS) $<

clean :
	rm -f $(OBJ)
	rm -f main.o
	rm -f *~
	rm -f $(BIN)