From: John Hodge Date: Sat, 24 Sep 2011 00:38:13 +0000 (+0800) Subject: Kernel/arm7 - Now with less crash X-Git-Tag: rel0.11~79 X-Git-Url: https://git.ucc.asn.au/?p=tpg%2Facess2.git;a=commitdiff_plain;h=0823932d2ca869dc5dc972ac76261e1b264e70a0 Kernel/arm7 - Now with less crash --- diff --git a/Kernel/arch/arm7/lib.c b/Kernel/arch/arm7/lib.c index 6f11f012..e8eb7d3b 100644 --- a/Kernel/arch/arm7/lib.c +++ b/Kernel/arch/arm7/lib.c @@ -167,6 +167,7 @@ Uint64 DivMod64U(Uint64 Num, Uint64 Den, Uint64 *Rem) Uint64 __udivdi3(Uint64 Num, Uint64 Den) { return DivMod64U(Num, Den, NULL); + #if 0 // if( Den == 0 ) return 5 / (Uint32)Den; // Force a #DIV0 if( Den == 16 ) return Num >> 4; if( Den == 256 ) return Num >> 8; @@ -186,11 +187,16 @@ Uint64 __udivdi3(Uint64 Num, Uint64 Den) Uint64 ret = 0; for( ret = 0; Num > Den; ret ++, Num -= Den ); return ret; + #endif } // Unsigned Modulus 64-bit Integer Uint64 __umoddi3(Uint64 Num, Uint64 Den) { + Uint64 ret = 0; + DivMod64U(Num, Den, &ret); + return ret; + #if 0 if( Den == 0 ) return 5 / (Uint32)Den; // Force a #DIV0 if( Num < Den ) return Num; if( Den == 1 ) return 0; @@ -211,6 +217,7 @@ Uint64 __umoddi3(Uint64 Num, Uint64 Den) #endif for( ; Num > Den; Num -= Den ); return Num; + #endif } #define _divide_s_32(Num, Den, rem) __asm__ __volatile__ ( \ diff --git a/Kernel/arch/arm7/mm_virt.c b/Kernel/arch/arm7/mm_virt.c index 3dca8ac6..6744bae2 100644 --- a/Kernel/arch/arm7/mm_virt.c +++ b/Kernel/arch/arm7/mm_virt.c @@ -4,6 +4,7 @@ * ARM7 Virtual Memory Manager * - arch/arm7/mm_virt.c */ +#define DEBUG 0 #include #include #include @@ -13,6 +14,9 @@ #define AP_RW_BOTH 0x3 #define AP_RO_BOTH 0x6 +// === IMPORTS === +extern Uint32 kernel_table0[]; + // === TYPES === typedef struct { @@ -46,7 +50,7 @@ int MM_InitialiseVirtual(void) void MM_int_GetTables(tVAddr VAddr, Uint32 **Table0, Uint32 **Table1) { if(VAddr & 0x80000000) { - *Table0 = (void*)MM_TABLE0KERN; // Level 0 + *Table0 = (void*)&kernel_table0; // Level 0 *Table1 = (void*)MM_TABLE1KERN; // Level 1 } else { @@ -60,17 +64,28 @@ int MM_int_AllocateCoarse(tVAddr VAddr, int Domain) Uint32 *table0, *table1; Uint32 *desc; tPAddr paddr; + + ENTER("xVAddr iDomain", VAddr, Domain); MM_int_GetTables(VAddr, &table0, &table1); VAddr &= ~(0x400000-1); // 4MiB per "block", 1 Page - desc = &table0[VAddr>>20]; + desc = &table0[ VAddr>>20]; + LOG("desc = %p", desc); + + // table0: 4 bytes = 1 MiB + + LOG("desc[0] = %x", desc[0]); + LOG("desc[1] = %x", desc[1]); + LOG("desc[2] = %x", desc[2]); + LOG("desc[3] = %x", desc[3]); if( (desc[0] & 3) != 0 || (desc[1] & 3) != 0 || (desc[2] & 3) != 0 || (desc[3] & 3) != 0 ) { // Error? + LEAVE('i', 1); return 1; } @@ -78,6 +93,7 @@ int MM_int_AllocateCoarse(tVAddr VAddr, int Domain) if( !paddr ) { // Error + LEAVE('i', 2); return 2; } @@ -92,6 +108,7 @@ int MM_int_AllocateCoarse(tVAddr VAddr, int Domain) // TLBIALL TLBIALL(); + LEAVE('i', 0); return 0; } @@ -100,25 +117,31 @@ int MM_int_SetPageInfo(tVAddr VAddr, tMM_PageInfo *pi) Uint32 *table0, *table1; Uint32 *desc; + ENTER("pVADdr ppi", VAddr, pi); + MM_int_GetTables(VAddr, &table0, &table1); desc = &table0[ VAddr >> 20 ]; + LOG("desc = %p", desc); switch(pi->Size) { case 12: // Small Page case 16: // Large Page + LOG("Page"); if( (*desc & 3) == 0 ) { MM_int_AllocateCoarse( VAddr, pi->Domain ); } desc = &table1[ VAddr >> 12 ]; + LOG("desc (2) = %p", desc); if( pi->Size == 12 ) { // Small page // - Error if overwriting a large page - if( (*desc & 3) == 1 ) return 1; + if( (*desc & 3) == 1 ) LEAVE_RET('i', 1); if( pi->PhysAddr == 0 ) { *desc = 0; + LEAVE('i', 0); return 0; } @@ -141,6 +164,7 @@ int MM_int_SetPageInfo(tVAddr VAddr, tMM_PageInfo *pi) case 24: // Supersection // Error if not aligned if( VAddr & 0xFFFFFF ) { + LEAVE('i', 1); return 1; } if( (*desc & 3) == 0 || ((*desc & 3) == 2 && (*desc & (1 << 18))) ) @@ -148,6 +172,7 @@ int MM_int_SetPageInfo(tVAddr VAddr, tMM_PageInfo *pi) if( pi->PhysAddr == 0 ) { *desc = 0; // TODO: Apply to all entries + LEAVE('i', 0); return 0; } // Apply @@ -156,11 +181,14 @@ int MM_int_SetPageInfo(tVAddr VAddr, tMM_PageInfo *pi) // *desc |= ((pi->PhysAddr >> 36) & 0x7) << 5; *desc |= 2 | (1 << 18); // TODO: Apply to all entries + LEAVE('i', 0); return 0; } + LEAVE('i', 1); return 1; } + LEAVE('i', 1); return 1; } @@ -308,16 +336,20 @@ int MM_Map(tVAddr VAddr, tPAddr PAddr) tPAddr MM_Allocate(tVAddr VAddr) { tMM_PageInfo pi = {0}; + + ENTER("pVAddr", VAddr); pi.PhysAddr = MM_AllocPhys(); - if( pi.PhysAddr == 0 ) return 0; + if( pi.PhysAddr == 0 ) LEAVE_RET('i', 0); pi.Size = 12; pi.AP = AP_KRW_ONLY; // Kernel Read/Write pi.bExecutable = 1; if( MM_int_SetPageInfo(VAddr, &pi) ) { MM_DerefPhys(pi.PhysAddr); + LEAVE('i', 0); return 0; } + LEAVE('x', pi.PhysAddr); return pi.PhysAddr; } diff --git a/Kernel/arch/arm7/proc.c b/Kernel/arch/arm7/proc.c index 9b4dc183..e18d9772 100644 --- a/Kernel/arch/arm7/proc.c +++ b/Kernel/arch/arm7/proc.c @@ -9,10 +9,13 @@ #include #include +// === IMPORTS === +extern tThread gThreadZero; + // === PROTOTYPES === // === GLOBALS === -tThread *gpCurrentThread; +tThread *gpCurrentThread = &gThreadZero; // === CODE === void ArchThreads_Init(void) diff --git a/Kernel/arch/arm7/start.s b/Kernel/arch/arm7/start.s index 83b2d1b6..606dbb73 100644 --- a/Kernel/arch/arm7/start.s +++ b/Kernel/arch/arm7/start.s @@ -63,11 +63,14 @@ kernel_table0: .rept 0xFF8 - 0xF00 - 4 .long 0 .endr + @ Page fractals .long kernel_table1_map + 0x000 - KERNEL_BASE + 1 .long kernel_table1_map + 0x400 - KERNEL_BASE + 1 .long kernel_table1_map + 0x800 - KERNEL_BASE + 1 .long kernel_table1_map + 0xC00 - KERNEL_BASE + 1 - .long kernel_table0 - KERNEL_BASE + 2 @ Sure it maps too much, but fuck that + @ Top level fractals + @.long kernel_table0 - KERNEL_BASE + 2 @ Only need 16KiB, but this maps 1MiB + .long 0 @ removed for alignment constraints, using the KERNEL_BASE ident mapping instead .rept 0x1000 - 0xFF8 - 5 .long 0 .endr