4 * ARM7 Virtual Memory Manager
5 * - arch/arm7/mm_virt.c
11 #define AP_KRW_ONLY 0x1
12 #define AP_KRO_ONLY 0x5
13 #define AP_RW_BOTH 0x3
14 #define AP_RO_BOTH 0x6
28 //#define FRACTAL(table1, addr) ((table1)[ (0xFF8/4*1024) + ((addr)>>20)])
29 #define FRACTAL(table1, addr) ((table1)[ (0xFF8/4*1024) + ((addr)>>22)])
30 #define TLBIALL() __asm__ __volatile__ ("mcr p15, 0, %0, c8, c7, 0" : : "r" (0))
33 void MM_int_GetTables(tVAddr VAddr, Uint32 **Table0, Uint32 **Table1);
34 int MM_int_AllocateCoarse(tVAddr VAddr, int Domain);
35 int MM_int_SetPageInfo(tVAddr VAddr, tMM_PageInfo *pi);
36 int MM_int_GetPageInfo(tVAddr VAddr, tMM_PageInfo *pi);
41 int MM_InitialiseVirtual(void)
46 void MM_int_GetTables(tVAddr VAddr, Uint32 **Table0, Uint32 **Table1)
48 if(VAddr & 0x80000000) {
49 *Table0 = (void*)MM_TABLE0KERN; // Level 0
50 *Table1 = (void*)MM_TABLE1KERN; // Level 1
53 *Table0 = (void*)MM_TABLE0USER;
54 *Table1 = (void*)MM_TABLE1USER;
58 int MM_int_AllocateCoarse(tVAddr VAddr, int Domain)
60 Uint32 *table0, *table1;
64 MM_int_GetTables(VAddr, &table0, &table1);
66 VAddr &= ~(0x400000-1); // 4MiB per "block", 1 Page
68 desc = &table0[VAddr>>20];
70 if( (desc[0] & 3) != 0 || (desc[1] & 3) != 0
71 || (desc[2] & 3) != 0 || (desc[3] & 3) != 0 )
77 paddr = MM_AllocPhys();
84 *desc = paddr | (Domain << 5) | 1;
85 desc[1] = desc[0] + 0x400;
86 desc[2] = desc[0] + 0x800;
87 desc[3] = desc[0] + 0xC00;
89 Log("FRACTAL(%p, %p) = %p", table1, VAddr, &FRACTAL(table1, VAddr));
90 FRACTAL(table1, VAddr) = paddr | 3;
98 int MM_int_SetPageInfo(tVAddr VAddr, tMM_PageInfo *pi)
100 Uint32 *table0, *table1;
103 MM_int_GetTables(VAddr, &table0, &table1);
105 desc = &table0[ VAddr >> 20 ];
109 case 12: // Small Page
110 case 16: // Large Page
111 if( (*desc & 3) == 0 ) {
112 MM_int_AllocateCoarse( VAddr, pi->Domain );
114 desc = &table1[ VAddr >> 12 ];
118 // - Error if overwriting a large page
119 if( (*desc & 3) == 1 ) return 1;
120 if( pi->PhysAddr == 0 ) {
125 *desc = (pi->PhysAddr & 0xFFFFF000) | 2;
126 if(!pi->bExecutable) *desc |= 1; // XN
127 if(!pi->bGlobal) *desc |= 1 << 11; // NG
128 if( pi->bShared) *desc |= 1 << 10; // S
129 *desc |= (pi->AP & 3) << 4; // AP
130 *desc |= ((pi->AP >> 2) & 1) << 9; // APX
138 case 20: // Section or unmapped
139 Log_Warning("MM", "TODO: Implement sections");
141 case 24: // Supersection
142 // Error if not aligned
143 if( VAddr & 0xFFFFFF ) {
146 if( (*desc & 3) == 0 || ((*desc & 3) == 2 && (*desc & (1 << 18))) )
148 if( pi->PhysAddr == 0 ) {
150 // TODO: Apply to all entries
154 *desc = pi->PhysAddr & 0xFF000000;
155 // *desc |= ((pi->PhysAddr >> 32) & 0xF) << 20;
156 // *desc |= ((pi->PhysAddr >> 36) & 0x7) << 5;
157 *desc |= 2 | (1 << 18);
158 // TODO: Apply to all entries
167 int MM_int_GetPageInfo(tVAddr VAddr, tMM_PageInfo *pi)
169 Uint32 *table0, *table1;
172 MM_int_GetTables(VAddr, &table0, &table1);
174 desc = table0[ VAddr >> 20 ];
189 // 1: Coarse page table
191 // Domain from top level table
192 pi->Domain = (desc >> 5) & 7;
194 desc = table1[ VAddr >> 12 ];
201 // 1: Large Page (64KiB)
204 pi->PhysAddr = desc & 0xFFFF0000;
210 pi->PhysAddr = desc & 0xFFFFF000;
211 pi->bExecutable = desc & 1;
212 pi->bGlobal = !(desc >> 11);
213 pi->bShared = (desc >> 10) & 1;
218 // 2: Section (or Supersection)
220 if( desc & (1 << 18) ) {
222 pi->PhysAddr = desc & 0xFF000000;
223 pi->PhysAddr |= (Uint64)((desc >> 20) & 0xF) << 32;
224 pi->PhysAddr |= (Uint64)((desc >> 5) & 0x7) << 36;
226 pi->Domain = 0; // Superpages default to zero
231 pi->PhysAddr = desc & 0xFFF80000;
233 pi->Domain = (desc >> 5) & 7;
236 // 3: Reserved (invalid)
247 tPAddr MM_GetPhysAddr(tVAddr VAddr)
250 if( MM_int_GetPageInfo(VAddr, &pi) )
255 Uint MM_GetFlags(tVAddr VAddr)
260 if( MM_int_GetPageInfo(VAddr, &pi) )
268 ret |= MM_PFLAG_KERNEL;
271 ret |= MM_PFLAG_KERNEL|MM_PFLAG_RO;
280 if( pi.bExecutable ) ret |= MM_PFLAG_EXEC;
284 void MM_SetFlags(tVAddr VAddr, Uint Flags, Uint Mask)
287 if( MM_int_GetPageInfo(VAddr, &pi) )
294 int MM_Map(tVAddr VAddr, tPAddr PAddr)
296 tMM_PageInfo pi = {0};
299 pi.AP = AP_KRW_ONLY; // Kernel Read/Write
301 if( MM_int_SetPageInfo(VAddr, &pi) ) {
302 MM_DerefPhys(pi.PhysAddr);
308 tPAddr MM_Allocate(tVAddr VAddr)
310 tMM_PageInfo pi = {0};
312 pi.PhysAddr = MM_AllocPhys();
313 if( pi.PhysAddr == 0 ) return 0;
315 pi.AP = AP_KRW_ONLY; // Kernel Read/Write
317 if( MM_int_SetPageInfo(VAddr, &pi) ) {
318 MM_DerefPhys(pi.PhysAddr);
324 void MM_Deallocate(tVAddr VAddr)
328 if( MM_int_GetPageInfo(VAddr, &pi) ) return ;
330 if( pi.PhysAddr == 0 ) return;
331 MM_DerefPhys(pi.PhysAddr);
336 MM_int_SetPageInfo(VAddr, &pi);
339 tPAddr MM_ClearUser(void)
341 // TODO: Implement ClearUser
345 tVAddr MM_MapTemp(tPAddr PAddr)
347 // TODO: Implement MapTemp
351 void MM_FreeTemp(tVAddr VAddr)
353 // TODO: Implement FreeTemp
356 void MM_DumpTables(tVAddr Start, tVAddr End)