4 * Virtual Memory Manager
12 #define PHYS_BITS 52 // TODO: Move out
19 #define PADDR_MASK 0x7FFFFFFF##FFFFF000
20 #define PAGE_MASK (((Uint)1 << 36)-1)
21 #define TABLE_MASK (((Uint)1 << 27)-1)
22 #define PDP_MASK (((Uint)1 << 18)-1)
23 #define PML4_MASK (((Uint)1 << 9)-1)
25 #define PF_PRESENT 0x001
26 #define PF_WRITE 0x002
28 #define PF_LARGE 0x000
30 #define PF_PAGED 0x400
31 #define PF_NX 0x80000000##00000000
34 #define PAGETABLE(idx) (*((tPAddr*)MM_FRACTAL_BASE+((idx)&PAGE_MASK)))
35 #define PAGEDIR(idx) PAGETABLE((MM_FRACTAL_BASE>>12)+((idx)&TABLE_MASK))
36 #define PAGEDIRPTR(idx) PAGEDIR((MM_FRACTAL_BASE>>21)+((idx)&PDP_MASK))
37 #define PAGEMAPLVL4(idx) PAGEDIRPTR((MM_FRACTAL_BASE>>30)+((idx)&PML4_MASK))
39 #define TMPTABLE(idx) (*((tPAddr*)MM_TMPFRAC_BASE+((idx)&PAGE_MASK)))
40 #define TMPDIR(idx) TMPTABLE((MM_FRACTAL_BASE>>12)+((idx)&TABLE_MASK))
41 #define TMPDIRPTR(idx) TMPDIR((MM_FRACTAL_BASE>>21)+((idx)&PDP_MASK))
42 #define TMPMAPLVL4(idx) TMPDIRPTR((MM_FRACTAL_BASE>>30)+((idx)&PML4_MASK))
43 #define TMPCR3() PAGEMAPLVL4(MM_TMPFRAC_BASE>>39)
45 #define INVLPG(__addr) __asm__ __volatile__ ("invlpg (%0)"::"r"(__addr));
48 //tPAddr * const gaPageTable = MM_FRACTAL_BASE;
51 extern tPAddr gInitialPML4[512];
54 void MM_InitVirt(void);
55 //void MM_FinishVirtualInit(void);
56 void MM_PageFault(tVAddr Addr, Uint ErrorCode, tRegs *Regs);
57 void MM_DumpTables(tVAddr Start, tVAddr End);
58 int MM_GetPageEntryPtr(tVAddr Addr, BOOL bTemp, BOOL bAllocate, BOOL bLargePage, tPAddr **Pointer);
59 int MM_MapEx(tVAddr VAddr, tPAddr PAddr, BOOL bTemp, BOOL bLarge);
60 // int MM_Map(tVAddr VAddr, tPAddr PAddr);
61 void MM_Unmap(tVAddr VAddr);
62 void MM_ClearUser(void);
63 int MM_GetPageEntry(tVAddr Addr, tPAddr *Phys, Uint *Flags);
66 tMutex glMM_TempFractalLock;
69 void MM_InitVirt(void)
71 MM_DumpTables(0, -1L);
74 void MM_FinishVirtualInit(void)
79 * \brief Called on a page fault
81 void MM_PageFault(tVAddr Addr, Uint ErrorCode, tRegs *Regs)
83 // TODO: Implement Copy-on-Write
85 if( gaPageDir [Addr>>22] & PF_PRESENT
86 && gaPageTable[Addr>>12] & PF_PRESENT
87 && gaPageTable[Addr>>12] & PF_COW )
90 if(MM_GetRefCount( gaPageTable[Addr>>12] & ~0xFFF ) == 1)
92 gaPageTable[Addr>>12] &= ~PF_COW;
93 gaPageTable[Addr>>12] |= PF_PRESENT|PF_WRITE;
97 //Log("MM_PageFault: COW - MM_DuplicatePage(0x%x)", Addr);
98 paddr = MM_DuplicatePage( Addr );
99 MM_DerefPhys( gaPageTable[Addr>>12] & ~0xFFF );
100 gaPageTable[Addr>>12] &= PF_USER;
101 gaPageTable[Addr>>12] |= paddr|PF_PRESENT|PF_WRITE;
104 INVLPG( Addr & ~0xFFF );
109 // If it was a user, tell the thread handler
111 Warning("%s %s %s memory%s",
112 (ErrorCode&4?"User":"Kernel"),
113 (ErrorCode&2?"write to":"read from"),
114 (ErrorCode&1?"bad/locked":"non-present"),
115 (ErrorCode&16?" (Instruction Fetch)":"")
117 Warning("User Pagefault: Instruction at %04x:%08x accessed %p",
118 Regs->CS, Regs->RIP, Addr);
119 __asm__ __volatile__ ("sti"); // Restart IRQs
120 // Threads_SegFault(Addr);
126 // -- Check Error Code --
128 Warning("Reserved Bits Trashed!");
131 Warning("%s %s %s memory%s",
132 (ErrorCode&4?"User":"Kernel"),
133 (ErrorCode&2?"write to":"read from"),
134 (ErrorCode&1?"bad/locked":"non-present"),
135 (ErrorCode&16?" (Instruction Fetch)":"")
139 Log("Code at %p accessed %p", Regs->RIP, Addr);
140 // Print Stack Backtrace
141 // Error_Backtrace(Regs->RIP, Regs->RBP);
143 MM_DumpTables(0, -1);
145 __asm__ __volatile__ ("cli");
151 * \brief Dumps the layout of the page tables
153 void MM_DumpTables(tVAddr Start, tVAddr End)
155 const tPAddr CHANGEABLE_BITS = 0xFF8;
156 const tPAddr MASK = ~CHANGEABLE_BITS; // Physical address and access bits
157 tVAddr rangeStart = 0;
158 tPAddr expected = CHANGEABLE_BITS; // CHANGEABLE_BITS is used because it's not a vaild value
162 Log("Table Entries: (%p to %p)", Start, End);
164 End &= (1L << 48) - 1;
166 Start >>= 12; End >>= 12;
168 for(page = Start, curPos = Start<<12;
170 curPos += 0x1000, page++)
172 if( curPos == 0x800000000000L )
173 curPos = 0xFFFF800000000000L;
175 //Debug("&PAGEMAPLVL4(%i page>>27) = %p", page>>27, &PAGEMAPLVL4(page>>27));
176 //Debug("&PAGEDIRPTR(%i page>>18) = %p", page>>18, &PAGEDIRPTR(page>>18));
177 //Debug("&PAGEDIR(%i page>>9) = %p", page>>9, &PAGEDIR(page>>9));
178 //Debug("&PAGETABLE(%i page) = %p", page, &PAGETABLE(page));
182 !(PAGEMAPLVL4(page>>27) & PF_PRESENT)
183 || !(PAGEDIRPTR(page>>18) & PF_PRESENT)
184 || !(PAGEDIR(page>>9) & PF_PRESENT)
185 || !(PAGETABLE(page) & PF_PRESENT)
186 || (PAGETABLE(page) & MASK) != expected)
188 if(expected != CHANGEABLE_BITS) {
189 #define CANOICAL(addr) ((addr)&0x800000000000?(addr)|0xFFFF000000000000:(addr))
190 Log("%016x-0x%016x => %013x-%013x (%c%c%c%c)",
191 CANOICAL(rangeStart), CANOICAL(curPos - 1),
192 PAGETABLE(rangeStart>>12) & ~0xFFF,
193 (expected & ~0xFFF) - 1,
194 (expected & PF_PAGED ? 'p' : '-'),
195 (expected & PF_COW ? 'C' : '-'),
196 (expected & PF_USER ? 'U' : '-'),
197 (expected & PF_WRITE ? 'W' : '-')
200 expected = CHANGEABLE_BITS;
202 if( !(PAGEMAPLVL4(page>>27) & PF_PRESENT) ) {
203 page += (1 << 27) - 1;
204 curPos += (1L << 39) - 0x1000;
205 //Debug("pml4 ent unset (page = 0x%x now)", page);
208 if( !(PAGEDIRPTR(page>>18) & PF_PRESENT) ) {
209 page += (1 << 18) - 1;
210 curPos += (1L << 30) - 0x1000;
211 //Debug("pdp ent unset (page = 0x%x now)", page);
214 if( !(PAGEDIR(page>>9) & PF_PRESENT) ) {
215 page += (1 << 9) - 1;
216 curPos += (1L << 21) - 0x1000;
217 //Debug("pd ent unset (page = 0x%x now)", page);
220 if( !(PAGETABLE(page) & PF_PRESENT) ) continue;
222 expected = (PAGETABLE(page) & MASK);
225 if(expected != CHANGEABLE_BITS)
229 if(expected != CHANGEABLE_BITS) {
230 Log("%016x-%016x => %013x-%013x (%s%s%s%s)",
231 rangeStart, curPos - 1,
232 PAGETABLE(rangeStart>>12) & ~0xFFF,
233 (expected & ~0xFFF) - 1,
234 (expected & PF_PAGED ? "p" : "-"),
235 (expected & PF_COW ? "C" : "-"),
236 (expected & PF_USER ? "U" : "-"),
237 (expected & PF_WRITE ? "W" : "-")
244 * \brief Get a pointer to a page entry
245 * \param Addr Virtual Address
246 * \param bTemp Use the Temporary fractal mapping
247 * \param bAllocate Allocate entries
248 * \param bLargePage Request a large page
249 * \param Pointer Location to place the calculated pointer
250 * \return Page size, or -ve on error
252 int MM_GetPageEntryPtr(tVAddr Addr, BOOL bTemp, BOOL bAllocate, BOOL bLargePage, tPAddr **Pointer)
256 const int ADDR_SIZES[] = {39, 30, 21, 12};
257 const int nADDR_SIZES = sizeof(ADDR_SIZES)/sizeof(ADDR_SIZES[0]);
261 pmlevels[3] = (void*)MM_TMPFRAC_BASE; // Temporary Page Table
263 pmlevels[3] = (void*)MM_FRACTAL_BASE; // Page Table
264 pmlevels[2] = &pmlevels[3][(MM_FRACTAL_BASE>>12)&PAGE_MASK]; // PDIR
265 pmlevels[1] = &pmlevels[2][(MM_FRACTAL_BASE>>21)&TABLE_MASK]; // PDPT
266 pmlevels[0] = &pmlevels[1][(MM_FRACTAL_BASE>>30)&PDP_MASK]; // PML4
269 Addr &= (1ULL << 48)-1;
271 for( i = 0; i < nADDR_SIZES-1; i ++ )
273 // INVLPG( &pmlevels[i][ (Addr >> ADDR_SIZES[i]) &
275 // Check for a large page
276 if( (Addr & ((1ULL << ADDR_SIZES[i])-1)) == 0 && bLargePage )
278 if(Pointer) *Pointer = &pmlevels[i][Addr >> ADDR_SIZES[i]];
279 return ADDR_SIZES[i];
281 // Allocate an entry if required
282 if( !(pmlevels[i][Addr >> ADDR_SIZES[i]] & 1) )
284 if( !bAllocate ) return -4; // If allocation is not requested, error
285 tmp = MM_AllocPhys();
287 pmlevels[i][Addr >> ADDR_SIZES[i]] = tmp | 3;
288 INVLPG( &pmlevels[i+1][ (Addr>>ADDR_SIZES[i])<<9 ] );
289 memset( &pmlevels[i+1][ (Addr>>ADDR_SIZES[i])<<9 ], 0, 0x1000 );
292 else if( pmlevels[i][Addr >> ADDR_SIZES[i]] & PF_LARGE )
295 if( (Addr & ((1ULL << ADDR_SIZES[i])-1)) != 0 ) return -3;
296 if(Pointer) *Pointer = &pmlevels[i][Addr >> ADDR_SIZES[i]];
297 return ADDR_SIZES[i]; // Large page warning
301 // And, set the page table entry
302 if(Pointer) *Pointer = &pmlevels[i][Addr >> ADDR_SIZES[i]];
303 return ADDR_SIZES[i];
307 * \brief Map a physical page to a virtual one
308 * \param VAddr Target virtual address
309 * \param PAddr Physical address of page
310 * \param bTemp Use tempoary mappings
311 * \param bLarge Treat as a large page
313 int MM_MapEx(tVAddr VAddr, tPAddr PAddr, BOOL bTemp, BOOL bLarge)
318 ENTER("xVAddr xPAddr", VAddr, PAddr);
320 // Get page pointer (Allow allocating)
321 rv = MM_GetPageEntryPtr(VAddr, bTemp, 1, bLarge, &ent);
322 if(rv < 0) LEAVE_RET('i', 0);
324 if( *ent & 1 ) LEAVE_RET('i', 0);
335 * \brief Map a physical page to a virtual one
336 * \param VAddr Target virtual address
337 * \param PAddr Physical address of page
339 int MM_Map(tVAddr VAddr, tPAddr PAddr)
341 return MM_MapEx(VAddr, PAddr, 0, 0);
345 * \brief Removed a mapped page
347 void MM_Unmap(tVAddr VAddr)
350 if( !(PAGEMAPLVL4(VAddr >> 39) & 1) ) return ;
352 if( !(PAGEDIRPTR(VAddr >> 30) & 1) ) return ;
354 if( !(PAGEDIR(VAddr >> 21) & 1) ) return ;
356 PAGETABLE(VAddr >> PTAB_SHIFT) = 0;
361 * \brief Allocate a block of memory at the specified virtual address
363 tPAddr MM_Allocate(tVAddr VAddr)
367 ENTER("xVAddr", VAddr);
369 // Ensure the tables are allocated before the page (keeps things neat)
370 MM_GetPageEntryPtr(VAddr, 0, 1, 0, NULL);
373 ret = MM_AllocPhys();
374 LOG("ret = %x", ret);
375 if(!ret) LEAVE_RET('i', 0);
377 if( !MM_Map(VAddr, ret) )
379 Warning("MM_Allocate: Unable to map. Strange, we should have errored earlier");
390 * \brief Deallocate a page at a virtual address
392 void MM_Deallocate(tVAddr VAddr)
396 phys = MM_GetPhysAddr(VAddr);
405 * \brief Get the page table entry of a virtual address
406 * \param Addr Virtual Address
407 * \param Phys Location to put the physical address
408 * \param Flags Flags on the entry (set to zero if unmapped)
409 * \return Size of the entry (in address bits) - 12 = 4KiB page
411 int MM_GetPageEntry(tVAddr Addr, tPAddr *Phys, Uint *Flags)
416 if(!Phys || !Flags) return 0;
418 ret = MM_GetPageEntryPtr(Addr, 0, 0, 0, &ptr);
419 if( ret < 0 ) return 0;
421 *Phys = *ptr & ~0xFFF;
422 *Flags = *ptr & 0xFFF;
427 * \brief Get the physical address of a virtual location
429 tPAddr MM_GetPhysAddr(tVAddr Addr)
434 ret = MM_GetPageEntryPtr(Addr, 0, 0, 0, &ptr);
435 if( ret < 0 ) return 0;
437 return (*ptr & ~0xFFF) | (Addr & 0xFFF);
441 * \brief Sets the flags on a page
443 void MM_SetFlags(tVAddr VAddr, Uint Flags, Uint Mask)
449 rv = MM_GetPageEntryPtr(VAddr, 0, 0, 0, &ent);
452 // Ensure the entry is valid
453 if( !(*ent & 1) ) return ;
456 if( Mask & MM_PFLAG_RO )
458 if( Flags & MM_PFLAG_RO ) {
467 if( Mask & MM_PFLAG_KERNEL )
469 if( Flags & MM_PFLAG_KERNEL ) {
478 if( Mask & MM_PFLAG_COW )
480 if( Flags & MM_PFLAG_COW ) {
491 if( Mask & MM_PFLAG_EXEC )
493 if( Flags & MM_PFLAG_EXEC ) {
503 * \brief Get the flags applied to a page
505 Uint MM_GetFlags(tVAddr VAddr)
510 rv = MM_GetPageEntryPtr(VAddr, 0, 0, 0, &ent);
513 if( !(*ent & 1) ) return 0;
516 if( !(*ent & PF_WRITE) ) ret |= MM_PFLAG_RO;
518 if( !(*ent & PF_USER) ) ret |= MM_PFLAG_KERNEL;
520 if( *ent & PF_COW ) ret |= MM_PFLAG_COW;
522 if( !(*ent & PF_NX) ) ret |= MM_PFLAG_EXEC;
527 // --- Hardware Mappings ---
529 * \brief Map a range of hardware pages
531 tVAddr MM_MapHWPages(tPAddr PAddr, Uint Number)
536 //TODO: Add speedups (memory of first possible free)
537 for( ret = MM_HWMAP_BASE; ret < MM_HWMAP_TOP; ret += 0x1000 )
539 for( num = Number; num -- && ret < MM_HWMAP_TOP; ret += 0x1000 )
541 if( MM_GetPhysAddr(ret) != 0 ) break;
543 if( num >= 0 ) continue;
545 PAddr += 0x1000 * Number;
557 Log_KernelPanic("MM", "TODO: Implement MM_MapHWPages");
562 * \brief Free a range of hardware pages
564 void MM_UnmapHWPages(tVAddr VAddr, Uint Number)
566 // Log_KernelPanic("MM", "TODO: Implement MM_UnmapHWPages");
576 * \fn tVAddr MM_AllocDMA(int Pages, int MaxBits, tPAddr *PhysAddr)
577 * \brief Allocates DMA physical memory
578 * \param Pages Number of pages required
579 * \param MaxBits Maximum number of bits the physical address can have
580 * \param PhysAddr Pointer to the location to place the physical address allocated
581 * \return Virtual address allocate
583 tVAddr MM_AllocDMA(int Pages, int MaxBits, tPAddr *PhysAddr)
589 if(MaxBits < 12 || !PhysAddr) return 0;
592 if(Pages == 1 && MaxBits >= PHYS_BITS)
594 phys = MM_AllocPhys();
596 ret = MM_MapHWPages(phys, 1);
605 phys = MM_AllocPhysRange(Pages, MaxBits);
606 // - Was it allocated?
607 if(phys == 0) return 0;
609 // Allocated successfully, now map
610 ret = MM_MapHWPages(phys, Pages);
612 // If it didn't map, free then return 0
613 for(;Pages--;phys+=0x1000)
622 // --- Tempory Mappings ---
623 tVAddr MM_MapTemp(tPAddr PAddr)
625 Log_KernelPanic("MM", "TODO: Implement MM_MapTemp");
629 void MM_FreeTemp(tVAddr VAddr)
631 Log_KernelPanic("MM", "TODO: Implement MM_FreeTemp");
636 // --- Address Space Clone --
637 tPAddr MM_Clone(void)
641 // #1 Create a copy of the PML4
642 ret = MM_AllocPhys();
645 // #2 Alter the fractal pointer
646 Mutex_Acquire(&glMM_TempFractalLock);
649 INVLPG(TMPMAPLVL4(0));
650 memcpy(&TMPMAPLVL4(0), &PAGEMAPLVL4(0), 0x1000);
652 Log_KernelPanic("MM", "TODO: Implement MM_Clone");
654 // #3 Set Copy-On-Write to all user pages
657 INVLPG(TMPMAPLVL4(0));
658 Mutex_Release(&glMM_TempFractalLock);
662 void MM_ClearUser(void)
665 // #1 Traverse the structure < 2^47, Deref'ing all pages
666 // #2 Free tables/dirs/pdps once they have been cleared
668 for( addr = 0; addr < 0x800000000000; )
670 if( PAGEMAPLVL4(addr >> PML4_SHIFT) & 1 )
672 if( PAGEDIRPTR(addr >> PDP_SHIFT) & 1 )
674 if( PAGEDIR(addr >> PDIR_SHIFT) & 1 )
677 if( PAGETABLE(addr >> PTAB_SHIFT) & 1 ) {
678 MM_DerefPhys( PAGETABLE(addr >> PTAB_SHIFT) & PADDR_MASK );
679 PAGETABLE(addr >> PTAB_SHIFT) = 0;
681 addr += 1 << PTAB_SHIFT;
682 // Dereference the PDIR Entry
683 if( (addr + (1 << PTAB_SHIFT)) >> PDIR_SHIFT != (addr >> PDIR_SHIFT) ) {
684 MM_DerefPhys( PAGEMAPLVL4(addr >> PDIR_SHIFT) & PADDR_MASK );
685 PAGEDIR(addr >> PDIR_SHIFT) = 0;
689 addr += 1 << PDIR_SHIFT;
692 // Dereference the PDP Entry
693 if( (addr + (1 << PDIR_SHIFT)) >> PDP_SHIFT != (addr >> PDP_SHIFT) ) {
694 MM_DerefPhys( PAGEMAPLVL4(addr >> PDP_SHIFT) & PADDR_MASK );
695 PAGEDIRPTR(addr >> PDP_SHIFT) = 0;
699 addr += 1 << PDP_SHIFT;
702 // Dereference the PML4 Entry
703 if( (addr + (1 << PDP_SHIFT)) >> PML4_SHIFT != (addr >> PML4_SHIFT) ) {
704 MM_DerefPhys( PAGEMAPLVL4(addr >> PML4_SHIFT) & PADDR_MASK );
705 PAGEMAPLVL4(addr >> PML4_SHIFT) = 0;
709 addr += (tVAddr)1 << PML4_SHIFT;
715 tVAddr MM_NewWorkerStack(void)
720 // Log_KernelPanic("MM", "TODO: Implement MM_NewWorkerStack");
722 // #1 Set temp fractal to PID0
723 Mutex_Acquire(&glMM_TempFractalLock);
724 TMPCR3() = ((tPAddr)gInitialPML4 - KERNEL_BASE) | 3;
726 // #2 Scan for a free stack addresss < 2^47
727 for(ret = 0x100000; ret < (1ULL << 47); ret += KERNEL_STACK_SIZE)
729 if( MM_GetPhysAddr(ret) == 0 ) break;
731 if( ret >= (1ULL << 47) ) {
732 Mutex_Release(&glMM_TempFractalLock);
736 // #3 Map all save the last page in the range
737 // - This acts as as guard page, and doesn't cost us anything.
738 for( i = 0; i < KERNEL_STACK_SIZE/0x1000 - 1; i ++ )
740 tPAddr phys = MM_AllocPhys();
743 Log_Error("MM", "MM_NewWorkerStack - Unable to allocate page");
746 MM_MapEx(ret + i*0x1000, phys, 1, 0);
749 Mutex_Release(&glMM_TempFractalLock);
751 return ret + i*0x1000;
755 * \brief Allocate a new kernel stack
757 tVAddr MM_NewKStack(void)
759 tVAddr base = MM_KSTACK_BASE;
761 for( ; base < MM_KSTACK_TOP; base += KERNEL_STACK_SIZE )
763 if(MM_GetPhysAddr(base) != 0)
766 //Log("MM_NewKStack: Found one at %p", base + KERNEL_STACK_SIZE);
767 for( i = 0; i < KERNEL_STACK_SIZE; i += 0x1000)
769 if( !MM_Allocate(base+i) )
771 Log_Warning("MM", "MM_NewKStack - Allocation failed");
772 for( i -= 0x1000; i; i -= 0x1000)
773 MM_Deallocate(base+i);
778 return base + KERNEL_STACK_SIZE;
780 Log_Warning("MM", "MM_NewKStack - No address space left\n");