Kernel/drv/ne2000.c

   1 /* Acess2
   2  * NE2000 Driver
   3  *
   4  * See: ~/Sources/bochs/bochs.../iodev/ne2k.cc
   5  */
   6 #define DEBUG   1
   7 #include <common.h>
   8 #include <modules.h>
   9 #include <fs_devfs.h>
  10 #include <drv_pci.h>
  11
  12 // === CONSTANTS ===
  13 #define MEM_START       0x40
  14 #define MEM_END         0xC0
  15 #define RX_FIRST        (MEM_START)
  16 #define RX_LAST         (MEM_START+RX_BUF_SIZE-1)
  17 #define RX_BUF_SIZE     0x40
  18 #define TX_FIRST        (MEM_START+RX_BUF_SIZE)
  19 #define TX_LAST         (MEM_END)
  20 #define TX_BUF_SIZE     0x40
  21
  22 static const struct {
  23         Uint16  Vendor;
  24         Uint16  Device;
  25 } csaCOMPAT_DEVICES[] = {
  26         {0x10EC, 0x8029},       // Realtek 8029
  27         {0x10EC, 0x8129}        // Realtek 8129
  28 };
  29 #define NUM_COMPAT_DEVICES      (sizeof(csaCOMPAT_DEVICES)/sizeof(csaCOMPAT_DEVICES[0]))
  30
  31 enum eNe2k_Page0Read {
  32         CMD = 0,        //!< the master command register
  33         CLDA0,          //!< Current Local DMA Address 0
  34         CLDA1,          //!< Current Local DMA Address 1
  35         BNRY,           //!< Boundary Pointer (for ringbuffer)
  36         TSR,            //!< Transmit Status Register
  37         NCR,            //!< collisions counter
  38         FIFO,           //!< (for what purpose ??)
  39         ISR,            //!< Interrupt Status Register
  40         CRDA0,          //!< Current Remote DMA Address 0
  41         CRDA1,          //!< Current Remote DMA Address 1
  42         RSR = 0xC       //!< Receive Status Register
  43 };
  44
  45 enum eNe2k_Page0Write {
  46         PSTART = 1,     //!< page start (init only)
  47         PSTOP,          //!< page stop  (init only)
  48         TPSR = 4,       //!< transmit page start address
  49         TBCR0,          //!< transmit byte count (low)
  50         TBCR1,          //!< transmit byte count (high)
  51         RSAR0 = 8,      //!< remote start address (lo)
  52         RSAR1,  //!< remote start address (hi)
  53         RBCR0,  //!< remote byte count (lo)
  54         RBCR1,  //!< remote byte count (hi)
  55         RCR,    //!< receive config register
  56         TCR,    //!< transmit config register
  57         DCR,    //!< data config register    (init)
  58         IMR             //!< interrupt mask register (init)
  59 };
  60
  61 // === TYPES ===
  62 typedef struct sNe2k_Card {
  63         Uint16  IOBase; //!< IO Port Address from PCI
  64         Uint8   IRQ;    //!< IRQ Assigned from PCI
  65
  66          int    NextMemPage;    //!< Next Card Memory page to use
  67
  68         Uint8   Buffer[RX_BUF_SIZE];
  69
  70         char    Name[2];        // "0"
  71         tVFS_Node       Node;
  72         Uint8   MacAddr[6];
  73 } tCard;
  74
  75 // === PROTOTYPES ===
  76  int    Ne2k_Install(char **Arguments);
  77 char    *Ne2k_ReadDir(tVFS_Node *Node, int Pos);
  78 tVFS_Node       *Ne2k_FindDir(tVFS_Node *Node, char *Name);
  79 Uint64  Ne2k_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer);
  80 Uint8   Ne2k_int_GetWritePage(tCard *Card, Uint16 Length);
  81 void    Ne2k_IRQHandler(int IntNum);
  82
  83 // === GLOBALS ===
  84 MODULE_DEFINE(0, 0x0032, Ne2k, Ne2k_Install, NULL, NULL);
  85 tDevFS_Driver   gNe2k_DriverInfo = {
  86         NULL, "ne2k",
  87         {
  88         .NumACLs = 1,
  89         .ACLs = &gVFS_ACL_EveryoneRX,
  90         .Flags = VFS_FFLAG_DIRECTORY,
  91         .ReadDir = Ne2k_ReadDir,
  92         .FindDir = Ne2k_FindDir
  93         }
  94 };
  95 Uint16  gNe2k_BaseAddress;
  96  int    giNe2k_CardCount = 0;
  97 tCard   *gpNe2k_Cards = NULL;
  98
  99 // === CODE ===
 100 /**
 101  * \fn int Ne2k_Install(char **Options)
 102  * \brief Installs the NE2000 Driver
 103  */
 104 int Ne2k_Install(char **Options)
 105 {
 106          int    i, j, k;
 107          int    count, id, base;
 108
 109         // --- Scan PCI Bus ---
 110         // Count Cards
 111         giNe2k_CardCount = 0;
 112         for( i = 0; i < NUM_COMPAT_DEVICES; i ++ )
 113         {
 114                 giNe2k_CardCount += PCI_CountDevices( csaCOMPAT_DEVICES[i].Vendor, csaCOMPAT_DEVICES[i].Device, 0 );
 115         }
 116
 117         // Enumerate Cards
 118         k = 0;
 119         gpNe2k_Cards = malloc( giNe2k_CardCount * sizeof(tCard) );
 120         memsetd(gpNe2k_Cards, 0, giNe2k_CardCount * sizeof(tCard) / 4);
 121         for( i = 0; i < NUM_COMPAT_DEVICES; i ++ )
 122         {
 123                 count = PCI_CountDevices( csaCOMPAT_DEVICES[i].Vendor, csaCOMPAT_DEVICES[i].Device, 0 );
 124                 for( j = 0; j < count; j ++,k ++ )
 125                 {
 126                         id = PCI_GetDevice( csaCOMPAT_DEVICES[i].Vendor, csaCOMPAT_DEVICES[i].Device, 0, j );
 127                         // Create Structure
 128                         base = PCI_AssignPort( id, 0, 0x20 );
 129                         gpNe2k_Cards[ k ].IOBase = base;
 130                         gpNe2k_Cards[ k ].IRQ = PCI_GetIRQ( id );
 131                         gpNe2k_Cards[ k ].NextMemPage = 64;
 132
 133                         // Install IRQ Handler
 134                         IRQ_AddHandler(gpNe2k_Cards[ k ].IRQ, Ne2k_IRQHandler);
 135
 136                         // Reset Card
 137                         outb( base + 0x1F, inb(base + 0x1F) );
 138                         while( (inb( base+ISR ) & 0x80) == 0 );
 139                         outb( base + ISR, 0x80 );
 140
 141                         // Initialise Card
 142                         outb( base + CMD, 0x21 );       // No DMA and Stop
 143                         outb( base + DCR, 0x49 );       // Set WORD mode
 144                         outb( base + IMR, 0x00 );
 145                         outb( base + ISR, 0xFF );
 146                         outb( base + RCR, 0x20 );       // Reciever to Monitor
 147                         outb( base + TCR, 0x02 );       // Transmitter OFF (TCR.LB = 1, Internal Loopback)
 148                         outb( base + RBCR0, 6*4 );      // Remote Byte Count
 149                         outb( base + RBCR1, 0 );
 150                         outb( base + RSAR0, 0 );        // Clear Source Address
 151                         outb( base + RSAR1, 0 );
 152                         outb( base + CMD, 0x0A );       // Remote Read, Start
 153
 154                         // Read MAC Address
 155                         gpNe2k_Cards[ k ].MacAddr[0] = inb(base+0x10);  inb(base+0x10);
 156                         gpNe2k_Cards[ k ].MacAddr[1] = inb(base+0x10);  inb(base+0x10);
 157                         gpNe2k_Cards[ k ].MacAddr[2] = inb(base+0x10);  inb(base+0x10);
 158                         gpNe2k_Cards[ k ].MacAddr[3] = inb(base+0x10);  inb(base+0x10);
 159                         gpNe2k_Cards[ k ].MacAddr[4] = inb(base+0x10);  inb(base+0x10);
 160                         gpNe2k_Cards[ k ].MacAddr[5] = inb(base+0x10);  inb(base+0x10);
 161
 162                         outb( base+PSTART, RX_FIRST);   // Set Receive Start
 163                         outb( base+BNRY, RX_LAST-1);    // Set Boundary Page
 164                         outb( base+PSTOP, RX_LAST);     // Set Stop Page
 165                         outb( base+ISR, 0xFF ); // Clear all ints
 166                         outb( base+CMD, 0x22 ); // No DMA, Start
 167                         outb( base+IMR, 0x3F ); // Set Interupt Mask
 168                         outb( base+RCR, 0x0F ); // Set WRAP and allow all packet matches
 169                         outb( base+TCR, 0x00 ); // Set Normal Transmitter mode
 170                         outb( base+TPSR, 0x40); // Set Transmit Start
 171                         // Set MAC Address
 172                         /*
 173                         Ne2k_WriteReg(base, MAC0, gpNe2k_Cards[ k ].MacAddr[0]);
 174                         Ne2k_WriteReg(base, MAC1, gpNe2k_Cards[ k ].MacAddr[1]);
 175                         Ne2k_WriteReg(base, MAC2, gpNe2k_Cards[ k ].MacAddr[2]);
 176                         Ne2k_WriteReg(base, MAC3, gpNe2k_Cards[ k ].MacAddr[3]);
 177                         Ne2k_WriteReg(base, MAC4, gpNe2k_Cards[ k ].MacAddr[4]);
 178                         Ne2k_WriteReg(base, MAC5, gpNe2k_Cards[ k ].MacAddr[5]);
 179                         */
 180
 181                         Log("[NE2K]: Card #%i: IRQ=%i, IOBase=0x%x",
 182                                 k, gpNe2k_Cards[ k ].IRQ, gpNe2k_Cards[ k ].IOBase);
 183                         Log("MAC Address %x:%x:%x:%x:%x:%x",
 184                                 gpNe2k_Cards[ k ].MacAddr[0], gpNe2k_Cards[ k ].MacAddr[1],
 185                                 gpNe2k_Cards[ k ].MacAddr[2], gpNe2k_Cards[ k ].MacAddr[3],
 186                                 gpNe2k_Cards[ k ].MacAddr[4], gpNe2k_Cards[ k ].MacAddr[5]
 187                                 );
 188
 189                         // Set VFS Node
 190                         gpNe2k_Cards[ k ].Name[0] = '0'+k;
 191                         gpNe2k_Cards[ k ].Name[1] = '\0';
 192                         gpNe2k_Cards[ k ].Node.ImplPtr = &gpNe2k_Cards[ k ];
 193                         gpNe2k_Cards[ k ].Node.NumACLs = 0;     // Root Only
 194                         gpNe2k_Cards[ k ].Node.CTime = now();
 195                         gpNe2k_Cards[ k ].Node.Write = Ne2k_Write;
 196                 }
 197         }
 198
 199         gNe2k_DriverInfo.RootNode.Size = giNe2k_CardCount;
 200         DevFS_AddDevice( &gNe2k_DriverInfo );
 201         return 0;
 202 }
 203
 204 /**
 205  * \fn char *Ne2k_ReadDir(tVFS_Node *Node, int Pos)
 206  */
 207 char *Ne2k_ReadDir(tVFS_Node *Node, int Pos)
 208 {
 209         char    ret[2];
 210         if(Pos < 0 || Pos >= giNe2k_CardCount)  return NULL;
 211         ret[0] = '0'+Pos;
 212         ret[1] = '\0';
 213         return strdup(ret);
 214 }
 215
 216 /**
 217  * \fn tVFS_Node *Ne2k_FindDir(tVFS_Node *Node, char *Name)
 218  */
 219 tVFS_Node *Ne2k_FindDir(tVFS_Node *Node, char *Name)
 220 {
 221         if(Name[0] == '\0' || Name[1] != '\0')  return NULL;
 222
 223         return &gpNe2k_Cards[ Name[0]-'0' ].Node;
 224 }
 225
 226 /**
 227  * \fn Uint64 Ne2k_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
 228  */
 229 Uint64 Ne2k_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
 230 {
 231         tCard   *Card = (tCard*)Node->ImplPtr;
 232         Uint16  *buf = Buffer;
 233          int    rem = Length;
 234
 235         ENTER("pNode XOffset XLength pBuffer", Node, Offset, Length, Buffer);
 236
 237         // Sanity Check Length
 238         if(Length > TX_BUF_SIZE) {
 239                 LEAVE('i', 0);
 240                 return 0;
 241         }
 242
 243         // Make sure that the card is in page 0
 244         outb(Card->IOBase + CMD, 0|0x22);       // Page 0, Start, NoDMA
 245
 246         // Clear Remote DMA Flag
 247         outb(Card->IOBase + ISR, 0x40); // Bit 6
 248
 249         // Send Size - Remote Byte Count Register
 250         outb(Card->IOBase + TBCR0, Length & 0xFF);
 251         outb(Card->IOBase + TBCR1, Length >> 8);
 252
 253         // Send Size - Remote Byte Count Register
 254         outb(Card->IOBase + RBCR0, Length & 0xFF);
 255         outb(Card->IOBase + RBCR1, Length >> 8);
 256
 257         // Set up transfer
 258         outb(Card->IOBase + RSAR0, 0x00);       // Page Offset
 259         outb(Card->IOBase + RSAR1, Ne2k_int_GetWritePage(Card, Length));        // Page Offset
 260         // Start
 261         //outb(Card->IOBase + CMD, 0|0x18|0x4|0x2);     // Page 0, Transmit Packet, TXP, Start
 262         outb(Card->IOBase + CMD, 0|0x10|0x2);   // Page 0, Remote Write, Start
 263
 264         // Send Data
 265         for(rem = Length; rem; rem -= 2)
 266                 outw(Card->IOBase + 0x10, *buf++);
 267
 268         while( inb(Card->IOBase + ISR) == 0)    // Wait for Remote DMA Complete
 269                 ;       //Proc_Yield();
 270
 271         outb( Card->IOBase + ISR, 0x40 );       // ACK Interrupt
 272
 273         // Send Packet
 274         outb(Card->IOBase + CMD, 0|0x10|0x4|0x2);
 275
 276         // Complete DMA
 277         //outb(Card->IOBase + CMD, 0|0x20);
 278
 279         LEAVE('i', Length);
 280         return Length;
 281 }
 282
 283 /**
 284  * \fn Uint8 Ne2k_int_GetWritePage(tCard *Card, Uint16 Length)
 285  */
 286 Uint8 Ne2k_int_GetWritePage(tCard *Card, Uint16 Length)
 287 {
 288         Uint8   ret = Card->NextMemPage;
 289
 290         Card->NextMemPage += (Length + 0xFF) >> 8;
 291         if(Card->NextMemPage >= TX_LAST) {
 292                 Card->NextMemPage -= TX_BUF_SIZE;
 293         }
 294
 295         return ret;
 296 }
 297
 298 /**
 299  * \fn void Ne2k_IRQHandler(int IntNum)
 300  */
 301 void Ne2k_IRQHandler(int IntNum)
 302 {
 303          int    i;
 304         for( i = 0; i < giNe2k_CardCount; i++ )
 305         {
 306                 if(gpNe2k_Cards[i].IRQ == IntNum) {
 307                         LOG("Clearing interrupts on card %i (0x%x)\n", i, inb( gpNe2k_Cards[i].IOBase + ISR ));
 308                         outb( gpNe2k_Cards[i].IOBase + ISR, 0xFF );     // Reset All
 309                         return ;
 310                 }
 311         }
 312         Warning("[NE2K ] Recieved Unknown IRQ %i", IntNum);
 313 }