Kernel/drv/ne2000.c

   1 /* Acess2
   2  * NE2000 Driver
   3  *
   4  * See: ~/Sources/bochs/bochs.../iodev/ne2k.cc
   5  */
   6 #include <common.h>
   7 #include <modules.h>
   8 #include <fs_devfs.h>
   9 #include <drv_pci.h>
  10
  11 // === CONSTANTS ===
  12 #define MEM_START       0x40
  13 #define MEM_END         0xC0
  14 #define RX_FIRST        (MEM_START)
  15 #define RX_LAST         (MEM_START+RX_BUF_SIZE-1)
  16 #define RX_BUF_SIZE     0x40
  17 #define TX_FIRST        (MEM_START+RX_BUF_SIZE)
  18 #define TX_LAST         (MEM_END)
  19 #define TX_BUF_SIZE     0x40
  20
  21 static const struct {
  22         Uint16  Vendor;
  23         Uint16  Device;
  24 } csaCOMPAT_DEVICES[] = {
  25         {0x10EC, 0x8029},       // Realtek 8029
  26         {0x10EC, 0x8129}        // Realtek 8129
  27 };
  28 #define NUM_COMPAT_DEVICES      (sizeof(csaCOMPAT_DEVICES)/sizeof(csaCOMPAT_DEVICES[0]))
  29
  30 enum eNe2k_Page0Read {
  31         CMD = 0,        //!< the master command register
  32         CLDA0,          //!< Current Local DMA Address 0
  33         CLDA1,          //!< Current Local DMA Address 1
  34         BNRY,           //!< Boundary Pointer (for ringbuffer)
  35         TSR,            //!< Transmit Status Register
  36         NCR,            //!< collisions counter
  37         FIFO,           //!< (for what purpose ??)
  38         ISR,            //!< Interrupt Status Register
  39         CRDA0,          //!< Current Remote DMA Address 0
  40         CRDA1,          //!< Current Remote DMA Address 1
  41         RSR = 0xC       //!< Receive Status Register
  42 };
  43
  44 enum eNe2k_Page0Write {
  45         PSTART = 1,     //!< page start (init only)
  46         PSTOP,          //!< page stop  (init only)
  47         TPSR = 4,       //!< transmit page start address
  48         TBCR0,          //!< transmit byte count (low)
  49         TBCR1,          //!< transmit byte count (high)
  50         RSAR0 = 8,      //!< remote start address (lo)
  51         RSAR1,  //!< remote start address (hi)
  52         RBCR0,  //!< remote byte count (lo)
  53         RBCR1,  //!< remote byte count (hi)
  54         RCR,    //!< receive config register
  55         TCR,    //!< transmit config register
  56         DCR,    //!< data config register    (init)
  57         IMR             //!< interrupt mask register (init)
  58 };
  59
  60 // === TYPES ===
  61 typedef struct sNe2k_Card {
  62         Uint16  IOBase; //!< IO Port Address from PCI
  63         Uint8   IRQ;    //!< IRQ Assigned from PCI
  64
  65          int    NextMemPage;    //!< Next Card Memory page to use
  66
  67         Uint8   Buffer[RX_BUF_SIZE];
  68
  69         char    Name[2];        // "0"
  70         tVFS_Node       Node;
  71         Uint8   MacAddr[6];
  72 } tCard;
  73
  74 // === PROTOTYPES ===
  75  int    Ne2k_Install(char **Arguments);
  76 char    *Ne2k_ReadDir(tVFS_Node *Node, int Pos);
  77 tVFS_Node       *Ne2k_FindDir(tVFS_Node *Node, char *Name);
  78 Uint64  Ne2k_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer);
  79 Uint8   Ne2k_int_GetWritePage(tCard *Card, Uint16 Length);
  80 void    Ne2k_IRQHandler(int IntNum);
  81
  82 // === GLOBALS ===
  83 MODULE_DEFINE(0, 0x0032, Ne2k, Ne2k_Install, NULL, NULL);
  84 tDevFS_Driver   gNe2k_DriverInfo = {
  85         NULL, "ne2k",
  86         {
  87         .NumACLs = 1,
  88         .ACLs = &gVFS_ACL_EveryoneRX,
  89         .Flags = VFS_FFLAG_DIRECTORY,
  90         .ReadDir = Ne2k_ReadDir,
  91         .FindDir = Ne2k_FindDir
  92         }
  93 };
  94 Uint16  gNe2k_BaseAddress;
  95  int    giNe2k_CardCount = 0;
  96 tCard   *gpNe2k_Cards = NULL;
  97
  98 // === CODE ===
  99 /**
 100  * \fn int Ne2k_Install(char **Options)
 101  * \brief Installs the NE2000 Driver
 102  */
 103 int Ne2k_Install(char **Options)
 104 {
 105          int    i, j, k;
 106          int    count, id, base;
 107
 108         // --- Scan PCI Bus ---
 109         // Count Cards
 110         giNe2k_CardCount = 0;
 111         for( i = 0; i < NUM_COMPAT_DEVICES; i ++ )
 112         {
 113                 giNe2k_CardCount += PCI_CountDevices( csaCOMPAT_DEVICES[i].Vendor, csaCOMPAT_DEVICES[i].Device, 0 );
 114         }
 115
 116         // Enumerate Cards
 117         k = 0;
 118         gpNe2k_Cards = malloc( giNe2k_CardCount * sizeof(tCard) );
 119         memsetd(gpNe2k_Cards, 0, giNe2k_CardCount * sizeof(tCard) / 4);
 120         for( i = 0; i < NUM_COMPAT_DEVICES; i ++ )
 121         {
 122                 count = PCI_CountDevices( csaCOMPAT_DEVICES[i].Vendor, csaCOMPAT_DEVICES[i].Device, 0 );
 123                 for( j = 0; j < count; j ++,k ++ )
 124                 {
 125                         id = PCI_GetDevice( csaCOMPAT_DEVICES[i].Vendor, csaCOMPAT_DEVICES[i].Device, 0, j );
 126                         // Create Structure
 127                         base = PCI_AssignPort( id, 0, 0x20 );
 128                         gpNe2k_Cards[ k ].IOBase = base;
 129                         gpNe2k_Cards[ k ].IRQ = PCI_GetIRQ( id );
 130                         gpNe2k_Cards[ k ].NextMemPage = 64;
 131
 132                         // Install IRQ Handler
 133                         IRQ_AddHandler(gpNe2k_Cards[ k ].IRQ, Ne2k_IRQHandler);
 134
 135                         // Reset Card
 136                         outb( base + 0x1F, inb(base + 0x1F) );
 137                         while( (inb( base+ISR ) & 0x80) == 0 );
 138                         outb( base + ISR, 0x80 );
 139
 140                         // Initialise Card
 141                         outb( base + CMD, 0x21 );       // No DMA and Stop
 142                         outb( base + DCR, 0x49 );       // Set WORD mode
 143                         outb( base + IMR, 0x00 );
 144                         outb( base + ISR, 0xFF );
 145                         outb( base + RCR, 0x20 );       // Reciever to Monitor
 146                         outb( base + TCR, 0x02 );       // Transmitter OFF
 147                         outb( base + RBCR0, 6*4 );      // Remote Byte Count
 148                         outb( base + RBCR1, 0 );
 149                         outb( base + RSAR0, 0 );        // Clear Source Address
 150                         outb( base + RSAR1, 0 );
 151                         outb( base + CMD, 0x0A );       // Remote Read, Start
 152
 153                         // Read MAC Address
 154                         gpNe2k_Cards[ k ].MacAddr[0] = inb(base+0x10);  inb(base+0x10);
 155                         gpNe2k_Cards[ k ].MacAddr[1] = inb(base+0x10);  inb(base+0x10);
 156                         gpNe2k_Cards[ k ].MacAddr[2] = inb(base+0x10);  inb(base+0x10);
 157                         gpNe2k_Cards[ k ].MacAddr[3] = inb(base+0x10);  inb(base+0x10);
 158                         gpNe2k_Cards[ k ].MacAddr[4] = inb(base+0x10);  inb(base+0x10);
 159                         gpNe2k_Cards[ k ].MacAddr[5] = inb(base+0x10);  inb(base+0x10);
 160
 161                         outb( base+PSTART, RX_FIRST);   // Set Receive Start
 162                         outb( base+BNRY, RX_LAST-1);    // Set Boundary Page
 163                         outb( base+PSTOP, RX_LAST);     // Set Stop Page
 164                         outb( base+ISR, 0xFF ); // Clear all ints
 165                         outb( base+CMD, 0x22 ); // No DMA, Start
 166                         outb( base+IMR, 0x3F ); // Set Interupt Mask
 167                         outb( base+RCR, 0x8F ); // Set WRAP and allow all packet matches
 168                         outb( base+TCR, 0x00 ); // Set Normal Transmitter mode
 169                         outb( base+TPSR, 0x40); // Set Transmit Start
 170                         // Set MAC Address
 171                         /*
 172                         Ne2k_WriteReg(base, MAC0, gpNe2k_Cards[ k ].MacAddr[0]);
 173                         Ne2k_WriteReg(base, MAC1, gpNe2k_Cards[ k ].MacAddr[1]);
 174                         Ne2k_WriteReg(base, MAC2, gpNe2k_Cards[ k ].MacAddr[2]);
 175                         Ne2k_WriteReg(base, MAC3, gpNe2k_Cards[ k ].MacAddr[3]);
 176                         Ne2k_WriteReg(base, MAC4, gpNe2k_Cards[ k ].MacAddr[4]);
 177                         Ne2k_WriteReg(base, MAC5, gpNe2k_Cards[ k ].MacAddr[5]);
 178                         */
 179
 180                         Log("[NE2K]: Card #%i: IRQ=%i, IOBase=0x%x",
 181                                 k, gpNe2k_Cards[ k ].IRQ, gpNe2k_Cards[ k ].IOBase);
 182                         Log("MAC Address %x:%x:%x:%x:%x:%x",
 183                                 gpNe2k_Cards[ k ].MacAddr[0], gpNe2k_Cards[ k ].MacAddr[1],
 184                                 gpNe2k_Cards[ k ].MacAddr[2], gpNe2k_Cards[ k ].MacAddr[3],
 185                                 gpNe2k_Cards[ k ].MacAddr[4], gpNe2k_Cards[ k ].MacAddr[5]
 186                                 );
 187
 188                         // Set VFS Node
 189                         gpNe2k_Cards[ k ].Name[0] = '0'+k;
 190                         gpNe2k_Cards[ k ].Name[1] = '\0';
 191                         gpNe2k_Cards[ k ].Node.ImplPtr = &gpNe2k_Cards[ k ];
 192                         gpNe2k_Cards[ k ].Node.NumACLs = 0;     // Root Only
 193                         gpNe2k_Cards[ k ].Node.CTime = now();
 194                         gpNe2k_Cards[ k ].Node.Write = Ne2k_Write;
 195                 }
 196         }
 197
 198         gNe2k_DriverInfo.RootNode.Size = giNe2k_CardCount;
 199         DevFS_AddDevice( &gNe2k_DriverInfo );
 200         return 0;
 201 }
 202
 203 /**
 204  * \fn char *Ne2k_ReadDir(tVFS_Node *Node, int Pos)
 205  */
 206 char *Ne2k_ReadDir(tVFS_Node *Node, int Pos)
 207 {
 208         char    ret[2];
 209         if(Pos < 0 || Pos >= giNe2k_CardCount)  return NULL;
 210         ret[0] = '0'+Pos;
 211         ret[1] = '\0';
 212         return strdup(ret);
 213 }
 214
 215 /**
 216  * \fn tVFS_Node *Ne2k_FindDir(tVFS_Node *Node, char *Name)
 217  */
 218 tVFS_Node *Ne2k_FindDir(tVFS_Node *Node, char *Name)
 219 {
 220         if(Name[0] == '\0' || Name[1] != '\0')  return NULL;
 221
 222         return &gpNe2k_Cards[ Name[0]-'0' ].Node;
 223 }
 224
 225 /**
 226  * \fn Uint64 Ne2k_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
 227  */
 228 Uint64 Ne2k_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
 229 {
 230         tCard   *Card = (tCard*)Node->ImplPtr;
 231         Uint16  *buf = Buffer;
 232          int    rem = Length;
 233
 234         // Sanity Check Length
 235         if(Length > TX_BUF_SIZE)        return 0;
 236
 237         outb(Card->IOBase + CMD, 0|0x22);       // Page 0, Start, NoDMA
 238         // Send Size
 239         outb(Card->IOBase + RBCR0, Length & 0xFF);
 240         outb(Card->IOBase + RBCR1, Length >> 8);
 241         // Clear Remote DMA Flag
 242         outb(Card->IOBase + ISR, 0x40); // Bit 6
 243         // Set up transfer
 244         outb(Card->IOBase + RSAR0, 0x00);       // Page Offset
 245         outb(Card->IOBase + RSAR1, Ne2k_int_GetWritePage(Card, Length));        // Page Offset
 246         // Start
 247         outb(Card->IOBase + CMD, 0|0x12);       // Page 0, Start, DMA
 248
 249         // Send Data
 250         for(rem = Length; rem; rem -= 2)
 251                 outw(Card->IOBase + 0x10, *buf++);
 252         return 0;
 253 }
 254
 255 /**
 256  * \fn Uint8 Ne2k_int_GetWritePage(tCard *Card, Uint16 Length)
 257  */
 258 Uint8 Ne2k_int_GetWritePage(tCard *Card, Uint16 Length)
 259 {
 260         Uint8   ret = Card->NextMemPage;
 261
 262         Card->NextMemPage += (Length + 0xFF) >> 8;
 263         if(Card->NextMemPage >= TX_LAST) {
 264                 Card->NextMemPage -= TX_BUF_SIZE;
 265         }
 266
 267         return ret;
 268 }
 269
 270 /**
 271  * \fn void Ne2k_IRQHandler(int IntNum)
 272  */
 273 void Ne2k_IRQHandler(int IntNum)
 274 {
 275 }