4 * Virtual Memory Manager
9 #include <threads_int.h>
13 // === DEBUG OPTIONS ===
17 #define PHYS_BITS 52 // TODO: Move out
25 #define PADDR_MASK 0x7FFFFFFF##FFFFF000
26 #define PAGE_MASK ((1LL << 36)-1)
27 #define TABLE_MASK ((1LL << 27)-1)
28 #define PDP_MASK ((1LL << 18)-1)
29 #define PML4_MASK ((1LL << 9)-1)
31 #define PF_PRESENT 0x001
32 #define PF_WRITE 0x002
34 #define PF_LARGE 0x080
35 #define PF_GLOBAL 0x100
37 #define PF_PAGED 0x400
38 #define PF_NX 0x80000000##00000000
41 #define PAGETABLE(idx) (*((Uint64*)MM_FRACTAL_BASE+((idx)&PAGE_MASK)))
42 #define PAGEDIR(idx) PAGETABLE((MM_FRACTAL_BASE>>12)+((idx)&TABLE_MASK))
43 #define PAGEDIRPTR(idx) PAGEDIR((MM_FRACTAL_BASE>>21)+((idx)&PDP_MASK))
44 #define PAGEMAPLVL4(idx) PAGEDIRPTR((MM_FRACTAL_BASE>>30)+((idx)&PML4_MASK))
46 #define TMPCR3() PAGEMAPLVL4(MM_TMPFRAC_BASE>>39)
47 #define TMPTABLE(idx) (*((Uint64*)MM_TMPFRAC_BASE+((idx)&PAGE_MASK)))
48 #define TMPDIR(idx) PAGETABLE((MM_TMPFRAC_BASE>>12)+((idx)&TABLE_MASK))
49 #define TMPDIRPTR(idx) PAGEDIR((MM_TMPFRAC_BASE>>21)+((idx)&PDP_MASK))
50 #define TMPMAPLVL4(idx) PAGEDIRPTR((MM_TMPFRAC_BASE>>30)+((idx)&PML4_MASK))
52 #define INVLPG(__addr) __asm__ __volatile__ ("invlpg (%0)"::"r"(__addr))
53 #define INVLPG_ALL() __asm__ __volatile__ ("mov %cr3,%rax;\n\tmov %rax,%cr3;")
54 #define INVLPG_GLOBAL() __asm__ __volatile__ ("mov %cr4,%rax;\n\txorl $0x80, %eax;\n\tmov %rax,%cr4;\n\txorl $0x80, %eax;\n\tmov %rax,%cr4")
57 //tPAddr * const gaPageTable = MM_FRACTAL_BASE;
60 extern void Error_Backtrace(Uint IP, Uint BP);
61 extern tPAddr gInitialPML4[512];
62 extern void Threads_SegFault(tVAddr Addr);
63 extern char _UsertextBase[];
66 void MM_InitVirt(void);
67 //void MM_FinishVirtualInit(void);
68 void MM_int_ClonePageEnt( Uint64 *Ent, void *NextLevel, tVAddr Addr, int bTable );
69 int MM_PageFault(tVAddr Addr, Uint ErrorCode, tRegs *Regs);
70 void MM_int_DumpTablesEnt(tVAddr RangeStart, size_t Length, tPAddr Expected);
71 //void MM_DumpTables(tVAddr Start, tVAddr End);
72 int MM_GetPageEntryPtr(tVAddr Addr, BOOL bTemp, BOOL bAllocate, BOOL bLargePage, tPAddr **Pointer);
73 int MM_MapEx(volatile void *VAddr, tPAddr PAddr, BOOL bTemp, BOOL bLarge);
74 // int MM_Map(tVAddr VAddr, tPAddr PAddr);
75 void MM_Unmap(tVAddr VAddr);
76 void MM_int_ClearTableLevel(tVAddr VAddr, int LevelBits, int MaxEnts);
77 //void MM_ClearUser(void);
78 int MM_GetPageEntry(tVAddr Addr, tPAddr *Phys, Uint *Flags);
81 tMutex glMM_TempFractalLock;
82 tShortSpinlock glMM_ZeroPage;
86 void MM_InitVirt(void)
88 // Log_Debug("MMVirt", "&PAGEMAPLVL4(0) = %p", &PAGEMAPLVL4(0));
89 // MM_DumpTables(0, -1L);
92 void MM_FinishVirtualInit(void)
98 * \brief Clone a page from an entry
99 * \param Ent Pointer to the entry in the PML4/PDP/PD/PT
100 * \param NextLevel Pointer to contents of the entry
101 * \param Addr Dest address
104 void MM_int_ClonePageEnt( Uint64 *Ent, void *NextLevel, tVAddr Addr, int bTable )
106 tPAddr curpage = *Ent & PADDR_MASK;
109 if( MM_GetRefCount( curpage ) <= 0 ) {
110 Log_KernelPanic("MMVirt", "Page %P still marked COW, but unreferenced", curpage);
112 if( MM_GetRefCount( curpage ) == 1 )
115 *Ent |= PF_PRESENT|PF_WRITE;
117 Log_Debug("MMVirt", "COW ent at %p (%p) only %P", Ent, NextLevel, curpage);
125 if( !(paddr = MM_AllocPhys()) ) {
126 Threads_SegFault(Addr);
130 ASSERT(paddr != curpage);
132 tmp = MM_MapTemp(paddr);
133 memcpy( tmp, NextLevel, 0x1000 );
137 Log_Debug("MMVirt", "COW ent at %p (%p) from %P to %P", Ent, NextLevel, curpage, paddr);
140 MM_DerefPhys( curpage );
142 *Ent |= paddr|PF_PRESENT|PF_WRITE;
146 INVLPG( (tVAddr)NextLevel );
148 // Mark COW on contents if it's a PDPT, Dir or Table
151 Uint64 *dp = NextLevel;
153 for( i = 0; i < 512; i ++ )
155 if( !(dp[i] & PF_PRESENT) )
159 MM_RefPhys( dp[i] & PADDR_MASK );
160 if( dp[i] & PF_WRITE ) {
169 * \brief Called on a page fault
171 int MM_PageFault(tVAddr Addr, Uint ErrorCode, tRegs *Regs)
173 // Log_Debug("MMVirt", "Addr = %p, ErrorCode = %x", Addr, ErrorCode);
175 // Catch reserved bits first
176 if( ErrorCode & 0x8 )
178 Log_Warning("MMVirt", "Reserved bits trashed!");
179 Log_Warning("MMVirt", "PML4 Ent = %P", PAGEMAPLVL4(Addr>>39));
180 if( !(PAGEMAPLVL4(Addr>>39) & PF_PRESENT) ) goto print_done;
181 Log_Warning("MMVirt", "PDP Ent = %P", PAGEDIRPTR(Addr>>30));
182 if( !(PAGEDIRPTR(Addr>>30) & PF_PRESENT) ) goto print_done;
183 Log_Warning("MMVirt", "PDir Ent = %P", PAGEDIR(Addr>>21));
184 if( !(PAGEDIR(Addr>>21) & PF_PRESENT) ) goto print_done;
185 Log_Warning("MMVirt", "PTable Ent = %P", PAGETABLE(Addr>>12));
186 if( !(PAGETABLE(Addr>>12) & PF_PRESENT) ) goto print_done;
192 // TODO: Implement Copy-on-Write
194 if( PAGEMAPLVL4(Addr>>39) & PF_PRESENT
195 && PAGEDIRPTR (Addr>>30) & PF_PRESENT
196 && PAGEDIR (Addr>>21) & PF_PRESENT
197 && PAGETABLE (Addr>>12) & PF_PRESENT )
200 if( PAGEMAPLVL4(Addr>>39) & PF_COW )
202 tPAddr *dp = &PAGEDIRPTR((Addr>>39)*512);
203 MM_int_ClonePageEnt( &PAGEMAPLVL4(Addr>>39), dp, Addr, 1 );
204 // MM_DumpTables(Addr>>39 << 39, (((Addr>>39) + 1) << 39) - 1);
207 if( PAGEDIRPTR(Addr>>30) & PF_COW )
209 tPAddr *dp = &PAGEDIR( (Addr>>30)*512 );
210 MM_int_ClonePageEnt( &PAGEDIRPTR(Addr>>30), dp, Addr, 1 );
211 // MM_DumpTables(Addr>>30 << 30, (((Addr>>30) + 1) << 30) - 1);
214 if( PAGEDIR(Addr>>21) & PF_COW )
216 tPAddr *dp = &PAGETABLE( (Addr>>21)*512 );
217 MM_int_ClonePageEnt( &PAGEDIR(Addr>>21), dp, Addr, 1 );
218 // MM_DumpTables(Addr>>21 << 21, (((Addr>>21) + 1) << 21) - 1);
221 if( PAGETABLE(Addr>>12) & PF_COW )
223 MM_int_ClonePageEnt( &PAGETABLE(Addr>>12), (void*)(Addr & ~0xFFF), Addr, 0 );
224 INVLPG( Addr & ~0xFFF );
230 // If it was a user, tell the thread handler
232 Warning("User %s %s memory%s",
233 (ErrorCode&2?"write to":"read from"),
234 (ErrorCode&1?"bad/locked":"non-present"),
235 (ErrorCode&16?" (Instruction Fetch)":"")
237 Warning("User Pagefault: Instruction at %04x:%p accessed %p",
238 Regs->CS, Regs->RIP, Addr);
239 __asm__ __volatile__ ("sti"); // Restart IRQs
240 Error_Backtrace(Regs->RIP, Regs->RBP);
241 Threads_SegFault(Addr);
247 // -- Check Error Code --
249 Warning("Reserved Bits Trashed!");
252 Warning("Kernel %s %s memory%s",
253 (ErrorCode&2?"write to":"read from"),
254 (ErrorCode&1?"bad/locked":"non-present"),
255 (ErrorCode&16?" (Instruction Fetch)":"")
259 Log("Thread %i - Code at %p accessed %p", Threads_GetTID(), Regs->RIP, Addr);
260 // Print Stack Backtrace
261 Error_Backtrace(Regs->RIP, Regs->RBP);
263 MM_DumpTables(0, -1);
268 void MM_int_DumpTablesEnt(tVAddr RangeStart, size_t Length, tPAddr Expected)
270 #define CANOICAL(addr) ((addr)&0x800000000000?(addr)|0xFFFF000000000000:(addr))
271 LogF("%016llx => ", CANOICAL(RangeStart));
272 // LogF("%6llx %6llx %6llx %016llx => ",
273 // MM_GetPhysAddr( &PAGEDIRPTR(RangeStart>>30) ),
274 // MM_GetPhysAddr( &PAGEDIR(RangeStart>>21) ),
275 // MM_GetPhysAddr( &PAGETABLE(RangeStart>>12) ),
276 // CANOICAL(RangeStart)
278 if( gMM_ZeroPage && (PAGETABLE(RangeStart>>12) & PADDR_MASK) == gMM_ZeroPage )
279 LogF("%13s", "zero" );
281 LogF("%13llx", PAGETABLE(RangeStart>>12) & PADDR_MASK );
282 LogF(" : 0x%6llx (%c%c%c%c%c%c)\r\n",
284 (Expected & PF_GLOBAL ? 'G' : '-'),
285 (Expected & PF_NX ? '-' : 'x'),
286 (Expected & PF_PAGED ? 'p' : '-'),
287 (Expected & PF_COW ? 'C' : '-'),
288 (Expected & PF_USER ? 'U' : '-'),
289 (Expected & PF_WRITE ? 'W' : '-')
295 * \brief Dumps the layout of the page tables
297 void MM_DumpTables(tVAddr Start, tVAddr End)
299 const tPAddr FIXED_BITS = PF_PRESENT|PF_WRITE|PF_USER|PF_COW|PF_PAGED|PF_NX|PF_GLOBAL;
300 const tPAddr CHANGEABLE_BITS = ~FIXED_BITS & 0xFFF;
301 const tPAddr MASK = ~CHANGEABLE_BITS; // Physical address and access bits
302 tVAddr rangeStart = 0;
303 tPAddr expected = CHANGEABLE_BITS; // CHANGEABLE_BITS is used because it's not a vaild value
304 tPAddr expected_pml4 = PF_WRITE|PF_USER;
305 tPAddr expected_pdp = PF_WRITE|PF_USER;
306 tPAddr expected_pd = PF_WRITE|PF_USER;
308 Log("Table Entries: (%p to %p)", Start, End);
310 End &= (1L << 48) - 1;
315 // `page` will not overflow, End is 48-12 bits
316 tVAddr curPos = Start << 12;
317 for(Uint page = Start; page <= End; curPos += 0x1000, page++)
319 //Debug("&PAGEMAPLVL4(%i page>>27) = %p", page>>27, &PAGEMAPLVL4(page>>27));
320 //Debug("&PAGEDIRPTR(%i page>>18) = %p", page>>18, &PAGEDIRPTR(page>>18));
321 //Debug("&PAGEDIR(%i page>>9) = %p", page>>9, &PAGEDIR(page>>9));
322 //Debug("&PAGETABLE(%i page) = %p", page, &PAGETABLE(page));
325 if(!(PAGEMAPLVL4(page>>27) & PF_PRESENT)
326 || (PAGEMAPLVL4(page>>27) & FIXED_BITS) != expected_pml4
327 || !(PAGEDIRPTR(page>>18) & PF_PRESENT)
328 || (PAGEDIRPTR(page>>18) & FIXED_BITS) != expected_pdp
329 || !(PAGEDIR(page>>9) & PF_PRESENT)
330 || (PAGEDIR(page>>9) & FIXED_BITS) != expected_pd
331 || !(PAGETABLE(page) & PF_PRESENT)
332 || (PAGETABLE(page) & MASK) != expected)
334 if(expected != CHANGEABLE_BITS)
337 expected &= expected_pml4 | ~(PF_WRITE|PF_USER);
338 expected &= expected_pdp | ~(PF_WRITE|PF_USER);
339 expected &= expected_pd | ~(PF_WRITE|PF_USER);
340 expected |= expected_pml4 & PF_NX;
341 expected |= expected_pdp & PF_NX;
342 expected |= expected_pd & PF_NX;
343 // Log("expected (pml4 = %x, pdp = %x, pd = %x)",
344 // expected_pml4, expected_pdp, expected_pd);
346 MM_int_DumpTablesEnt( rangeStart, curPos - rangeStart, expected );
347 expected = CHANGEABLE_BITS;
350 if( curPos == 0x800000000000L )
351 curPos = 0xFFFF800000000000L;
353 if( !(PAGEMAPLVL4(page>>27) & PF_PRESENT) ) {
354 page += (1 << 27) - 1;
355 curPos += (1L << 39) - 0x1000;
358 if( !(PAGEDIRPTR(page>>18) & PF_PRESENT) ) {
359 page += (1 << 18) - 1;
360 curPos += (1L << 30) - 0x1000;
363 if( !(PAGEDIR(page>>9) & PF_PRESENT) ) {
364 page += (1 << 9) - 1;
365 curPos += (1L << 21) - 0x1000;
368 if( !(PAGETABLE(page) & PF_PRESENT) ) continue;
370 expected = (PAGETABLE(page) & MASK);
371 expected_pml4 = (PAGEMAPLVL4(page>>27) & FIXED_BITS);
372 expected_pdp = (PAGEDIRPTR (page>>18) & FIXED_BITS);
373 expected_pd = (PAGEDIR (page>> 9) & FIXED_BITS);
376 if(gMM_ZeroPage && (expected & PADDR_MASK) == gMM_ZeroPage )
378 else if(expected != CHANGEABLE_BITS)
382 if(expected != CHANGEABLE_BITS) {
386 MM_int_DumpTablesEnt( rangeStart, curPos - rangeStart, expected );
392 * \brief Get a pointer to a page entry
393 * \param Addr Virtual Address
394 * \param bTemp Use the Temporary fractal mapping
395 * \param bAllocate Allocate entries
396 * \param bLargePage Request a large page
397 * \param Pointer Location to place the calculated pointer
398 * \return Page size, or -ve on error
400 int MM_GetPageEntryPtr(tVAddr Addr, BOOL bTemp, BOOL bAllocate, BOOL bLargePage, tPAddr **Pointer)
406 #define BITMASK(bits) ( (1LL << (bits))-1 )
410 pmlevels[3] = &TMPTABLE(0); // Page Table
411 pmlevels[2] = &TMPDIR(0); // PDIR
412 pmlevels[1] = &TMPDIRPTR(0); // PDPT
413 pmlevels[0] = &TMPMAPLVL4(0); // PML4
417 pmlevels[3] = (void*)MM_FRACTAL_BASE; // Page Table
418 pmlevels[2] = &pmlevels[3][(MM_FRACTAL_BASE>>12)&BITMASK(VIRT_BITS-12)]; // PDIR
419 pmlevels[1] = &pmlevels[2][(MM_FRACTAL_BASE>>21)&BITMASK(VIRT_BITS-21)]; // PDPT
420 pmlevels[0] = &pmlevels[1][(MM_FRACTAL_BASE>>30)&BITMASK(VIRT_BITS-30)]; // PML4
424 Addr &= (1ULL << 48)-1;
426 for( size = 39, i = 0; size > 12; size -= 9, i ++ )
428 Uint64 *ent = &pmlevels[i][Addr >> size];
429 // INVLPG( &pmlevels[i][ (Addr >> ADDR_SIZES[i]) &
431 // Check for a free large page slot
432 // TODO: Better support with selectable levels
433 if( (Addr & ((1ULL << size)-1)) == 0 && bLargePage )
435 if(Pointer) *Pointer = ent;
438 // Allocate an entry if required
439 if( !(*ent & PF_PRESENT) )
441 if( !bAllocate ) return -4; // If allocation is not requested, error
442 if( !(tmp = MM_AllocPhys()) ) return -2;
444 if( Addr < 0x800000000000 )
446 INVLPG( &pmlevels[i+1][ (Addr>>size)*512 ] );
447 memset( &pmlevels[i+1][ (Addr>>size)*512 ], 0, 0x1000 );
448 LOG("Init PML%i ent 0x%x %p with %P (*ent = %P)", 4 - i,
449 Addr>>size, (Addr>>size) << size, tmp, *ent);
452 else if( *ent & PF_LARGE )
455 if( (Addr & ((1ULL << size)-1)) != 0 ) return -3;
456 if(Pointer) *Pointer = ent;
457 return size; // Large page warning
461 // And, set the page table entry
462 if(Pointer) *Pointer = &pmlevels[i][Addr >> size];
467 * \brief Map a physical page to a virtual one
468 * \param VAddr Target virtual address
469 * \param PAddr Physical address of page
470 * \param bTemp Use tempoary mappings
471 * \param bLarge Treat as a large page
473 int MM_MapEx(volatile void *VAddr, tPAddr PAddr, BOOL bTemp, BOOL bLarge)
478 ENTER("pVAddr PPAddr", VAddr, PAddr);
480 // Get page pointer (Allow allocating)
481 rv = MM_GetPageEntryPtr( (tVAddr)VAddr, bTemp, 1, bLarge, &ent);
482 if(rv < 0) LEAVE_RET('i', 0);
484 if( *ent & 1 ) LEAVE_RET('i', 0);
488 if( (tVAddr)VAddr <= USER_MAX )
497 * \brief Map a physical page to a virtual one
498 * \param VAddr Target virtual address
499 * \param PAddr Physical address of page
501 int MM_Map(volatile void *VAddr, tPAddr PAddr)
503 return MM_MapEx(VAddr, PAddr, 0, 0);
507 * \brief Removed a mapped page
509 void MM_Unmap(tVAddr VAddr)
512 if( !(PAGEMAPLVL4(VAddr >> 39) & 1) ) return ;
514 if( !(PAGEDIRPTR(VAddr >> 30) & 1) ) return ;
516 if( !(PAGEDIR(VAddr >> 21) & 1) ) return ;
518 tPAddr *ent = &PAGETABLE(VAddr >> PTAB_SHIFT);
524 * \brief Allocate a block of memory at the specified virtual address
526 tPAddr MM_Allocate(volatile void *VAddr)
530 ENTER("pVAddr", VAddr);
532 // Ensure the tables are allocated before the page (keeps things neat)
533 MM_GetPageEntryPtr( (tVAddr)VAddr, 0, 1, 0, NULL );
536 ret = MM_AllocPhys();
537 LOG("ret = %x", ret);
538 if(!ret) LEAVE_RET('i', 0);
540 if( !MM_Map(VAddr, ret) )
542 Warning("MM_Allocate: Unable to map. Strange, we should have errored earlier");
552 void MM_AllocateZero(volatile void *VAddr)
554 // Ensure dir is populated
555 MM_GetPageEntryPtr((tVAddr)VAddr, 0, 1, 0, NULL);
559 SHORTLOCK(&glMM_ZeroPage);
562 gMM_ZeroPage = MM_AllocPhys();
563 MM_Map(VAddr, gMM_ZeroPage);
564 memset((void*)VAddr, 0, PAGE_SIZE);
566 SHORTREL(&glMM_ZeroPage);
570 MM_Map(VAddr, gMM_ZeroPage);
572 MM_RefPhys(gMM_ZeroPage); // Refernce for this map
573 MM_SetFlags(VAddr, MM_PFLAG_COW, MM_PFLAG_COW);
577 * \brief Deallocate a page at a virtual address
579 void MM_Deallocate(volatile void *VAddr)
581 tPAddr phys = MM_GetPhysAddr( VAddr );
584 MM_Unmap((tVAddr)VAddr);
590 * \brief Get the page table entry of a virtual address
591 * \param Addr Virtual Address
592 * \param Phys Location to put the physical address
593 * \param Flags Flags on the entry (set to zero if unmapped)
594 * \return Size of the entry (in address bits) - 12 = 4KiB page
596 int MM_GetPageEntry(tVAddr Addr, tPAddr *Phys, Uint *Flags)
601 if(!Phys || !Flags) return 0;
603 ret = MM_GetPageEntryPtr(Addr, 0, 0, 0, &ptr);
604 if( ret < 0 ) return 0;
606 *Phys = *ptr & PADDR_MASK;
607 *Flags = *ptr & 0xFFF;
612 * \brief Get the physical address of a virtual location
614 tPAddr MM_GetPhysAddr(volatile const void *Ptr)
616 tVAddr Addr = (tVAddr)Ptr;
620 ret = MM_GetPageEntryPtr(Addr, 0, 0, 0, &ptr);
621 if( ret < 0 ) return 0;
623 if( !(*ptr & 1) ) return 0;
625 return (*ptr & PADDR_MASK) | (Addr & 0xFFF);
629 * \brief Sets the flags on a page
631 void MM_SetFlags(volatile void *VAddr, Uint Flags, Uint Mask)
637 rv = MM_GetPageEntryPtr( (tVAddr)VAddr, 0, 0, 0, &ent);
640 // Ensure the entry is valid
641 if( !(*ent & 1) ) return ;
644 if( Mask & MM_PFLAG_RO )
646 if( Flags & MM_PFLAG_RO ) {
655 if( Mask & MM_PFLAG_KERNEL )
657 if( Flags & MM_PFLAG_KERNEL ) {
666 if( Mask & MM_PFLAG_COW )
668 if( Flags & MM_PFLAG_COW ) {
679 if( Mask & MM_PFLAG_EXEC )
681 if( Flags & MM_PFLAG_EXEC ) {
691 * \brief Get the flags applied to a page
693 Uint MM_GetFlags(volatile const void *VAddr)
698 rv = MM_GetPageEntryPtr((tVAddr)VAddr, 0, 0, 0, &ent);
701 if( !(*ent & 1) ) return 0;
704 if( !(*ent & PF_WRITE) ) ret |= MM_PFLAG_RO;
706 if( !(*ent & PF_USER) ) ret |= MM_PFLAG_KERNEL;
708 if( *ent & PF_COW ) ret |= MM_PFLAG_COW;
710 if( !(*ent & PF_NX) ) ret |= MM_PFLAG_EXEC;
716 * \brief Check if the provided buffer is valid
717 * \return Boolean valid
719 int MM_IsValidBuffer(tVAddr Addr, size_t Size)
722 Uint64 pml4, pdp, dir, tab;
724 Size += Addr & (PAGE_SIZE-1);
725 Addr &= ~(PAGE_SIZE-1);
727 if( ((Addr >> 47) & 1) != ((Addr>>48) == 0xFFFF))
729 Addr &= ((1UL << 48)-1); // Clamp to address space
736 if( !(PAGEMAPLVL4(pml4) & 1) ) {
737 Log_Debug("MMVirt", "PML4E %i NP", pml4);
740 if( !(PAGEDIRPTR(pdp) & 1) ) {
741 Log_Debug("MMVirt", "PDPE %i NP", pdp);
744 if( !(PAGEDIR(dir) & 1) ) {
745 Log_Debug("MMVirt", "PDE %i NP", dir);
748 if( !(PAGETABLE(tab) & 1) ) {
749 Log_Debug("MMVirt", "PTE %i NP", tab);
753 bIsUser = !!(PAGETABLE(tab) & PF_USER);
755 while( Size >= PAGE_SIZE )
760 if( (tab & 511) == 0 )
763 if( (dir & 511) == 0 )
766 if( (pdp & 511) == 0 )
769 if( !(PAGEMAPLVL4(pml4) & 1) ) {
770 Log_Debug("MMVirt", "IsValidBuffer - PML4E %x NP, Size=%x", pml4, Size);
774 if( !(PAGEDIRPTR(pdp) & 1) ) {
775 Log_Debug("MMVirt", "IsValidBuffer - PDPE %x NP", pdp);
779 if( !(PAGEDIR(dir) & 1) ) {
780 Log_Debug("MMVirt", "IsValidBuffer - PDE %x NP", dir);
785 if( !(PAGETABLE(tab) & 1) ) {
786 Log_Debug("MMVirt", "IsValidBuffer - PTE %x NP", tab);
789 if( bIsUser && !(PAGETABLE(tab) & PF_USER) ) {
790 Log_Debug("MMVirt", "IsValidBuffer - PTE %x Not user", tab);
797 // --- Hardware Mappings ---
799 * \brief Map a range of hardware pages
801 void *MM_MapHWPages(tPAddr PAddr, Uint Number)
803 //TODO: Add speedups (memory of first possible free)
804 for( tPage *ret = (void*)MM_HWMAP_BASE; ret < (tPage*)MM_HWMAP_TOP; ret ++ )
806 // Check if this region has already been used
808 for( num = Number; num -- && ret < (tPage*)MM_HWMAP_TOP; ret ++ )
810 if( MM_GetPhysAddr( ret ) != 0 )
813 if( num >= 0 ) continue;
815 // Log_Debug("MMVirt", "Mapping %i pages to %p (base %P)", Number, ret-Number*0x1000, PAddr);
817 // Map backwards (because `ret` is at the top of the region atm)
818 PAddr += 0x1000 * Number;
830 Log_Error("MM", "MM_MapHWPages - No space for %i pages", Number);
835 * \brief Free a range of hardware pages
837 void MM_UnmapHWPages(volatile void *VAddr, Uint Number)
839 // Log_KernelPanic("MM", "TODO: Implement MM_UnmapHWPages");
840 tPage *page = (void*)VAddr;
843 MM_DerefPhys( MM_GetPhysAddr(page) );
844 MM_Unmap((tVAddr)page);
851 * \fn tVAddr MM_AllocDMA(int Pages, int MaxBits, tPAddr *PhysAddr)
852 * \brief Allocates DMA physical memory
853 * \param Pages Number of pages required
854 * \param MaxBits Maximum number of bits the physical address can have
855 * \param PhysAddr Pointer to the location to place the physical address allocated
856 * \return Virtual address allocate
858 void *MM_AllocDMA(int Pages, int MaxBits, tPAddr *PhysAddr)
864 if(MaxBits < 12 || !PhysAddr) return 0;
867 if(Pages == 1 && MaxBits >= PHYS_BITS)
869 phys = MM_AllocPhys();
871 ret = MM_MapHWPages(phys, 1);
877 phys = MM_AllocPhysRange(Pages, MaxBits);
878 // - Was it allocated?
879 if(phys == 0) return 0;
881 // Allocated successfully, now map
882 ret = MM_MapHWPages(phys, Pages);
884 // MapHWPages references the pages, so deref them back down to 1
885 for(;Pages--;phys+=0x1000)
888 // If it didn't map, free then return 0
895 // --- Tempory Mappings ---
896 void *MM_MapTemp(tPAddr PAddr)
898 const int max_slots = (MM_TMPMAP_END - MM_TMPMAP_BASE) / PAGE_SIZE;
899 tVAddr ret = MM_TMPMAP_BASE;
902 for( i = 0; i < max_slots; i ++, ret += PAGE_SIZE )
905 if( MM_GetPageEntryPtr( ret, 0, 1, 0, &ent) < 0 ) {
920 void MM_FreeTemp(void *Ptr)
926 // --- Address Space Clone --
927 tPAddr MM_Clone(int bNoUserCopy)
932 // #1 Create a copy of the PML4
933 ret = MM_AllocPhys();
936 // #2 Alter the fractal pointer
937 Mutex_Acquire(&glMM_TempFractalLock);
941 // #3 Set Copy-On-Write to all user pages
942 if( Threads_GetPID() != 0 && !bNoUserCopy )
944 for( i = 0; i < 256; i ++)
946 if( PAGEMAPLVL4(i) & PF_WRITE ) {
947 PAGEMAPLVL4(i) |= PF_COW;
948 PAGEMAPLVL4(i) &= ~PF_WRITE;
951 TMPMAPLVL4(i) = PAGEMAPLVL4(i);
952 // Log_Debug("MM", "TMPMAPLVL4(%i) = 0x%016llx", i, TMPMAPLVL4(i));
953 if( !(TMPMAPLVL4(i) & PF_PRESENT) ) continue ;
955 MM_RefPhys( TMPMAPLVL4(i) & PADDR_MASK );
960 for( i = 0; i < 256; i ++ )
966 // #4 Map in kernel pages
967 for( i = 256; i < 512; i ++ )
970 // 320 0xFFFFA.... - Kernel Stacks
971 if( i == MM_KSTACK_BASE>>39 ) continue;
972 // 509 0xFFFFFE0.. - Fractal mapping
973 if( i == MM_FRACTAL_BASE>>39 ) continue;
974 // 510 0xFFFFFE8.. - Temp fractal mapping
975 if( i == MM_TMPFRAC_BASE>>39 ) continue;
977 TMPMAPLVL4(i) = PAGEMAPLVL4(i);
978 if( TMPMAPLVL4(i) & 1 )
979 MM_RefPhys( TMPMAPLVL4(i) & PADDR_MASK );
982 // Mark Per-Process data as COW
983 TMPMAPLVL4(MM_PPD_BASE>>39) |= PF_COW;
984 TMPMAPLVL4(MM_PPD_BASE>>39) &= ~PF_WRITE;
986 // #5 Set fractal mapping
987 TMPMAPLVL4(MM_FRACTAL_BASE>>39) = ret | 3; // Main
988 TMPMAPLVL4(MM_TMPFRAC_BASE>>39) = 0; // Temp
990 // #6 Create kernel stack
991 // tThread->KernelStack is the top
992 // There is 1 guard page below the stack
993 tPage *kstackbase = (void*)( Proc_GetCurThread()->KernelStack - KERNEL_STACK_SIZE );
996 TMPMAPLVL4(MM_KSTACK_BASE >> PML4_SHIFT) = 0;
997 for( i = 1; i < KERNEL_STACK_SIZE/PAGE_SIZE; i ++ )
999 tPAddr phys = MM_AllocPhys();
1001 MM_MapEx(kstackbase + i, phys, 1, 0);
1003 tmpmapping = MM_MapTemp(phys);
1004 // If the current thread's stack is shorter than the new one, zero
1005 if( MM_GetPhysAddr( kstackbase + i ) )
1006 memcpy(tmpmapping, kstackbase + i, 0x1000);
1008 memset(tmpmapping, 0, 0x1000);
1010 // Debug_HexDump("MM_Clone: *tmpmapping = ", (void*)tmpmapping, 0x1000);
1011 MM_FreeTemp(tmpmapping);
1019 Mutex_Release(&glMM_TempFractalLock);
1020 // Log("MM_Clone: RETURN %P", ret);
1024 void MM_int_ClearTableLevel(tVAddr VAddr, int LevelBits, int MaxEnts)
1026 Uint64 * const table_bases[] = {&PAGETABLE(0), &PAGEDIR(0), &PAGEDIRPTR(0), &PAGEMAPLVL4(0)};
1027 Uint64 *table = table_bases[(LevelBits-12)/9] + (VAddr >> LevelBits);
1029 // Log("MM_int_ClearTableLevel: (VAddr=%p, LevelBits=%i, MaxEnts=%i)", VAddr, LevelBits, MaxEnts);
1030 for( i = 0; i < MaxEnts; i ++ )
1032 // Skip non-present tables
1033 if( !(table[i] & PF_PRESENT) ) {
1038 if( (table[i] & PF_COW) && MM_GetRefCount(table[i] & PADDR_MASK) > 1 ) {
1039 MM_DerefPhys(table[i] & PADDR_MASK);
1043 // Clear table contents (if it is a table)
1044 if( LevelBits > 12 )
1045 MM_int_ClearTableLevel(VAddr + ((tVAddr)i << LevelBits), LevelBits-9, 512);
1046 MM_DerefPhys(table[i] & PADDR_MASK);
1051 void MM_ClearUser(void)
1053 MM_int_ClearTableLevel(0, 39, 256);
1056 tVAddr MM_NewWorkerStack(void *StackData, size_t StackSize)
1062 // #1 Set temp fractal to PID0
1063 Mutex_Acquire(&glMM_TempFractalLock);
1064 TMPCR3() = ((tPAddr)gInitialPML4 - KERNEL_BASE) | 3;
1067 // #2 Scan for a free stack addresss < 2^47
1068 for(ret = 0x100000; ret < (1ULL << 47); ret += KERNEL_STACK_SIZE)
1071 if( MM_GetPageEntryPtr(ret, 1, 0, 0, &ptr) <= 0 ) break;
1072 if( !(*ptr & 1) ) break;
1074 if( ret >= (1ULL << 47) ) {
1075 Mutex_Release(&glMM_TempFractalLock);
1079 // #3 Map all save the last page in the range
1080 // - This acts as as guard page
1081 MM_GetPageEntryPtr(ret, 1, 1, 0, NULL); // Make sure tree is allocated
1082 for( i = 0; i < KERNEL_STACK_SIZE/0x1000 - 1; i ++ )
1084 phys = MM_AllocPhys();
1087 Log_Error("MM", "MM_NewWorkerStack - Unable to allocate page");
1090 MM_MapEx( (void*)(ret + i*0x1000), phys, 1, 0);
1091 // XXX: ... this doesn't change the correct address space
1092 MM_SetFlags( (void*)(ret + i*0x1000), MM_PFLAG_KERNEL|MM_PFLAG_RO, MM_PFLAG_KERNEL);
1096 if( StackSize > 0x1000 ) {
1097 Log_Error("MM", "MM_NewWorkerStack: StackSize(0x%x) > 0x1000, cbf handling", StackSize);
1100 void *tmp_addr, *dest;
1101 tmp_addr = MM_MapTemp(phys);
1102 dest = (char*)tmp_addr + (0x1000 - StackSize);
1103 memcpy( dest, StackData, StackSize );
1104 MM_FreeTemp(tmp_addr);
1108 Mutex_Release(&glMM_TempFractalLock);
1110 return ret + i*0x1000;
1114 * \brief Allocate a new kernel stack
1116 tVAddr MM_NewKStack(void)
1118 tVAddr base = MM_KSTACK_BASE;
1120 for( ; base < MM_KSTACK_TOP; base += KERNEL_STACK_SIZE )
1122 if(MM_GetPhysAddr( (void*)(base+KERNEL_STACK_SIZE-0x1000) ) != 0)
1125 //Log("MM_NewKStack: Found one at %p", base + KERNEL_STACK_SIZE);
1126 for( i = 0x1000; i < KERNEL_STACK_SIZE; i += 0x1000)
1128 if( !MM_Allocate( (void*)(base+i) ) )
1130 Log_Warning("MM", "MM_NewKStack - Allocation failed");
1131 for( i -= 0x1000; i; i -= 0x1000)
1132 MM_Deallocate((void*)(base+i));
1137 return base + KERNEL_STACK_SIZE;
1139 Log_Warning("MM", "MM_NewKStack - No address space left\n");