2 * Acess2 VIA Rhine II Driver (VT6102)
3 * - By John Hodge (thePowersGang)
6 #define VERSION ((0<<8)|10)
10 #include <semaphore.h>
11 #include "rhine2_hw.h"
12 #include <IPStack/include/adapters_api.h>
16 #define RX_BUF_SIZE 1024
17 #define N_RX_BUF_PER_PAGE (PAGE_SIZE/RX_BUF_SIZE)
18 #define N_RX_BUF_PAGES ((N_RX_DESCS*RX_BUF_SIZE)/PAGE_SIZE)
19 #define N_TX_DESCS ((PAGE_SIZE/DESC_SIZE)-N_RX_DESCS)
21 #define CR0_BASEVAL (CR0_STRT|CR0_TXON|CR0_RXON)
24 #define VENDOR_ID 0x1106
25 #define DEVICE_ID 0x3065
33 tSemaphore ReadSemaphore;
34 tSemaphore SendSemaphore;
39 } RXBuffers[N_RX_BUF_PAGES];
44 struct sTXDesc *TXDescs;
48 struct sRXDesc *NextRX; // Most recent unread packet
55 int Rhine2_Install(char **Options);
56 void Rhine2_int_InitialiseCard(tCard *Card);
57 tIPStackBuffer *Rhine2_WaitPacket(void *Ptr);
58 int Rhine2_SendPacket(void *Ptr, tIPStackBuffer *Buffer);
59 void Rhine2_IRQHandler(int Num, void *Pt);
61 struct sRXDesc *Rhine2_int_GetDescFromPhys(tCard *Card, Uint32 Addr);
62 void *Rhine2_int_GetBufferFromPhys(tCard *Card, Uint32 Addr);
63 void Rhine2_int_FreeRXDesc(void *Desc, size_t, size_t, const void*);
66 MODULE_DEFINE(0, VERSION, VIARhineII, Rhine2_Install, NULL, NULL);
67 tIPStack_AdapterType gRhine2_AdapterType = {
68 .Name = "VIA Rhine II",
69 .SendPacket = Rhine2_SendPacket,
70 .WaitForPacket = Rhine2_WaitPacket,
72 int giRhine2_CardCount;
73 tCard *gaRhine2_Cards;
77 * \brief Initialises the driver
79 int Rhine2_Install(char **Options)
85 giRhine2_CardCount = PCI_CountDevices(VENDOR_ID, DEVICE_ID);
86 if( giRhine2_CardCount == 0 ) return MODULE_ERR_NOTNEEDED;
88 gaRhine2_Cards = calloc( giRhine2_CardCount, sizeof(tCard) );
90 while( (id = PCI_GetDevice(VENDOR_ID, DEVICE_ID, i)) != -1 )
92 card = &gaRhine2_Cards[i];
94 LOG("BAR0 = 0x%08x", PCI_GetBAR(id, 0));
95 LOG("BAR1 = 0x%08x", PCI_GetBAR(id, 1));
96 LOG("BAR2 = 0x%08x", PCI_GetBAR(id, 2));
97 LOG("BAR3 = 0x%08x", PCI_GetBAR(id, 3));
98 LOG("BAR4 = 0x%08x", PCI_GetBAR(id, 4));
99 LOG("BAR5 = 0x%08x", PCI_GetBAR(id, 5));
101 card->IOBase = PCI_GetBAR(id, 0);
102 if( !(card->IOBase & 1) ) {
104 Log_Warning("Rhine2", "BAR0 is not in IO space");
108 card->IRQ = PCI_GetIRQ( id );
110 // Install IRQ Handler
111 IRQ_AddHandler(card->IRQ, Rhine2_IRQHandler, card);
113 Rhine2_int_InitialiseCard(card);
115 card->IPHandle = IPStack_Adapter_Add(&gRhine2_AdapterType, card, card->MacAddr);
117 Log_Log("Rhine2", "Card %i 0x%04x, IRQ %i %02x:%02x:%02x:%02x:%02x:%02x",
118 i, card->IOBase, card->IRQ,
119 card->MacAddr[0], card->MacAddr[1], card->MacAddr[2],
120 card->MacAddr[3], card->MacAddr[4], card->MacAddr[5]
126 return MODULE_ERR_OK;
129 void Rhine2_int_InitialiseCard(tCard *Card)
133 Card->MacAddr[0] = inb(Card->IOBase + REG_PAR0);
134 Card->MacAddr[1] = inb(Card->IOBase + REG_PAR1);
135 Card->MacAddr[2] = inb(Card->IOBase + REG_PAR2);
136 Card->MacAddr[3] = inb(Card->IOBase + REG_PAR3);
137 Card->MacAddr[4] = inb(Card->IOBase + REG_PAR4);
138 Card->MacAddr[5] = inb(Card->IOBase + REG_PAR5);
140 LOG("Resetting card");
141 outb(Card->IOBase + REG_CR1, CR1_SFRST);
143 while( inb(Card->IOBase + REG_CR1) & CR1_SFRST ) ;
145 LOG("Allocaating RX buffers");
146 // Allocate memory for things
147 for( int i = 0; i < N_RX_BUF_PAGES; i ++ )
149 Card->RXBuffers[i].Virt = (void*)MM_AllocDMA(1, 32, &phys);
150 Card->RXBuffers[i].Phys = phys;
153 LOG("Allocating and filling RX/TX Descriptors");
154 Card->DescTable = (void*)MM_AllocDMA(1, 32, &phys);
155 Card->DescTablePhys = phys;
157 // Initialise RX Descriptors
158 struct sRXDesc *rxdescs = Card->DescTable;
159 for( int i = 0; i < N_RX_DESCS; i ++ )
162 rxdescs[i].BufferSize = RX_BUF_SIZE;
163 rxdescs[i].RXBufferStart = Card->RXBuffers[i/N_RX_BUF_PER_PAGE].Phys
164 + (i % N_RX_BUF_PER_PAGE) * RX_BUF_SIZE;
165 rxdescs[i].RDBranchAddress = Card->DescTablePhys + (i+1) * DESC_SIZE;
166 rxdescs[i].Length = (1 << 15); // set OWN
167 LOG("RX Desc %p = {Buf:0x%8x, Next:0x%x}", rxdescs,
168 rxdescs[i].RXBufferStart, rxdescs[i].RDBranchAddress
171 rxdescs[ N_RX_DESCS - 1 ].RDBranchAddress = Card->DescTablePhys;
172 Card->NextRX = &rxdescs[0];
174 Card->TXDescs = (void*)(rxdescs + N_RX_DESCS);
175 memset(Card->TXDescs, 0, sizeof(struct sTXDesc)*N_TX_DESCS);
176 for( int i = 0; i < N_TX_DESCS; i ++ )
178 Card->TXDescs[i].TDBranchAddress = Card->DescTablePhys + (N_RX_DESCS + i + 1) * DESC_SIZE;
180 Card->TXDescs[N_TX_DESCS-1].TDBranchAddress = Card->DescTablePhys + N_RX_DESCS * DESC_SIZE;
181 Card->nFreeTX = N_TX_DESCS;
184 // - Initialise card state
185 LOG("Initialising card state");
186 outb(Card->IOBase + REG_IMR0, 0xFF);
187 outb(Card->IOBase + REG_IMR1, 0xFF);
188 outd(Card->IOBase + REG_CUR_RX_DESC, Card->DescTablePhys);
189 outd(Card->IOBase + REG_CUR_TX_DESC, Card->DescTablePhys + N_RX_DESCS * DESC_SIZE);
191 outb(Card->IOBase + REG_TCR, TCR_TRSF(4));
194 outb(Card->IOBase + REG_CR0, CR0_BASEVAL);
195 outb(Card->IOBase + REG_CR1, 0); // Disabled TX polling only?
197 LOG("ISR state: %02x %02x", inb(Card->IOBase + REG_ISR0), inb(Card->IOBase + REG_ISR1));
200 // --- File Functions ---
201 tIPStackBuffer *Rhine2_WaitPacket(void *Ptr)
205 struct sRXDesc *desc;
210 LOG("CR0 state: %02x", inb(card->IOBase + REG_CR0));
211 if( Semaphore_Wait( &card->ReadSemaphore, 1 ) != 1 )
219 while( !(desc->Length & (1 << 15)) )
221 // LOG("desc(%p) = {RSR:%04x,Length:%04x,BufferSize:%04x,RXBufferStart:%08x,RDBranchAddress:%08x}",
222 // desc, desc->RSR, desc->Length, desc->BufferSize, desc->RXBufferStart, desc->RDBranchAddress);
223 // TODO: This kinda expensive call can be changed for an increment, but cbf
224 desc = Rhine2_int_GetDescFromPhys(card, desc->RDBranchAddress);
228 LOG("%i descriptors in packet", nDesc);
230 ret = IPStack_Buffer_CreateBuffer(nDesc);
232 while( !(desc->Length & (1 << 15)) )
234 void *data = Rhine2_int_GetBufferFromPhys(card, desc->RXBufferStart);
235 IPStack_Buffer_AppendSubBuffer(ret,
236 desc->Length, 0, data,
237 Rhine2_int_FreeRXDesc, desc
239 desc = Rhine2_int_GetDescFromPhys(card, desc->RDBranchAddress);
247 int Rhine2_SendPacket(void *Ptr, tIPStackBuffer *Buffer)
252 int nDescs, first_desc_id;
253 struct sTXDesc *desc = NULL;
254 struct sTXDesc *first_desc = NULL;
255 struct sTXDesc *last_desc = NULL;
257 ENTER("pPtr pBuffer", Ptr, Buffer);
262 for( int id = -1; -1 != (id = IPStack_Buffer_GetBuffer(Buffer, id, &len, &data)); )
264 if( ((tVAddr)data & (PAGE_SIZE-1)) + len > PAGE_SIZE )
273 LOG("%i descriptors needed", nDescs);
275 if( card->nFreeTX < nDescs ) {
277 // TODO: Semaphore instead?
282 first_desc_id = card->NextTX;
283 card->NextTX = (card->NextTX + nDescs) % N_TX_DESCS;
285 desc = card->TXDescs + first_desc_id;
288 for( int id = -1; -1 != (id = IPStack_Buffer_GetBuffer(Buffer, id, &len, &data)); )
290 tPAddr pdata = MM_GetPhysAddr( (tVAddr)data );
294 Log_Warning("Rhine2", "TODO: Bounce-buffer >32 pbit buffers");
298 if( (pdata & (PAGE_SIZE-1)) + len > PAGE_SIZE )
300 // Need to split into to descriptors
301 Log_Warning("Rhine2", "TODO: Split cross-page buffers");
304 LOG("Buffer %i (%p+0x%x) placed in %p", id-1, data, len, desc);
306 // TODO: Rhine I requires 4-byte alignment (fsck that, I don't have one)
308 desc->TXBufferStart = pdata;
309 desc->BufferSize = len | (1 << 15);
313 desc->TSR = 0; // OWN will be set below
315 desc->TSR = TD_TSR_OWN;
318 if(first_desc_id + nDescs == N_TX_DESCS)
319 desc = card->TXDescs;
324 data = IPStack_Buffer_CompactBuffer(Buffer, &len);
327 first_desc_id = card->NextTX;
328 card->NextTX = (card->NextTX + nDescs) % N_TX_DESCS;
329 desc = card->TXDescs + first_desc_id;
331 desc->TXBufferStart = MM_GetPhysAddr( data );
332 desc->BufferSize = len | (1 << 15);
337 first_desc = card->TXDescs + first_desc_id;
340 first_desc->TCR |= TD_TCR_STP;
341 last_desc->TCR |= TD_TCR_EDP|TD_TCR_IC;
342 // last_desc->BufferSize &= ~(1 << 15);
344 first_desc->TSR |= TD_TSR_OWN;
346 LOG("%i descriptors allocated, first = %p, last = %p", nDescs, first_desc, last_desc);
349 LOG("Waiting for TX to complete");
350 outb(card->IOBase + REG_CR0, CR0_TDMD|CR0_BASEVAL);
351 Semaphore_Wait(&card->SendSemaphore, 1);
361 void Rhine2_IRQHandler(int Num, void *Ptr)
364 Uint8 isr0 = inb(card->IOBase + REG_ISR0);
365 Uint8 isr1 = inb(card->IOBase + REG_ISR1);
367 if( isr0 == 0 ) return ;
369 LOG("ISR0 = 0x%02x, ISR1 = 0x%02x", isr0, isr1);
371 if( isr0 & ISR0_PRX )
374 Semaphore_Signal(&card->ReadSemaphore, 1);
377 if( isr0 & ISR0_PTX )
380 Semaphore_Signal(&card->SendSemaphore, 1);
383 if( isr0 & ISR0_TXE )
385 LOG("TX Error... oops");
386 Semaphore_Signal(&card->SendSemaphore, 1);
391 LOG("Transmit buffer underflow");
394 LOG("Acking interrupts");
395 outb(card->IOBase + REG_ISR0, isr0);
396 outb(card->IOBase + REG_ISR1, isr1);
400 struct sRXDesc *Rhine2_int_GetDescFromPhys(tCard *Card, Uint32 Addr)
402 if( Card->DescTablePhys > Addr ) return NULL;
403 if( Card->DescTablePhys + PAGE_SIZE <= Addr ) return NULL;
404 if( Addr & 15 ) return NULL;
405 return (struct sRXDesc*)Card->DescTable + ((Addr & (PAGE_SIZE-1)) / 16);
408 void *Rhine2_int_GetBufferFromPhys(tCard *Card, Uint32 Addr)
410 for( int i = 0; i < N_RX_BUF_PAGES; i ++ )
412 if( Card->RXBuffers[i].Phys > Addr ) continue;
413 if( Card->RXBuffers[i].Phys + PAGE_SIZE <= Addr ) continue;
414 return Card->RXBuffers[i].Virt + (Addr & (PAGE_SIZE-1));
419 void Rhine2_int_FreeRXDesc(void *Ptr, size_t u1, size_t u2, const void *u3)
421 struct sRXDesc *desc = Ptr;
423 LOG("Descriptor %p returned to card", desc);
426 desc->Length = (1 << 15); // Reset OWN