2 * Acess2 VIA Rhine II Driver (VT6102)
3 * - By John Hodge (thePowersGang)
6 #define VERSION ((0<<8)|10)
10 #include <semaphore.h>
11 #include "rhine2_hw.h"
12 #include <IPStack/include/adapters_api.h>
16 #define RX_BUF_SIZE 1024
17 #define N_RX_BUF_PER_PAGE (PAGE_SIZE/RX_BUF_SIZE)
18 #define N_RX_BUF_PAGES ((N_RX_DESCS*RX_BUF_SIZE)/PAGE_SIZE)
19 #define N_TX_DESCS ((PAGE_SIZE/DESC_SIZE)-N_RX_DESCS)
21 #define CR0_BASEVAL (CR0_STRT|CR0_TXON|CR0_RXON)
24 #define VENDOR_ID 0x1106
25 #define DEVICE_ID 0x3065
33 tSemaphore ReadSemaphore;
34 tSemaphore SendSemaphore;
39 } RXBuffers[N_RX_BUF_PAGES];
44 struct sTXDesc *TXDescs;
48 struct sRXDesc *NextRX; // Most recent unread packet
55 int Rhine2_Install(char **Options);
56 void Rhine2_int_InitialiseCard(tCard *Card);
57 tIPStackBuffer *Rhine2_WaitPacket(void *Ptr);
58 int Rhine2_SendPacket(void *Ptr, tIPStackBuffer *Buffer);
59 void Rhine2_IRQHandler(int Num, void *Pt);
61 struct sRXDesc *Rhine2_int_GetDescFromPhys(tCard *Card, Uint32 Addr);
62 void *Rhine2_int_GetBufferFromPhys(tCard *Card, Uint32 Addr);
63 void Rhine2_int_FreeRXDesc(void *Desc, size_t, size_t, const void*);
66 MODULE_DEFINE(0, VERSION, VIARhineII, Rhine2_Install, NULL, NULL);
67 tIPStack_AdapterType gRhine2_AdapterType = {
68 .Name = "VIA Rhine II",
69 .SendPacket = Rhine2_SendPacket,
70 .WaitForPacket = Rhine2_WaitPacket,
72 int giRhine2_CardCount;
73 tCard *gaRhine2_Cards;
77 * \brief Initialises the driver
79 int Rhine2_Install(char **Options)
86 giRhine2_CardCount = PCI_CountDevices(VENDOR_ID, DEVICE_ID);
87 Log_Debug("Rhine2", "giRhine2_CardCount = %i", giRhine2_CardCount);
88 if( giRhine2_CardCount == 0 ) return MODULE_ERR_NOTNEEDED;
90 gaRhine2_Cards = calloc( giRhine2_CardCount, sizeof(tCard) );
92 while( (id = PCI_GetDevice(VENDOR_ID, DEVICE_ID, i)) != -1 )
94 card = &gaRhine2_Cards[i];
96 LOG("BAR0 = 0x%08x", PCI_GetBAR(id, 0));
97 LOG("BAR1 = 0x%08x", PCI_GetBAR(id, 1));
98 LOG("BAR2 = 0x%08x", PCI_GetBAR(id, 2));
99 LOG("BAR3 = 0x%08x", PCI_GetBAR(id, 3));
100 LOG("BAR4 = 0x%08x", PCI_GetBAR(id, 4));
101 LOG("BAR5 = 0x%08x", PCI_GetBAR(id, 5));
103 card->IOBase = PCI_GetBAR(id, 0);
104 if( !(card->IOBase & 1) ) {
106 Log_Warning("Rhine2", "BAR0 is not in IO space");
110 card->IRQ = PCI_GetIRQ( id );
112 // Install IRQ Handler
113 IRQ_AddHandler(card->IRQ, Rhine2_IRQHandler, card);
115 Rhine2_int_InitialiseCard(card);
117 card->IPHandle = IPStack_Adapter_Add(&gRhine2_AdapterType, card, card->MacAddr);
119 Log_Log("Rhine2", "Card %i 0x%04x, IRQ %i %02x:%02x:%02x:%02x:%02x:%02x",
120 i, card->IOBase, card->IRQ,
121 card->MacAddr[0], card->MacAddr[1], card->MacAddr[2],
122 card->MacAddr[3], card->MacAddr[4], card->MacAddr[5]
128 return MODULE_ERR_OK;
131 void Rhine2_int_InitialiseCard(tCard *Card)
135 Card->MacAddr[0] = inb(Card->IOBase + REG_PAR0);
136 Card->MacAddr[1] = inb(Card->IOBase + REG_PAR1);
137 Card->MacAddr[2] = inb(Card->IOBase + REG_PAR2);
138 Card->MacAddr[3] = inb(Card->IOBase + REG_PAR3);
139 Card->MacAddr[4] = inb(Card->IOBase + REG_PAR4);
140 Card->MacAddr[5] = inb(Card->IOBase + REG_PAR5);
142 LOG("Resetting card");
143 outb(Card->IOBase + REG_CR1, CR1_SFRST);
145 while( inb(Card->IOBase + REG_CR1) & CR1_SFRST ) ;
147 LOG("Allocaating RX buffers");
148 // Allocate memory for things
149 for( int i = 0; i < N_RX_BUF_PAGES; i ++ )
151 Card->RXBuffers[i].Virt = (void*)MM_AllocDMA(1, 32, &phys);
152 Card->RXBuffers[i].Phys = phys;
155 LOG("Allocating and filling RX/TX Descriptors");
156 Card->DescTable = (void*)MM_AllocDMA(1, 32, &phys);
157 Card->DescTablePhys = phys;
159 // Initialise RX Descriptors
160 struct sRXDesc *rxdescs = Card->DescTable;
161 for( int i = 0; i < N_RX_DESCS; i ++ )
164 rxdescs[i].BufferSize = RX_BUF_SIZE;
165 rxdescs[i].RXBufferStart = Card->RXBuffers[i/N_RX_BUF_PER_PAGE].Phys
166 + (i % N_RX_BUF_PER_PAGE) * RX_BUF_SIZE;
167 rxdescs[i].RDBranchAddress = Card->DescTablePhys + (i+1) * DESC_SIZE;
168 rxdescs[i].Length = (1 << 15); // set OWN
169 LOG("RX Desc %p = {Buf:0x%8x, Next:0x%x}", rxdescs,
170 rxdescs[i].RXBufferStart, rxdescs[i].RDBranchAddress
173 rxdescs[ N_RX_DESCS - 1 ].RDBranchAddress = Card->DescTablePhys;
174 Card->NextRX = &rxdescs[0];
176 Card->TXDescs = (void*)(rxdescs + N_RX_DESCS);
177 memset(Card->TXDescs, 0, sizeof(struct sTXDesc)*N_TX_DESCS);
178 for( int i = 0; i < N_TX_DESCS; i ++ )
180 Card->TXDescs[i].TDBranchAddress = Card->DescTablePhys + (N_RX_DESCS + i + 1) * DESC_SIZE;
182 Card->TXDescs[N_TX_DESCS-1].TDBranchAddress = Card->DescTablePhys + N_RX_DESCS * DESC_SIZE;
183 Card->nFreeTX = N_TX_DESCS;
186 // - Initialise card state
187 LOG("Initialising card state");
188 outb(Card->IOBase + REG_IMR0, 0xFF);
189 outb(Card->IOBase + REG_IMR1, 0xFF);
190 outd(Card->IOBase + REG_CUR_RX_DESC, Card->DescTablePhys);
191 outd(Card->IOBase + REG_CUR_TX_DESC, Card->DescTablePhys + N_RX_DESCS * DESC_SIZE);
193 outb(Card->IOBase + REG_TCR, TCR_TRSF(4));
196 outb(Card->IOBase + REG_CR0, CR0_BASEVAL);
197 outb(Card->IOBase + REG_CR1, 0); // Disabled TX polling only?
199 LOG("ISR state: %02x %02x", inb(Card->IOBase + REG_ISR0), inb(Card->IOBase + REG_ISR1));
202 // --- File Functions ---
203 tIPStackBuffer *Rhine2_WaitPacket(void *Ptr)
207 struct sRXDesc *desc;
212 LOG("CR0 state: %02x", inb(card->IOBase + REG_CR0));
213 if( Semaphore_Wait( &card->ReadSemaphore, 1 ) != 1 )
221 while( !(desc->Length & (1 << 15)) )
223 // LOG("desc(%p) = {RSR:%04x,Length:%04x,BufferSize:%04x,RXBufferStart:%08x,RDBranchAddress:%08x}",
224 // desc, desc->RSR, desc->Length, desc->BufferSize, desc->RXBufferStart, desc->RDBranchAddress);
225 // TODO: This kinda expensive call can be changed for an increment, but cbf
226 desc = Rhine2_int_GetDescFromPhys(card, desc->RDBranchAddress);
230 LOG("%i descriptors in packet", nDesc);
232 ret = IPStack_Buffer_CreateBuffer(nDesc);
234 while( !(desc->Length & (1 << 15)) )
236 void *data = Rhine2_int_GetBufferFromPhys(card, desc->RXBufferStart);
237 IPStack_Buffer_AppendSubBuffer(ret,
238 desc->Length, 0, data,
239 Rhine2_int_FreeRXDesc, desc
241 desc = Rhine2_int_GetDescFromPhys(card, desc->RDBranchAddress);
249 int Rhine2_SendPacket(void *Ptr, tIPStackBuffer *Buffer)
254 int nDescs, first_desc_id;
255 struct sTXDesc *desc = NULL;
256 struct sTXDesc *first_desc = NULL;
257 struct sTXDesc *last_desc = NULL;
259 ENTER("pPtr pBuffer", Ptr, Buffer);
264 for( int id = -1; -1 != (id = IPStack_Buffer_GetBuffer(Buffer, id, &len, &data)); )
266 if( ((tVAddr)data & (PAGE_SIZE-1)) + len > PAGE_SIZE )
275 LOG("%i descriptors needed", nDescs);
277 if( card->nFreeTX < nDescs ) {
279 // TODO: Semaphore instead?
284 first_desc_id = card->NextTX;
285 card->NextTX = (card->NextTX + nDescs) % N_TX_DESCS;
287 desc = card->TXDescs + first_desc_id;
290 for( int id = -1; -1 != (id = IPStack_Buffer_GetBuffer(Buffer, id, &len, &data)); )
292 tPAddr pdata = MM_GetPhysAddr( (tVAddr)data );
296 Log_Warning("Rhine2", "TODO: Bounce-buffer >32 pbit buffers");
300 if( (pdata & (PAGE_SIZE-1)) + len > PAGE_SIZE )
302 // Need to split into to descriptors
303 Log_Warning("Rhine2", "TODO: Split cross-page buffers");
306 LOG("Buffer %i (%p+0x%x) placed in %p", id-1, data, len, desc);
308 // TODO: Rhine I requires 4-byte alignment (fsck that, I don't have one)
310 desc->TXBufferStart = pdata;
311 desc->BufferSize = len | (1 << 15);
315 desc->TSR = 0; // OWN will be set below
317 desc->TSR = TD_TSR_OWN;
320 if(first_desc_id + nDescs == N_TX_DESCS)
321 desc = card->TXDescs;
326 data = IPStack_Buffer_CompactBuffer(Buffer, &len);
329 first_desc_id = card->NextTX;
330 card->NextTX = (card->NextTX + nDescs) % N_TX_DESCS;
331 desc = card->TXDescs + first_desc_id;
333 desc->TXBufferStart = MM_GetPhysAddr( data );
334 desc->BufferSize = len | (1 << 15);
339 first_desc = card->TXDescs + first_desc_id;
342 first_desc->TCR |= TD_TCR_STP;
343 last_desc->TCR |= TD_TCR_EDP|TD_TCR_IC;
344 // last_desc->BufferSize &= ~(1 << 15);
346 first_desc->TSR |= TD_TSR_OWN;
348 LOG("%i descriptors allocated, first = %p, last = %p", nDescs, first_desc, last_desc);
351 LOG("Waiting for TX to complete");
352 outb(card->IOBase + REG_CR0, CR0_TDMD|CR0_BASEVAL);
353 Semaphore_Wait(&card->SendSemaphore, 1);
363 void Rhine2_IRQHandler(int Num, void *Ptr)
366 Uint8 isr0 = inb(card->IOBase + REG_ISR0);
367 Uint8 isr1 = inb(card->IOBase + REG_ISR1);
369 if( isr0 == 0 ) return ;
371 LOG("ISR0 = 0x%02x, ISR1 = 0x%02x", isr0, isr1);
373 if( isr0 & ISR0_PRX )
376 Semaphore_Signal(&card->ReadSemaphore, 1);
379 if( isr0 & ISR0_PTX )
382 Semaphore_Signal(&card->SendSemaphore, 1);
385 if( isr0 & ISR0_TXE )
387 LOG("TX Error... oops");
388 Semaphore_Signal(&card->SendSemaphore, 1);
393 LOG("Transmit buffer underflow");
396 LOG("Acking interrupts");
397 outb(card->IOBase + REG_ISR0, isr0);
398 outb(card->IOBase + REG_ISR1, isr1);
402 struct sRXDesc *Rhine2_int_GetDescFromPhys(tCard *Card, Uint32 Addr)
404 if( Card->DescTablePhys > Addr ) return NULL;
405 if( Card->DescTablePhys + PAGE_SIZE <= Addr ) return NULL;
406 if( Addr & 15 ) return NULL;
407 return (struct sRXDesc*)Card->DescTable + ((Addr & (PAGE_SIZE-1)) / 16);
410 void *Rhine2_int_GetBufferFromPhys(tCard *Card, Uint32 Addr)
412 for( int i = 0; i < N_RX_BUF_PAGES; i ++ )
414 if( Card->RXBuffers[i].Phys > Addr ) continue;
415 if( Card->RXBuffers[i].Phys + PAGE_SIZE <= Addr ) continue;
416 return Card->RXBuffers[i].Virt + (Addr & (PAGE_SIZE-1));
421 void Rhine2_int_FreeRXDesc(void *Ptr, size_t u1, size_t u2, const void *u3)
423 struct sRXDesc *desc = Ptr;
425 LOG("Descriptor %p returned to card", desc);
428 desc->Length = (1 << 15); // Reset OWN