2 * Acess2 Kernel - AHCI Driver
3 * - By John Hodge (thePowersGang)
11 #define AHCI_CAP_S64A (1 << 31) // Supports 64-bit addressing
12 #define AHCI_CAP_SNCQ (1 << 30) // Supports Native Command Queuing
13 #define AHCI_CAP_SXS (1 << 5) // Support External SATA
17 Uint32 CAP; // Host Capabilities
18 Uint32 GHC; // Global Host Control;
19 Uint16 IS; // Interrupt Status
20 Uint16 PI; // Ports Implemented
22 Uint32 CCC_CTL; // Command Completion Coalsecing Control
23 Uint16 CCC_PORTS; // Command Completion Coalsecing Ports
24 Uint32 EM_LOC; // Enclosure Management Location
25 Uint32 CAP2; // Host Capabilities Extended
26 Uint16 BOHC; // BIOS/OS Handoff Control and Status
28 Uint16 _padding[(0x100-0x2C)/2];
32 Uint32 PxCLB; // Command List Base Address
33 Uint32 PxCLBU; // (High of above)
34 Uint32 PxFB; // FIS Base Address
35 Uint32 PxFBU; // (high of above)
36 Uint32 PxIS; // Interrupt Status
37 Uint32 PxIE; // Interrupt Enable
38 Uint32 PxCMD; // Command and Status
40 Uint32 PxTFD; // Task File Data
41 Uint32 PxSIG; // Signature
42 Uint32 PxSSTS; // Serial ATA Status
43 Uint32 PxSCTL; // Serial ATA Control
44 Uint32 PxSERR; // Serial ATA Error
45 Uint32 PxSACT; // Serial ATA Active
46 Uint32 PxCI; // Command Issue
47 Uint32 PxSNTF; // Serial ATA Notification
48 Uint32 PxFBS; // FIS-based Switching Control
49 Uint32 _resvd2[(0x70-0x44)/4];