3 * - By John Hodge (thePowersGang)
9 #define VERSION VER2(0,1)
20 #define EHCI_MAX_CONTROLLERS 4
21 #define EHCI_THREADEVENT_IOC THREAD_EVENT_USER1
22 #define EHCI_THREADEVENT_PORTSC THREAD_EVENT_USER2
25 int EHCI_Initialise(char **Arguments);
26 int EHCI_Cleanup(void);
27 int EHCI_InitController(tPAddr BaseAddress, Uint8 InterruptNum);
28 void EHCI_InterruptHandler(int IRQ, void *Ptr);
30 void *EHCI_InitInterrupt(void *Ptr, int Endpoint, int bInput, int Period, tUSBHostCb Cb, void *CbData, void *Buf, size_t Length);
31 void *EHCI_InitIsoch (void *Ptr, int Endpoint, size_t MaxPacketSize);
32 void *EHCI_InitControl(void *Ptr, int Endpoint, size_t MaxPacketSize);
33 void *EHCI_InitBulk (void *Ptr, int Endpoint, size_t MaxPacketSize);
34 void EHCI_RemEndpoint(void *Ptr, void *Handle);
35 void *EHCI_SendControl(void *Ptr, void *Dest, tUSBHostCb Cb, void *CbData,
37 const void *SetupData, size_t SetupLength,
38 const void *OutData, size_t OutLength,
39 void *InData, size_t InLength
41 void *EHCI_SendBulk(void *Ptr, void *Dest, tUSBHostCb Cb, void *CbData, int Dir, void *Data, size_t Length);
42 void EHCI_FreeOp(void *Ptr, void *Handle);
43 Uint32 EHCI_int_RootHub_FeatToMask(int Feat);
44 void EHCI_RootHub_SetPortFeature(void *Ptr, int Port, int Feat);
45 void EHCI_RootHub_ClearPortFeature(void *Ptr, int Port, int Feat);
46 int EHCI_RootHub_GetPortStatus(void *Ptr, int Port, int Flag);
48 tEHCI_qTD *EHCI_int_AllocateTD(tEHCI_Controller *Cont, int PID, void *Data, size_t Length, tUSBHostCb Cb, void *CbData);
49 void EHCI_int_DeallocateTD(tEHCI_Controller *Cont, tEHCI_qTD *TD);
50 void EHCI_int_AppendTD(tEHCI_Controller *Cont, tEHCI_QH *QH, tEHCI_qTD *TD);
51 tEHCI_QH *EHCI_int_AllocateQH(tEHCI_Controller *Cont, int Endpoint, size_t MaxPacketSize);
52 void EHCI_int_DeallocateQH(tEHCI_Controller *Cont, tEHCI_QH *QH);
53 void EHCI_int_InterruptThread(void *ControllerPtr);
56 MODULE_DEFINE(0, VERSION, USB_EHCI, EHCI_Initialise, NULL, "USB_Core", NULL);
57 tEHCI_Controller gaEHCI_Controllers[EHCI_MAX_CONTROLLERS];
58 tUSBHostDef gEHCI_HostDef = {
59 .InitInterrupt = EHCI_InitInterrupt,
60 .InitIsoch = EHCI_InitIsoch,
61 .InitControl = EHCI_InitControl,
62 .InitBulk = EHCI_InitBulk,
63 .RemEndpoint = EHCI_RemEndpoint,
65 .SendControl = EHCI_SendControl,
66 .SendBulk = EHCI_SendBulk,
67 .FreeOp = EHCI_FreeOp,
69 .CheckPorts = NULL, // No need
70 .SetPortFeature = EHCI_RootHub_SetPortFeature,
71 .ClearPortFeature = EHCI_RootHub_ClearPortFeature,
72 .GetPortStatus = EHCI_RootHub_GetPortStatus,
76 int EHCI_Initialise(char **Arguments)
78 for( int id = -1; (id = PCI_GetDeviceByClass(0x0C0320, 0xFFFFFF, id)) >= 0; )
80 Uint32 addr = PCI_GetBAR(id, 0);
82 // TODO: PCI BIOS emulation time
89 Uint8 irq = PCI_GetIRQ(id);
94 Log_Log("ECHI", "Controller at PCI %i 0x%x IRQ 0x%x",
97 if( EHCI_InitController(addr, irq) )
99 // TODO: Detect other forms of failure than "out of slots"
104 for( int i = 0; Arguments && Arguments[i]; i ++ )
106 char *pos = Arguments[i], *next;
107 LOG("pos = '%s'", pos);
108 tPAddr base = strtoull(pos, &next, 16);
112 LOG("pos = '%s'", pos);
115 LOG("pos = '%s'", pos);
116 int irq = strtol(pos, &next, 16);
121 LOG("base=%x, irq=%i", base, irq);
122 if( EHCI_InitController(base, irq) )
131 int EHCI_Cleanup(void)
136 // --- Driver Init ---
137 int EHCI_InitController(tPAddr BaseAddress, Uint8 InterruptNum)
139 tEHCI_Controller *cont = NULL;
141 ENTER("PBaseAddress iInterruptNum",
142 BaseAddress, InterruptNum);
144 for( int i = 0; i < EHCI_MAX_CONTROLLERS; i ++ )
146 if( gaEHCI_Controllers[i].PhysBase == 0 ) {
147 cont = &gaEHCI_Controllers[i];
148 cont->PhysBase = BaseAddress;
153 Log_Notice("EHCI", "Too many controllers (EHCI_MAX_CONTROLLERS=%i)",
154 EHCI_MAX_CONTROLLERS);
159 // - Nuke a couple of fields so error handling code doesn't derp
160 cont->CapRegs = NULL;
161 cont->PeriodicQueue = NULL;
164 // -- Build up structure --
165 cont->CapRegs = (void*)( MM_MapHWPages(BaseAddress, 1) + (BaseAddress % PAGE_SIZE) );
166 if( !cont->CapRegs ) {
167 Log_Warning("EHCI", "Can't map 1 page at %P into kernel space", BaseAddress);
170 LOG("cont->CapRegs = %p", cont->CapRegs);
172 if( (cont->CapRegs->CapLength & 3) ) {
173 Log_Warning("EHCI", "Controller at %P non-aligned op regs (%x)",
174 BaseAddress, cont->CapRegs->CapLength);
177 if( BaseAddress % PAGE_SIZE + cont->CapRegs->CapLength + sizeof(tEHCI_CapRegs) > PAGE_SIZE ) {
178 Log_Warning("EHCI", "%P: Cap regs over page boundary (+0x%x bytes)",
179 BaseAddress % PAGE_SIZE + cont->CapRegs->CapLength + sizeof(tEHCI_CapRegs)
183 cont->OpRegs = (void*)( (Uint32*)cont->CapRegs + cont->CapRegs->CapLength / 4 );
184 LOG("cont->OpRegs = %p", cont->OpRegs);
185 // - Allocate periodic queue
187 cont->PeriodicQueue = (void*)MM_AllocDMA(1, 32, &unused);
188 if( !cont->PeriodicQueue ) {
189 Log_Warning("ECHI", "Can't allocate 1 32-bit page for periodic queue");
192 for( int i = 0; i < 1024; i ++ )
193 cont->PeriodicQueue[i] = 1;
197 // - Allocate TD pool
198 cont->TDPool = (void*)MM_AllocDMA(1, 32, &unused);
199 if( !cont->TDPool ) {
200 Log_Warning("ECHI", "Can't allocate 1 32-bit page for qTD pool");
203 for( int i = 0; i < TD_POOL_SIZE; i ++ ) {
204 cont->TDPool[i].Token = 3 << 8;
208 cont->nPorts = cont->CapRegs->HCSParams & 0xF;
209 LOG("cont->nPorts = %i", cont->nPorts);
212 IRQ_AddHandler(InterruptNum, EHCI_InterruptHandler, cont);
213 cont->InterruptThread = Proc_SpawnWorker(EHCI_int_InterruptThread, cont);
214 if( !cont->InterruptThread ) {
215 Log_Warning("EHCI", "Can't spawn interrupt worker thread");
218 LOG("cont->InterruptThread = %p", cont->InterruptThread);
221 cont->DeadTD = EHCI_int_AllocateTD(cont, 0, NULL, 0, NULL, NULL);
222 memset(cont->DeadTD, 0, sizeof(tEHCI_qTD));
223 cont->DeadTD->Link = 1;
224 cont->DeadTD->Link2 = 1;
225 cont->DeadTD->Token = QTD_TOKEN_STS_HALT;
228 cont->DeadQH = EHCI_int_AllocateQH(cont, 0, 0);
229 memset(cont->DeadQH, 0, sizeof(tEHCI_QH));
230 cont->DeadQH->HLink = MM_GetPhysAddr(cont->DeadQH)|22;
231 cont->DeadQH->Endpoint = (1<<15); // H - Head of Reclamation List
233 // -- Initialisation procedure (from ehci-r10) --
234 // - Reset controller
235 cont->OpRegs->USBCmd = USBCMD_HCReset;
236 // - Set CTRLDSSEGMENT (TODO: 64-bit support)
238 cont->OpRegs->USBIntr = USBINTR_IOC|USBINTR_PortChange|USBINTR_FrameRollover;
239 // - Set PERIODICLIST BASE
240 cont->OpRegs->PeridocListBase = MM_GetPhysAddr( cont->PeriodicQueue );
241 // - Set ASYNCLISTADDR
242 cont->OpRegs->AsyncListAddr = MM_GetPhysAddr(cont->DeadQH);
243 // - Enable controller
244 cont->OpRegs->USBCmd = (0x40 << 16) | USBCMD_PeriodicEnable | USBCMD_AsyncEnable | USBCMD_Run;
246 cont->OpRegs->ConfigFlag = 1;
248 // -- Register with USB Core --
249 cont->RootHub = USB_RegisterHost(&gEHCI_HostDef, cont, cont->nPorts);
250 LOG("cont->RootHub = %p", cont->RootHub);
257 MM_Deallocate( (tVAddr)cont->CapRegs );
258 if( cont->PeriodicQueue )
259 MM_Deallocate( (tVAddr)cont->PeriodicQueue );
261 MM_Deallocate( (tVAddr)cont->TDPool );
266 void EHCI_InterruptHandler(int IRQ, void *Ptr)
268 tEHCI_Controller *Cont = Ptr;
269 Uint32 sts = Cont->OpRegs->USBSts;
270 Uint32 orig_sts = sts;
272 if( sts & 0xFFFF0FC0 ) {
273 LOG("Oops, reserved bits set (%08x), funny hardware?", sts);
277 // Unmask read-only bits
280 if( sts & USBINTR_IOC ) {
282 LOG("%P IOC", Cont->PhysBase);
283 Threads_PostEvent(Cont->InterruptThread, EHCI_THREADEVENT_IOC);
287 if( sts & USBINTR_AsyncAdvance ) {
288 LOG("%P IAAD", Cont->PhysBase);
290 if( Cont->AsyncQHAddHead )
294 sts &= ~USBINTR_AsyncAdvance;
297 if( sts & USBINTR_PortChange ) {
298 // Port change, determine what port and poke helper thread
299 LOG("%P Port status change", Cont->PhysBase);
300 Threads_PostEvent(Cont->InterruptThread, EHCI_THREADEVENT_PORTSC);
301 sts &= ~USBINTR_PortChange;
304 if( sts & USBINTR_FrameRollover ) {
305 // Frame rollover, used to aid timing (trigger per-second operations)
306 //LOG("%p Frame rollover", Ptr);
307 sts &= ~USBINTR_FrameRollover;
311 // Unhandled interupt bits
313 LOG("WARN - Bitmask %x unhandled", sts);
318 Cont->OpRegs->USBSts = orig_sts;
321 // --------------------------------------------------------------------
323 // --------------------------------------------------------------------
324 void *EHCI_InitInterrupt(void *Ptr, int Endpoint, int bOutbound, int Period,
325 tUSBHostCb Cb, void *CbData, void *Buf, size_t Length)
327 tEHCI_Controller *Cont = Ptr;
328 int pow2period, period_pow;
330 ASSERTCR(Endpoint, <, 256*16, NULL);
331 ASSERTCR(Period, >, 0, NULL);
335 LOG("Endpoint=%x, bOutbound=%i, Period=%i, Length=%i", Endpoint, bOutbound, Period, Length);
337 // Round the period to the closest power of two
340 // - Find the first power above the period
341 while( pow2period < Period )
346 // - Check which is closest
347 if( Period - pow2period / 2 > pow2period - Period )
350 Period = pow2period/2;
353 LOG("period_pow = %i, Period = %ims", period_pow, Period);
356 tEHCI_QH *qh = EHCI_int_AllocateQH(Cont, Endpoint, Length);
357 qh->Impl.IntPeriodPow = period_pow;
358 qh->EndpointExt |= 1; // TODO: uFrame load balancing (8 entry bitfield)
360 Mutex_Acquire(&Cont->PeriodicListLock);
362 // Choose an interrupt slot to use
363 int minslot = 0, minslot_load = INT_MAX;
364 for( int slot = 0; slot < Period; slot ++ )
367 for( int i = 0; i < PERIODIC_SIZE; i += Period )
368 load += Cont->InterruptLoad[i+slot];
369 if( load == 0 ) break;
370 if( load < minslot_load ) {
375 // Increase loading on the selected slot
376 for( int i = minslot; i < PERIODIC_SIZE; i += Period )
377 Cont->InterruptLoad[i] += Length;
378 qh->Impl.IntOfs = minslot;
379 LOG("Using slot %i", minslot);
381 // Allocate TD for the data
382 tEHCI_qTD *td = EHCI_int_AllocateTD(Cont, (bOutbound ? PID_OUT : PID_IN), Buf, Length, Cb, CbData);
383 EHCI_int_AppendTD(Cont, qh, td);
385 // Insert into the periodic list
386 for( int i = 0; i < PERIODIC_SIZE; i += Period )
389 // - the end is reached
390 // - this QH is found
391 // - A QH with a lower period is encountered
392 tEHCI_QH *pqh = NULL;
394 for( nqh = Cont->PeriodicQueueV[i]; nqh; pqh = nqh, nqh = nqh->Impl.Next )
398 if( nqh->Impl.IntPeriodPow < period_pow )
402 // Somehow, we've already been added to this queue.
403 if( nqh && nqh == qh )
406 if( qh->Impl.Next && qh->Impl.Next != nqh ) {
407 Log_Warning("EHCI", "Suspected bookkeeping error on %p - int list %i+%i overlap",
408 Cont, period_pow, minslot);
414 qh->HLink = MM_GetPhysAddr(nqh) | 2;
417 qh->Impl.Next = NULL;
418 qh->HLink = 2|1; // QH, Terminate
423 pqh->HLink = MM_GetPhysAddr(qh) | 2;
426 Cont->PeriodicQueueV[i] = qh;
427 Cont->PeriodicQueue[i] = MM_GetPhysAddr(qh) | 2;
430 Mutex_Release(&Cont->PeriodicListLock);
435 void *EHCI_InitIsoch(void *Ptr, int Endpoint, size_t MaxPacketSize)
437 ENTER("pPtr iEndpoint iMaxPacketSize",
438 Ptr, Endpoint, MaxPacketSize);
439 LEAVE_RET('p', (void*)(tVAddr)(Endpoint + 1));
441 void *EHCI_InitControl(void *Ptr, int Endpoint, size_t MaxPacketSize)
443 tEHCI_Controller *Cont = Ptr;
445 ENTER("pPtr iEndpoint iMaxPacketSize",
446 Ptr, Endpoint, MaxPacketSize);
449 tEHCI_QH *qh = EHCI_int_AllocateQH(Cont, Endpoint, MaxPacketSize);
450 qh->CurrentTD = MM_GetPhysAddr(Cont->DeadTD);
452 // Append to async list
453 // TODO: Lock async list
454 qh->Impl.Next = Cont->DeadQH->Impl.Next;
455 Cont->DeadQH->Impl.Next = qh;
456 qh->HLink = Cont->DeadQH->HLink;
457 Cont->DeadQH->HLink = MM_GetPhysAddr(qh)|2;
459 LOG("Created %p(%P) for %P Ep 0x%x - %i bytes MPS",
460 qh, MM_GetPhysAddr(qh), Cont->PhysBase, Endpoint, MaxPacketSize);
465 void *EHCI_InitBulk(void *Ptr, int Endpoint, size_t MaxPacketSize)
467 return EHCI_InitControl(Ptr, Endpoint, MaxPacketSize);
469 void EHCI_RemEndpoint(void *Ptr, void *Handle)
473 else if( (tVAddr)Handle <= 256*16 )
478 // Remove QH from list
479 // - If it's a polling endpoint, need to remove from all periodic lists
480 if( qh->Impl.IntPeriodPow != 0xFF) {
488 EHCI_int_DeallocateQH(Ptr, Handle);
492 void *EHCI_SendControl(void *Ptr, void *Dest, tUSBHostCb Cb, void *CbData,
494 const void *SetupData, size_t SetupLength,
495 const void *OutData, size_t OutLength,
496 void *InData, size_t InLength
499 tEHCI_Controller *Cont = Ptr;
500 tEHCI_qTD *td_setup, *td_data, *td_status;
503 if( (tVAddr)Dest <= 256*16 )
506 LOG("Dest=%p, isOutbound=%i, Lengths(Setup:%i,Out:%i,In:%i)",
507 Dest, isOutbound, SetupLength, OutLength, InLength);
509 // TODO: Check size of SETUP and status
512 td_setup = EHCI_int_AllocateTD(Cont, PID_SETUP, (void*)SetupData, SetupLength, NULL, NULL);
515 td_data = OutData ? EHCI_int_AllocateTD(Cont, PID_OUT, (void*)OutData, OutLength, NULL, NULL) : NULL;
516 td_status = EHCI_int_AllocateTD(Cont, PID_IN, InData, InLength, Cb, CbData);
520 td_data = InData ? EHCI_int_AllocateTD(Cont, PID_IN, InData, InLength, NULL, NULL) : NULL;
521 td_status = EHCI_int_AllocateTD(Cont, PID_OUT, (void*)OutData, OutLength, Cb, CbData);
523 td_status->Token |= QTD_TOKEN_IOC; // IOC
527 td_setup->Link = MM_GetPhysAddr(td_data);
528 td_setup->Next = td_data;
529 td_data->Link = MM_GetPhysAddr(td_status);
530 td_data->Next = td_status;
531 td_data->Token |= QTD_TOKEN_STS_ACTIVE; // Active
534 td_setup->Link = MM_GetPhysAddr(td_status);
535 td_setup->Next = td_status;
537 td_setup->Token |= QTD_TOKEN_STS_ACTIVE; // Active
538 td_status->Token |= QTD_TOKEN_STS_ACTIVE;
540 td_status->Link2 = 1;
541 EHCI_int_AppendTD(Cont, Dest, td_setup);
543 LOG("return td_status=%p", td_status);
547 void *EHCI_SendBulk(void *Ptr, void *Dest, tUSBHostCb Cb, void *CbData, int Dir, void *Data, size_t Length)
549 tEHCI_Controller *Cont = Ptr;
551 // Sanity check the pointer
552 // - Can't be NULL or an isoch
553 if( (tVAddr)Dest <= 256*16 )
556 // Allocate single TD
557 tEHCI_qTD *td = EHCI_int_AllocateTD(Cont, (Dir ? PID_OUT : PID_IN), Data, Length, Cb, CbData);
558 EHCI_int_AppendTD(Cont, Dest, td);
563 void EHCI_FreeOp(void *Ptr, void *Handle)
565 tEHCI_Controller *Cont = Ptr;
567 EHCI_int_DeallocateTD(Cont, Handle);
570 Uint32 EHCI_int_RootHub_FeatToMask(int Feat)
574 case PORT_RESET: return PORTSC_PortReset;
575 case PORT_ENABLE: return PORTSC_PortEnabled;
577 Log_Warning("EHCI", "Unknown root hub port feature %i", Feat);
582 void EHCI_RootHub_SetPortFeature(void *Ptr, int Port, int Feat)
584 tEHCI_Controller *Cont = Ptr;
585 if(Port >= Cont->nPorts) return;
587 Cont->OpRegs->PortSC[Port] |= EHCI_int_RootHub_FeatToMask(Feat);
590 void EHCI_RootHub_ClearPortFeature(void *Ptr, int Port, int Feat)
592 tEHCI_Controller *Cont = Ptr;
593 if(Port >= Cont->nPorts) return;
595 Cont->OpRegs->PortSC[Port] &= ~EHCI_int_RootHub_FeatToMask(Feat);
598 int EHCI_RootHub_GetPortStatus(void *Ptr, int Port, int Flag)
600 tEHCI_Controller *Cont = Ptr;
601 if(Port >= Cont->nPorts) return 0;
603 return !!(Cont->OpRegs->PortSC[Port] & EHCI_int_RootHub_FeatToMask(Flag));
606 // --------------------------------------------------------------------
608 // --------------------------------------------------------------------
609 tEHCI_qTD *EHCI_int_GetTDFromPhys(tEHCI_Controller *Cont, Uint32 Addr)
611 if( Addr == 0 ) return NULL;
612 LOG("%p + (%x - %x)", Cont->TDPool, Addr, MM_GetPhysAddr(Cont->TDPool));
613 return Cont->TDPool + (Addr - MM_GetPhysAddr(Cont->TDPool))/sizeof(tEHCI_qTD);
616 tEHCI_qTD *EHCI_int_AllocateTD(tEHCI_Controller *Cont, int PID, void *Data, size_t Length, tUSBHostCb Cb, void *CbData)
618 // Semaphore_Wait(&Cont->TDSemaphore, 1);
619 Mutex_Acquire(&Cont->TDPoolMutex);
620 for( int i = 0; i < TD_POOL_SIZE; i ++ )
622 if( ((Cont->TDPool[i].Token >> 8) & 3) != 3 )
624 Cont->TDPool[i].Token = (PID << 8) | (Length << 16);
625 Mutex_Release(&Cont->TDPoolMutex);
627 tEHCI_qTD *td = &Cont->TDPool[i];
630 td->CallbackData = CbData;
631 // NOTE: Assumes that `Length` is <= PAGE_SIZE
632 ASSERTC(Length, <, PAGE_SIZE);
633 // TODO: Handle bouncing >32-bit pages
635 ASSERT( MM_GetPhysAddr(Data) >> 32 == 0 );
637 td->Pages[0] = MM_GetPhysAddr(Data);
638 if( (td->Pages[0] & (PAGE_SIZE-1)) + Length - 1 > PAGE_SIZE )
639 td->Pages[1] = MM_GetPhysAddr((char*)Data + Length - 1) & ~(PAGE_SIZE-1);
640 LOG("Allocated %p(%P) for PID %i on %P",
641 td, MM_GetPhysAddr(td), PID, Cont->PhysBase);
645 Mutex_Release(&Cont->TDPoolMutex);
649 void EHCI_int_DeallocateTD(tEHCI_Controller *Cont, tEHCI_qTD *TD)
654 void EHCI_int_AppendTD(tEHCI_Controller *Cont, tEHCI_QH *QH, tEHCI_qTD *TD)
656 tEHCI_qTD *ptd = NULL;
657 Uint32 link = QH->CurrentTD;
658 tPAddr dead_td = MM_GetPhysAddr(Cont->DeadTD);
661 Mutex_Acquire(&Cont->ActiveTDsLock);
662 if( Cont->ActiveTDTail )
663 Cont->ActiveTDTail->Next = TD;
665 Cont->ActiveTDHead = TD;
667 for( last = TD; last->Next; last = last->Next )
669 Cont->ActiveTDTail = last;
670 Mutex_Release(&Cont->ActiveTDsLock);
673 // TODO: Need locking and validation here
674 while( link && !(link & 1) && link != dead_td )
676 ptd = EHCI_int_GetTDFromPhys(Cont, link);
679 // TODO: Figure out how to follow this properly
681 QH->CurrentTD = MM_GetPhysAddr(TD)|2;
682 QH->Overlay.Link = QH->CurrentTD;
683 LOG("Appended %p to beginning of %p", TD, QH);
686 ptd->Link = MM_GetPhysAddr(TD);
687 ptd->Link2 = MM_GetPhysAddr(TD);
688 LOG("Appended %p to end of %p", TD, QH);
690 QH->Endpoint |= QH_ENDPT_H;
691 QH->Overlay.Token &= ~QTD_TOKEN_STS_HALT;
694 tEHCI_QH *EHCI_int_AllocateQH(tEHCI_Controller *Cont, int Endpoint, size_t MaxPacketSize)
697 Mutex_Acquire(&Cont->QHPoolMutex);
698 for( int i = 0; i < QH_POOL_SIZE; i ++ )
700 if( !MM_GetPhysAddr( Cont->QHPools[i/QH_POOL_NPERPAGE] ) ) {
702 Cont->QHPools[i/QH_POOL_NPERPAGE] = (void*)MM_AllocDMA(1, 32, &tmp);
703 memset(Cont->QHPools[i/QH_POOL_NPERPAGE], 0, PAGE_SIZE);
706 ret = &Cont->QHPools[i/QH_POOL_NPERPAGE][i%QH_POOL_NPERPAGE];
707 if( ret->HLink == 0 ) {
708 memset(ret, 0, sizeof(*ret));
710 ret->Overlay.Link = MM_GetPhysAddr(Cont->DeadTD);
711 ret->Endpoint = (Endpoint >> 4) | 0x80 | ((Endpoint & 0xF) << 8)
712 | (MaxPacketSize << 16);
713 ret->EndpointExt = (1<<30);
714 // TODO: Endpoint speed (13:12) 0:Full, 1:Low, 2:High
715 // TODO: Control Endpoint Flag (27) 0:*, 1:Full/Low Control
716 Mutex_Release(&Cont->QHPoolMutex);
720 Mutex_Release(&Cont->QHPoolMutex);
724 void EHCI_int_DeallocateQH(tEHCI_Controller *Cont, tEHCI_QH *QH)
726 // TODO: Ensure it's unused (somehow)
730 void EHCI_int_HandlePortConnectChange(tEHCI_Controller *Cont, int Port)
733 if( Cont->OpRegs->PortSC[Port] & PORTSC_CurrentConnectStatus )
735 // Is the device low-speed?
736 if( (Cont->OpRegs->PortSC[Port] & PORTSC_LineStatus_MASK) == PORTSC_LineStatus_Kstate )
738 LOG("Low speed device on %P Port %i, giving to companion", Cont->PhysBase, Port);
739 Cont->OpRegs->PortSC[Port] |= PORTSC_PortOwner;
741 // not a low-speed device, EHCI reset
744 LOG("Device connected on %P Port %i", Cont->PhysBase, Port);
746 USB_PortCtl_BeginReset(Cont->RootHub, Port);
752 if( Cont->OpRegs->PortSC[Port] & PORTSC_PortOwner ) {
753 LOG("Device disconnected on %P Port %i (companion), taking it back",
754 Cont->PhysBase, Port);
755 Cont->OpRegs->PortSC[Port] &= ~PORTSC_PortOwner;
758 LOG("Device disconnected on %P Port %i", Cont->PhysBase, Port);
759 USB_DeviceDisconnected(Cont->RootHub, Port);
764 void EHCI_int_InterruptThread(void *ControllerPtr)
766 tEHCI_Controller *Cont = ControllerPtr;
771 LOG("sleeping for events");
772 events = Threads_WaitEvents(EHCI_THREADEVENT_IOC|EHCI_THREADEVENT_PORTSC);
774 // TODO: Should this cause a termination?
776 LOG("events = 0x%x", events);
778 if( events & EHCI_THREADEVENT_IOC )
780 // IOC, Do whatever it is you do
781 Log_Warning("EHCI", "%P IOC - TODO: Call registered callbacks and reclaim",
784 Mutex_Acquire(&Cont->ActiveTDsLock);
785 tEHCI_qTD *prev = NULL;
786 for(tEHCI_qTD *td = Cont->ActiveTDHead; td; td = td->Next)
788 LOG("td(%p)->Token = %x", td, td->Token);
789 // If active, continue
790 if( td->Token & QTD_TOKEN_STS_ACTIVE ) {
796 LOG("%p Complete", td);
797 // - call the callback
802 Log_Warning("EHCI", "TODO: Map %x,%x+%i for callback",
803 td->Pages[0], td->Pages[1], td->Size);
805 td->Callback(td->CallbackData, ptr, td->Size);
808 // Remove and release
809 *(prev ? &prev->Next : &Cont->ActiveTDHead) = td->Next;
812 Cont->ActiveTDTail = prev;
813 Mutex_Release(&Cont->ActiveTDsLock);
816 // Port status change interrupt
817 if( events & EHCI_THREADEVENT_PORTSC )
819 // Check for port status changes
820 for(int i = 0; i < Cont->nPorts; i ++ )
822 Uint32 sts = Cont->OpRegs->PortSC[i];
823 LOG("Port %i: sts = %x", i, sts);
824 Cont->OpRegs->PortSC[i] = sts;
825 if( sts & PORTSC_ConnectStatusChange )
826 EHCI_int_HandlePortConnectChange(Cont, i);
828 if( sts & PORTSC_PortEnableChange )
830 // Handle enable/disable
833 if( sts & PORTSC_OvercurrentChange )
835 // Handle over-current change
840 LOG("Going back to sleep");