3 * - By John Hodge (thePowersGang)
11 typedef struct sOHCI_Controller tOHCI_Controller;
12 typedef struct sEndpointDesc tOHCI_Endpoint;
13 typedef struct sGeneralTD tOHCI_GeneralTD;
18 // 7:10 = Endpoint Num
19 // 11:12 = Direction (TD, OUT, IN, TD)
20 // 13 = Speed (Full, Low)
22 // 15 = Format (Others, Isochronous)
23 // 16:26 = Max Packet Size
24 // 27:30 = AVAIL - Used for Controller ID
25 // 31 = AVAIL - Used for allocated flag (1 = allocated)
29 Uint32 TailP; // Last TD in queue
30 // 0 = Halted (Queue stopped due to error)
31 // 1 = Data toggle carry
34 Uint32 HeadP; // First TD in queue
37 Uint32 NextED; // Next endpoint descriptor
43 // 18 = Buffer Rounding (Allow an undersized packet)
44 // 19:20 = Direction (SETUP, OUT, IN, Resvd)
45 // 21:23 = Delay Interrupt (Frame count, 7 = no int)
46 // 24:25 = Data Toggle (ToggleCarry, ToggleCarry, 0, 1)
47 // 26:27 = Error Count
48 // 28:31 = Condition Code
51 // Base address of packet (or current when being read)
56 // Address of final byte in buffer
59 // -- Acess Information
66 // 0:15 = Starting Frame
68 // 21:23 = Delay Interrupt
69 // 24:26 = Frame Count - 1 (1, 2, 3, 4, 5, 6, 7, 8)
71 // 28:31 = Condition Code
75 // 12:31 = Page number of first byte in buffer
76 Uint32 BP0; // Buffer Page 0
80 // Address of last byte in buffer
84 // 12 = Page selector (BufferPage0, BufferEnd)
93 Uint32 HcCommandStatus;
94 Uint32 HcInterruptStatus;
95 Uint32 HcInterruptEnable;
96 Uint32 HcInterruptDisable;
99 Uint32 HcPeriodCurrentED;
100 Uint32 HcControlHeadED;
101 Uint32 HcControlCurrentED;
103 Uint32 HcBulkCurrentED;
107 Uint32 HcFmRemaining;
109 Uint32 HcPeriodicStart;
110 Uint32 HcLSThreshold;
112 // 0: 7 = NDP (Max of 15)
113 Uint32 HcRhDescriptorA;
114 Uint32 HcRhDescriptorB;
116 Uint32 HcRhPortStatus[15];
121 Uint32 HccaInterruptTable[128/4];
122 Uint16 HccaFrameNumber;
125 Uint32 HccaReserved[116/4];
128 struct sOHCI_IntLists
130 tOHCI_Endpoint Period16[16];
131 tOHCI_Endpoint Period8[8];
132 tOHCI_Endpoint Period4[4];
133 tOHCI_Endpoint Period2[2];
134 tOHCI_Endpoint Period1[1];
135 tOHCI_Endpoint StopED;
138 struct sOHCI_Controller
144 tPAddr ControlSpacePhys;
146 volatile struct sRegisters *ControlSpace;
149 volatile struct sHCCA *HCCA;
150 struct sOHCI_IntLists *IntLists; // At HCCA+512