Modules/ARMv7 GIC - Quietened interrupt handling
[tpg/acess2.git] / KernelLand / Modules / armv7 / GIC / gic.c
1 /*
2  * ARMv7 GIC Support
3  * - By John Hodge (thePowersGang)
4  * 
5  * gic.c
6  * - GIC Core
7  */
8 #define DEBUG   1
9
10 #include <acess.h>
11 #include <modules.h>
12 #include "gic.h"
13 #include <options.h>
14
15 #define N_IRQS  1024
16
17 // === IMPORTS ===
18 extern void     *gpIRQHandler;
19 extern tPAddr   gGIC_DistributorAddr;
20 extern tPAddr   gGIC_InterfaceAddr;
21
22 // === TYPES ===
23 typedef void (*tIRQ_Handler)(int, void*);
24
25 // === PROTOTYPES ===
26  int    GIC_Install(char **Arguments);
27 void    GIC_IRQHandler(void);
28
29 // === GLOBALS ===
30 MODULE_DEFINE(0, 0x100, armv7_GIC, GIC_Install, NULL, NULL);
31 volatile Uint32 *gpGIC_DistributorBase;
32 volatile Uint32 *gpGIC_InterfaceBase;
33 tIRQ_Handler    gaIRQ_Handlers[N_IRQS];
34 void    *gaIRQ_HandlerData[N_IRQS];
35
36 // === CODE ===
37 int GIC_Install(char **Arguments)
38 {
39         // Initialise
40         Log_Debug("GIC", "Dist: %P, Interface: %P",
41                 gGIC_DistributorAddr, gGIC_InterfaceAddr);
42         gpGIC_InterfaceBase = (void*)MM_MapHWPages(gGIC_InterfaceAddr, 1);
43         LOG("gpGIC_InterfaceBase = %p", gpGIC_InterfaceBase);
44         gpGIC_DistributorBase = (void*)MM_MapHWPages(gGIC_DistributorAddr, 1);
45         LOG("gpGIC_DistributorBase = %p", gpGIC_DistributorBase);
46
47         gpGIC_InterfaceBase[GICC_CTLR] = 0;     // Disable CPU interaface
48         LOG("GICC_IAR = %x (CTLR=0)", gpGIC_InterfaceBase[GICC_IAR]);
49
50         gpGIC_InterfaceBase[GICC_PMR] = 0xFF;   // Effectively disable prioritories
51         gpGIC_InterfaceBase[GICC_CTLR] = 1;     // Enable CPU
52         gpGIC_DistributorBase[GICD_CTLR] = 1;   // Enable Distributor
53
54         gpIRQHandler = GIC_IRQHandler;
55
56         __asm__ __volatile__ ("cpsie if");      // Enable IRQs and FIQs
57
58 #if 0
59         for( int i = 0; i < N_IRQS/32; i ++ ) {
60                 Log_Debug("GIC", "GICD_ISENABLER%i %x = %08x",
61                         i, GICD_ISENABLER0 + i,
62                         gpGIC_DistributorBase[GICD_ISENABLER0+i]);
63                 gpGIC_DistributorBase[GICD_ISENABLER0+i] = 0;
64         }
65 #endif
66
67         #if 0
68         // Testing - First 32 actual interrupts enabled
69         gpGIC_DistributorBase[GICD_ISENABLER0+1] = 0xFFFFFFFF;
70         for( int i = 0; i < 32/4; i ++ )
71                 gpGIC_DistributorBase[GICD_ITARGETSR0+8+i] = 0x01010101;
72         #endif
73
74         // Clear out pending IRQs.
75         gpGIC_InterfaceBase[GICC_EOIR] = gpGIC_InterfaceBase[GICC_IAR];
76
77         return MODULE_ERR_OK;
78 }
79
80 void GIC_IRQHandler(void)
81 {
82         Uint32  num = gpGIC_InterfaceBase[GICC_IAR];
83         if( gaIRQ_Handlers[num] ) {
84                 gaIRQ_Handlers[num]( num, gaIRQ_HandlerData[num] );
85         }
86         else {
87                 Log_Debug("GIC", "IRQ 0x%x unhandled", num);
88         }
89         gpGIC_InterfaceBase[GICC_EOIR] = num;
90 }
91
92 int IRQ_AddHandler(int IRQ, tIRQ_Handler Handler, void *Ptr)
93 {
94         if( IRQ < 0 || IRQ >= N_IRQS-32 ) {
95                 return 1;
96         }
97         
98         IRQ += 32;      // 32 internal IRQs
99         // - Enable IRQ, clear pending and send to CPU 1 only
100         gpGIC_DistributorBase[GICD_ISENABLER0+IRQ/32] = 1 << (IRQ & (32-1));
101         ((Uint8*)&gpGIC_DistributorBase[GICD_ITARGETSR0])[IRQ] = 1;
102         gpGIC_DistributorBase[GICD_ICPENDR0+IRQ/32] = 1 << (IRQ & (32-1));
103         
104         // TODO: Does the GIC need to handle IRQ sharing?
105         if( gaIRQ_Handlers[IRQ] ) {
106                 Log_Warning("GIC", "IRQ %i already handled by %p, %p ignored",
107                         IRQ, gaIRQ_Handlers[IRQ], Handler);
108                 return 2;
109         }
110         
111         gaIRQ_Handlers[IRQ] = Handler;
112         gaIRQ_HandlerData[IRQ] = Ptr;
113         
114         Log_Debug("GIC", "IRQ %i handled by %p(%p)", IRQ, Handler, Ptr);
115
116         // DEBUG! Trip the interrupt    
117         gpGIC_DistributorBase[GICD_ISPENDR0+IRQ/32] = 1 << (IRQ & (32-1));
118         return 0;
119 }
120

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