4 * See: ~/Sources/bochs/bochs.../iodev/ne2k.cc
7 #define VERSION ((0<<8)|50)
14 #define MEM_START 0x40
16 #define RX_FIRST (MEM_START)
17 #define RX_LAST (MEM_START+RX_BUF_SIZE-1)
18 #define RX_BUF_SIZE 0x40
19 #define TX_FIRST (MEM_START+RX_BUF_SIZE)
20 #define TX_LAST (MEM_END)
21 #define TX_BUF_SIZE 0x40
26 } csaCOMPAT_DEVICES[] = {
27 {0x10EC, 0x8029}, // Realtek 8029
28 {0x10EC, 0x8129} // Realtek 8129
30 #define NUM_COMPAT_DEVICES (sizeof(csaCOMPAT_DEVICES)/sizeof(csaCOMPAT_DEVICES[0]))
32 enum eNe2k_Page0Read {
33 CMD = 0, //!< the master command register
34 CLDA0, //!< Current Local DMA Address 0
35 CLDA1, //!< Current Local DMA Address 1
36 BNRY, //!< Boundary Pointer (for ringbuffer)
37 TSR, //!< Transmit Status Register
38 NCR, //!< collisions counter
39 FIFO, //!< (for what purpose ??)
40 ISR, //!< Interrupt Status Register
41 CRDA0, //!< Current Remote DMA Address 0
42 CRDA1, //!< Current Remote DMA Address 1
43 RSR = 0xC //!< Receive Status Register
46 enum eNe2k_Page0Write {
47 PSTART = 1, //!< page start (init only)
48 PSTOP, //!< page stop (init only)
49 TPSR = 4, //!< transmit page start address
50 TBCR0, //!< transmit byte count (low)
51 TBCR1, //!< transmit byte count (high)
52 RSAR0 = 8, //!< remote start address (lo)
53 RSAR1, //!< remote start address (hi)
54 RBCR0, //!< remote byte count (lo)
55 RBCR1, //!< remote byte count (hi)
56 RCR, //!< receive config register
57 TCR, //!< transmit config register
58 DCR, //!< data config register (init)
59 IMR //!< interrupt mask register (init)
63 typedef struct sNe2k_Card {
64 Uint16 IOBase; //!< IO Port Address from PCI
65 Uint8 IRQ; //!< IRQ Assigned from PCI
67 int NextMemPage; //!< Next Card Memory page to use
69 Uint8 Buffer[RX_BUF_SIZE];
77 int Ne2k_Install(char **Arguments);
78 char *Ne2k_ReadDir(tVFS_Node *Node, int Pos);
79 tVFS_Node *Ne2k_FindDir(tVFS_Node *Node, char *Name);
80 int Ne2k_IOCtl(tVFS_Node *Node, int ID, void *Data);
81 Uint64 Ne2k_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer);
82 Uint8 Ne2k_int_GetWritePage(tCard *Card, Uint16 Length);
83 void Ne2k_IRQHandler(int IntNum);
86 MODULE_DEFINE(0, VERSION, Ne2k, Ne2k_Install, NULL, NULL);
87 tDevFS_Driver gNe2k_DriverInfo = {
91 .ACLs = &gVFS_ACL_EveryoneRX,
92 .Flags = VFS_FFLAG_DIRECTORY,
93 .ReadDir = Ne2k_ReadDir,
94 .FindDir = Ne2k_FindDir
97 Uint16 gNe2k_BaseAddress;
98 int giNe2k_CardCount = 0;
99 tCard *gpNe2k_Cards = NULL;
103 * \fn int Ne2k_Install(char **Options)
104 * \brief Installs the NE2000 Driver
106 int Ne2k_Install(char **Options)
111 // --- Scan PCI Bus ---
113 giNe2k_CardCount = 0;
114 for( i = 0; i < NUM_COMPAT_DEVICES; i ++ )
116 giNe2k_CardCount += PCI_CountDevices( csaCOMPAT_DEVICES[i].Vendor, csaCOMPAT_DEVICES[i].Device, 0 );
121 gpNe2k_Cards = malloc( giNe2k_CardCount * sizeof(tCard) );
122 memsetd(gpNe2k_Cards, 0, giNe2k_CardCount * sizeof(tCard) / 4);
123 for( i = 0; i < NUM_COMPAT_DEVICES; i ++ )
125 count = PCI_CountDevices( csaCOMPAT_DEVICES[i].Vendor, csaCOMPAT_DEVICES[i].Device, 0 );
126 for( j = 0; j < count; j ++,k ++ )
128 id = PCI_GetDevice( csaCOMPAT_DEVICES[i].Vendor, csaCOMPAT_DEVICES[i].Device, 0, j );
130 base = PCI_AssignPort( id, 0, 0x20 );
131 gpNe2k_Cards[ k ].IOBase = base;
132 gpNe2k_Cards[ k ].IRQ = PCI_GetIRQ( id );
133 gpNe2k_Cards[ k ].NextMemPage = 64;
135 // Install IRQ Handler
136 IRQ_AddHandler(gpNe2k_Cards[ k ].IRQ, Ne2k_IRQHandler);
139 outb( base + 0x1F, inb(base + 0x1F) );
140 while( (inb( base+ISR ) & 0x80) == 0 );
141 outb( base + ISR, 0x80 );
144 outb( base + CMD, 0x21 ); // No DMA and Stop
145 outb( base + DCR, 0x49 ); // Set WORD mode
146 outb( base + IMR, 0x00 );
147 outb( base + ISR, 0xFF );
148 outb( base + RCR, 0x20 ); // Reciever to Monitor
149 outb( base + TCR, 0x02 ); // Transmitter OFF (TCR.LB = 1, Internal Loopback)
150 outb( base + RBCR0, 6*4 ); // Remote Byte Count
151 outb( base + RBCR1, 0 );
152 outb( base + RSAR0, 0 ); // Clear Source Address
153 outb( base + RSAR1, 0 );
154 outb( base + CMD, 0x0A ); // Remote Read, Start
157 gpNe2k_Cards[ k ].MacAddr[0] = inb(base+0x10); inb(base+0x10);
158 gpNe2k_Cards[ k ].MacAddr[1] = inb(base+0x10); inb(base+0x10);
159 gpNe2k_Cards[ k ].MacAddr[2] = inb(base+0x10); inb(base+0x10);
160 gpNe2k_Cards[ k ].MacAddr[3] = inb(base+0x10); inb(base+0x10);
161 gpNe2k_Cards[ k ].MacAddr[4] = inb(base+0x10); inb(base+0x10);
162 gpNe2k_Cards[ k ].MacAddr[5] = inb(base+0x10); inb(base+0x10);
164 outb( base+PSTART, RX_FIRST); // Set Receive Start
165 outb( base+BNRY, RX_LAST-1); // Set Boundary Page
166 outb( base+PSTOP, RX_LAST); // Set Stop Page
167 outb( base+ISR, 0xFF ); // Clear all ints
168 outb( base+CMD, 0x22 ); // No DMA, Start
169 outb( base+IMR, 0x3F ); // Set Interupt Mask
170 outb( base+RCR, 0x0F ); // Set WRAP and allow all packet matches
171 outb( base+TCR, 0x00 ); // Set Normal Transmitter mode
172 outb( base+TPSR, 0x40); // Set Transmit Start
175 Ne2k_WriteReg(base, MAC0, gpNe2k_Cards[ k ].MacAddr[0]);
176 Ne2k_WriteReg(base, MAC1, gpNe2k_Cards[ k ].MacAddr[1]);
177 Ne2k_WriteReg(base, MAC2, gpNe2k_Cards[ k ].MacAddr[2]);
178 Ne2k_WriteReg(base, MAC3, gpNe2k_Cards[ k ].MacAddr[3]);
179 Ne2k_WriteReg(base, MAC4, gpNe2k_Cards[ k ].MacAddr[4]);
180 Ne2k_WriteReg(base, MAC5, gpNe2k_Cards[ k ].MacAddr[5]);
183 Log("[NE2K]: Card #%i: IRQ=%i, IOBase=0x%x",
184 k, gpNe2k_Cards[ k ].IRQ, gpNe2k_Cards[ k ].IOBase);
185 Log("MAC Address %x:%x:%x:%x:%x:%x",
186 gpNe2k_Cards[ k ].MacAddr[0], gpNe2k_Cards[ k ].MacAddr[1],
187 gpNe2k_Cards[ k ].MacAddr[2], gpNe2k_Cards[ k ].MacAddr[3],
188 gpNe2k_Cards[ k ].MacAddr[4], gpNe2k_Cards[ k ].MacAddr[5]
192 gpNe2k_Cards[ k ].Name[0] = '0'+k;
193 gpNe2k_Cards[ k ].Name[1] = '\0';
194 gpNe2k_Cards[ k ].Node.ImplPtr = &gpNe2k_Cards[ k ];
195 gpNe2k_Cards[ k ].Node.NumACLs = 0; // Root Only
196 gpNe2k_Cards[ k ].Node.CTime = now();
197 gpNe2k_Cards[ k ].Node.Write = Ne2k_Write;
198 gpNe2k_Cards[ k ].Node.IOCtl = Ne2k_IOCtl;
202 gNe2k_DriverInfo.RootNode.Size = giNe2k_CardCount;
203 DevFS_AddDevice( &gNe2k_DriverInfo );
208 * \fn char *Ne2k_ReadDir(tVFS_Node *Node, int Pos)
210 char *Ne2k_ReadDir(tVFS_Node *Node, int Pos)
213 if(Pos < 0 || Pos >= giNe2k_CardCount) return NULL;
220 * \fn tVFS_Node *Ne2k_FindDir(tVFS_Node *Node, char *Name)
222 tVFS_Node *Ne2k_FindDir(tVFS_Node *Node, char *Name)
224 if(Name[0] == '\0' || Name[1] != '\0') return NULL;
226 return &gpNe2k_Cards[ Name[0]-'0' ].Node;
229 static const char *casIOCtls[] = { DRV_IOCTLNAMES, DRV_NETWORK_IOCTLNAMES, NULL };
231 * \fn int Ne2k_IOCtl(tVFS_Node *Node, int ID, void *Data)
232 * \brief IOCtl calls for a network device
234 int Ne2k_IOCtl(tVFS_Node *Node, int ID, void *Data)
238 case DRV_IOCTL_TYPE: return DRV_TYPE_NETWORK;
239 case DRV_IOCTL_IDENT:
240 if(!CheckMem(Data, 4)) return -1;
241 memcpy(Data, "NE2K", 4);
243 case DRV_IOCTL_VERSION: return VERSION;
244 case DRV_IOCTL_LOOKUP:
245 if(!CheckString(Data)) return -1;
246 return LookupString( casIOCtls, Data );
249 // If this is the root, return
250 if( Node == &gNe2k_DriverInfo.Node ) return 0;
252 // Device specific settings
255 case NET_IOCTL_GETMAC:
256 if(!CheckMem(Data, 6)) return -1;
257 memcpy( Data, ((tCard*)Node->ImplPtr)->MacAddr, 6 );
264 * \fn Uint64 Ne2k_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
265 * \brief Send a packet from the network card
267 Uint64 Ne2k_Write(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
269 tCard *Card = (tCard*)Node->ImplPtr;
270 Uint16 *buf = Buffer;
273 ENTER("pNode XOffset XLength pBuffer", Node, Offset, Length, Buffer);
275 // Sanity Check Length
276 if(Length > TX_BUF_SIZE) {
281 // Make sure that the card is in page 0
282 outb(Card->IOBase + CMD, 0|0x22); // Page 0, Start, NoDMA
284 // Clear Remote DMA Flag
285 outb(Card->IOBase + ISR, 0x40); // Bit 6
287 // Send Size - Remote Byte Count Register
288 outb(Card->IOBase + TBCR0, Length & 0xFF);
289 outb(Card->IOBase + TBCR1, Length >> 8);
291 // Send Size - Remote Byte Count Register
292 outb(Card->IOBase + RBCR0, Length & 0xFF);
293 outb(Card->IOBase + RBCR1, Length >> 8);
296 outb(Card->IOBase + RSAR0, 0x00); // Page Offset
297 outb(Card->IOBase + RSAR1, Ne2k_int_GetWritePage(Card, Length)); // Page Offset
299 //outb(Card->IOBase + CMD, 0|0x18|0x4|0x2); // Page 0, Transmit Packet, TXP, Start
300 outb(Card->IOBase + CMD, 0|0x10|0x2); // Page 0, Remote Write, Start
303 for(rem = Length; rem; rem -= 2)
304 outw(Card->IOBase + 0x10, *buf++);
306 while( inb(Card->IOBase + ISR) == 0) // Wait for Remote DMA Complete
309 outb( Card->IOBase + ISR, 0x40 ); // ACK Interrupt
312 outb(Card->IOBase + CMD, 0|0x10|0x4|0x2);
315 //outb(Card->IOBase + CMD, 0|0x20);
322 * \fn Uint8 Ne2k_int_GetWritePage(tCard *Card, Uint16 Length)
324 Uint8 Ne2k_int_GetWritePage(tCard *Card, Uint16 Length)
326 Uint8 ret = Card->NextMemPage;
328 Card->NextMemPage += (Length + 0xFF) >> 8;
329 if(Card->NextMemPage >= TX_LAST) {
330 Card->NextMemPage -= TX_BUF_SIZE;
337 * \fn void Ne2k_IRQHandler(int IntNum)
339 void Ne2k_IRQHandler(int IntNum)
342 for( i = 0; i < giNe2k_CardCount; i++ )
344 if(gpNe2k_Cards[i].IRQ == IntNum) {
345 LOG("Clearing interrupts on card %i (0x%x)\n", i, inb( gpNe2k_Cards[i].IOBase + ISR ));
346 outb( gpNe2k_Cards[i].IOBase + ISR, 0xFF ); // Reset All
350 Warning("[NE2K ] Recieved Unknown IRQ %i", IntNum);