2 * Acess2 IDE Harddisk Driver
11 #include <tpl_drv_common.h>
12 #include <tpl_drv_disk.h>
21 } __attribute__ ((packed)) tPRDT_Ent;
25 Uint16 Usused1[9]; // 10
26 char SerialNum[20]; // 20
27 Uint16 Usused2[3]; // 23
28 char FirmwareVer[8]; // 27
29 char ModelNumber[40]; // 47
30 Uint16 SectPerInt; // 48 - AND with 0xFF to get true value;
32 Uint16 Capabilities[2]; // 51
33 Uint16 Unused4[2]; // 53
34 Uint16 ValidExtData; // 54
35 Uint16 Unused5[5]; // 59
36 Uint16 SizeOfRWMultiple; // 60
37 Uint32 Sectors28; // 62
38 Uint16 Unused6[100-62];
40 Uint16 Unused7[256-104];
41 } __attribute__ ((packed)) tIdentify;
44 extern void ATA_ParseMBR(int Disk, tMBR *MBR);
49 void ATA_SetupPartitions();
51 int ATA_ScanDisk(int Disk);
52 void ATA_ParseGPT(int Disk);
53 void ATA_int_MakePartition(tATA_Partition *Part, int Disk, int Num, Uint64 Start, Uint64 Length);
54 Uint16 ATA_GetBasePort(int Disk);
55 // Filesystem Interface
56 char *ATA_ReadDir(tVFS_Node *Node, int Pos);
57 tVFS_Node *ATA_FindDir(tVFS_Node *Node, char *Name);
58 Uint64 ATA_ReadFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer);
59 Uint64 ATA_WriteFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer);
60 int ATA_IOCtl(tVFS_Node *Node, int Id, void *Data);
61 // Read/Write Interface/Quantiser
62 Uint ATA_ReadRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk);
63 Uint ATA_WriteRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk);
65 int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer);
66 int ATA_WriteDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer);
68 void ATA_IRQHandlerPri(int unused);
69 void ATA_IRQHandlerSec(int unused);
71 Uint8 ATA_int_BusMasterReadByte(int Ofs);
72 void ATA_int_BusMasterWriteByte(int Ofs, Uint8 Value);
73 void ATA_int_BusMasterWriteDWord(int Ofs, Uint32 Value);
76 MODULE_DEFINE(0, 0x0032, i386ATA, ATA_Install, NULL, "PCI", NULL);
77 tDevFS_Driver gATA_DriverInfo = {
82 .Flags = VFS_FFLAG_DIRECTORY,
83 .ACLs = &gVFS_ACL_EveryoneRX,
84 .ReadDir = ATA_ReadDir,
85 .FindDir = ATA_FindDir
88 tATA_Disk gATA_Disks[MAX_ATA_DISKS];
90 tVFS_Node **gATA_Nodes;
91 Uint16 gATA_BusMasterBase = 0;
92 Uint8 *gATA_BusMasterBasePtr = 0;
95 int giaATA_ControllerLock[2] = {0}; //!< Spinlocks for each controller
96 Uint8 gATA_Buffers[2][(MAX_DMA_SECTORS+0xFFF)&~0xFFF] __attribute__ ((section(".padata")));
97 volatile int gaATA_IRQs[2] = {0};
98 tPRDT_Ent gATA_PRDTs[2] = {
99 {0, 512, IDE_PRDT_LAST},
100 {0, 512, IDE_PRDT_LAST}
105 * \fn int ATA_Install()
114 ATA_SetupPartitions();
118 if( DevFS_AddDevice( &gATA_DriverInfo ) == 0 )
119 return MODULE_ERR_MISC;
121 return MODULE_ERR_OK;
125 * \fn int ATA_SetupIO()
126 * \brief Sets up the ATA controller's DMA mode
135 // Get IDE Controller's PCI Entry
136 ent = PCI_GetDeviceByClass(0x0101, 0xFFFF, -1);
137 LOG("ent = %i", ent);
138 gATA_BusMasterBase = PCI_GetBAR4( ent );
139 if( gATA_BusMasterBase == 0 ) {
140 Log_Warning("ATA", "It seems that there is no Bus Master Controller on this machine. Get one");
141 // TODO: Use PIO mode instead
142 LEAVE('i', MODULE_ERR_NOTNEEDED);
143 return MODULE_ERR_NOTNEEDED;
147 if( !(gATA_BusMasterBase & 1) )
149 if( gATA_BusMasterBase < 0x100000 )
150 gATA_BusMasterBasePtr = (void*)(KERNEL_BASE | (tVAddr)gATA_BusMasterBase);
152 gATA_BusMasterBasePtr = (void*)( MM_MapHWPages( gATA_BusMasterBase, 1 ) + (gATA_BusMasterBase&0xFFF) );
153 LOG("gATA_BusMasterBasePtr = %p", gATA_BusMasterBasePtr);
156 // Bit 0 is left set as a flag to other functions
157 LOG("gATA_BusMasterBase = 0x%x", gATA_BusMasterBase & ~1);
160 // Register IRQs and get Buffers
161 IRQ_AddHandler( gATA_IRQPri, ATA_IRQHandlerPri );
162 IRQ_AddHandler( gATA_IRQSec, ATA_IRQHandlerSec );
164 gATA_PRDTs[0].PBufAddr = MM_GetPhysAddr( (tVAddr)&gATA_Buffers[0] );
165 gATA_PRDTs[1].PBufAddr = MM_GetPhysAddr( (tVAddr)&gATA_Buffers[1] );
167 LOG("gATA_PRDTs = {PBufAddr: 0x%x, PBufAddr: 0x%x}", gATA_PRDTs[0].PBufAddr, gATA_PRDTs[1].PBufAddr);
169 addr = MM_GetPhysAddr( (tVAddr)&gATA_PRDTs[0] );
170 LOG("addr = 0x%x", addr);
171 ATA_int_BusMasterWriteDWord(4, addr);
172 addr = MM_GetPhysAddr( (tVAddr)&gATA_PRDTs[1] );
173 LOG("addr = 0x%x", addr);
174 ATA_int_BusMasterWriteDWord(12, addr);
176 // Enable controllers
177 outb(IDE_PRI_BASE+1, 1);
178 outb(IDE_SEC_BASE+1, 1);
181 LEAVE('i', MODULE_ERR_OK);
182 return MODULE_ERR_OK;
186 * \fn void ATA_SetupPartitions()
188 void ATA_SetupPartitions()
191 for( i = 0; i < MAX_ATA_DISKS; i ++ )
193 if( !ATA_ScanDisk(i) ) {
194 gATA_Disks[i].Name[0] = '\0'; // Mark as unused
201 * \fn void ATA_SetupVFS()
202 * \brief Sets up the ATA drivers VFS information and registers with DevFS
208 // Count number of nodes needed
210 for( i = 0; i < MAX_ATA_DISKS; i++ )
212 if(gATA_Disks[i].Name[0] == '\0') continue; // Ignore
214 giATA_NumNodes += gATA_Disks[i].NumPartitions;
217 // Allocate Node space
218 gATA_Nodes = malloc( giATA_NumNodes * sizeof(void*) );
222 for( i = 0; i < MAX_ATA_DISKS; i++ )
224 if(gATA_Disks[i].Name[0] == '\0') continue; // Ignore
225 gATA_Nodes[ k++ ] = &gATA_Disks[i].Node;
226 for( j = 0; j < gATA_Disks[i].NumPartitions; j ++ )
227 gATA_Nodes[ k++ ] = &gATA_Disks[i].Partitions[j].Node;
230 gATA_DriverInfo.RootNode.Size = giATA_NumNodes;
234 * \fn int ATA_ScanDisk(int Disk)
236 int ATA_ScanDisk(int Disk)
248 ENTER("iDisk", Disk);
250 base = ATA_GetBasePort( Disk );
252 LOG("base = 0x%x", base);
254 if( 0xFF == inb(base+7) ) {
260 // Send Disk Selector
261 if(Disk == 1 || Disk == 3)
268 val = inb(base+7); // Read status
271 return 0; // Disk does not exist
274 // Poll until BSY clears and DRQ sets or ERR is set
275 while( ((val & 0x80) || !(val & 0x08)) && !(val & 1)) val = inb(base+7);
279 return 0; // Error occured, so return false
283 for(i=0;i<256;i++) data.buf[i] = inw(base);
285 // Populate Disk Structure
286 if(data.identify.Sectors48 != 0)
287 gATA_Disks[ Disk ].Sectors = data.identify.Sectors48;
289 gATA_Disks[ Disk ].Sectors = data.identify.Sectors28;
292 LOG("gATA_Disks[ %i ].Sectors = 0x%x", Disk, gATA_Disks[ Disk ].Sectors);
295 Uint64 val = gATA_Disks[ Disk ].Sectors / 2;
301 else if( val > 4*1024 ) {
305 else if( val > 4*1024 ) {
309 Log_Log("ATA", "Disk %i: 0x%llx Sectors (%i %s)", Disk,
310 gATA_Disks[ Disk ].Sectors, val, units);
314 gATA_Disks[ Disk ].Name[0] = 'A'+Disk;
315 gATA_Disks[ Disk ].Name[1] = '\0';
317 // Get pointer to vfs node and populate it
318 node = &gATA_Disks[ Disk ].Node;
319 node->Size = gATA_Disks[Disk].Sectors * SECTOR_SIZE;
320 node->NumACLs = 0; // Means Superuser only can access it
321 node->Inode = (Disk << 8) | 0xFF;
322 node->ImplPtr = gATA_Disks[ Disk ].Name;
324 node->ATime = node->MTime
325 = node->CTime = now();
327 node->Read = ATA_ReadFS;
328 node->Write = ATA_WriteFS;
329 node->IOCtl = ATA_IOCtl;
331 // --- Scan Partitions ---
334 ATA_ReadDMA( Disk, 0, 1, &data.mbr );
336 // Check for a GPT table
337 if(data.mbr.Parts[0].SystemID == 0xEE)
339 else // No? Just parse the MBR
340 ATA_ParseMBR(Disk, &data.mbr);
342 ATA_ReadDMA( Disk, 1, 1, &data );
343 Debug_HexDump("ATA_ScanDisk", &data, 512);
350 * \fn void ATA_int_MakePartition(tATA_Partition *Part, int Disk, int Num, Uint64 Start, Uint64 Length)
351 * \brief Fills a parition's information structure
353 void ATA_int_MakePartition(tATA_Partition *Part, int Disk, int Num, Uint64 Start, Uint64 Length)
355 ENTER("pPart iDisk iNum XStart XLength", Part, Disk, Num, Start, Length);
357 Part->Length = Length;
358 Part->Name[0] = 'A'+Disk;
360 Part->Name[1] = '1'+Num/10;
361 Part->Name[2] = '1'+Num%10;
362 Part->Name[3] = '\0';
364 Part->Name[1] = '1'+Num;
365 Part->Name[2] = '\0';
367 Part->Node.NumACLs = 0; // Only root can read/write raw block devices
368 Part->Node.Inode = (Disk << 8) | Num;
369 Part->Node.ImplPtr = Part->Name;
371 Part->Node.Read = ATA_ReadFS;
372 Part->Node.Write = ATA_WriteFS;
373 Part->Node.IOCtl = ATA_IOCtl;
374 Log_Notice("ATA", "Note '%s' at 0x%llx, 0x%llx long", Part->Name, Part->Start, Part->Length);
375 LOG("Made '%s' (&Node=%p)", Part->Name, &Part->Node);
380 * \fn void ATA_ParseGPT(int Disk)
381 * \brief Parses the GUID Partition Table
383 void ATA_ParseGPT(int Disk)
385 ///\todo Support GPT Disks
386 Warning("GPT Disks are currently unsupported");
390 * \fn Uint16 ATA_GetPortBase(int Disk)
391 * \brief Returns the base port for a given disk
393 Uint16 ATA_GetBasePort(int Disk)
397 case 0: case 1: return IDE_PRI_BASE;
398 case 2: case 3: return IDE_SEC_BASE;
404 * \fn char *ATA_ReadDir(tVFS_Node *Node, int Pos)
406 char *ATA_ReadDir(tVFS_Node *Node, int Pos)
408 if(Pos >= giATA_NumNodes || Pos < 0) return NULL;
409 return strdup( gATA_Nodes[Pos]->ImplPtr );
413 * \fn tVFS_Node *ATA_FindDir(tVFS_Node *Node, char *Name)
415 tVFS_Node *ATA_FindDir(tVFS_Node *Node, char *Name)
420 // Check first character
421 if(Name[0] < 'A' || Name[0] > 'A'+MAX_ATA_DISKS)
423 disk = &gATA_Disks[Name[0]-'A'];
425 if(Name[1] == '\0') {
426 if( disk->Sectors == 0 && disk->Name[0] == '\0')
432 if(Name[1] < '0' || '9' < Name[1]) return NULL;
433 if(Name[2] == '\0') { // <= 9
434 part = Name[1] - '0';
436 return &disk->Partitions[part].Node;
439 if('0' > Name[2] || '9' < Name[2]) return NULL;
440 if(Name[3] != '\0') return NULL;
442 part = (Name[1] - '0') * 10;
443 part += Name[2] - '0';
445 return &disk->Partitions[part].Node;
450 * \fn Uint64 ATA_ReadFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
452 Uint64 ATA_ReadFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
454 int disk = Node->Inode >> 8;
455 int part = Node->Inode & 0xFF;
457 ENTER("pNode XOffset XLength pBuffer", Node, Offset, Length, Buffer);
462 if( Offset >= gATA_Disks[disk].Sectors * SECTOR_SIZE ) {
466 if( Offset + Length > gATA_Disks[disk].Sectors*SECTOR_SIZE )
467 Length = gATA_Disks[disk].Sectors*SECTOR_SIZE - Offset;
472 if( Offset >= gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE ) {
476 if( Offset + Length > gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE )
477 Length = gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE - Offset;
478 Offset += gATA_Disks[disk].Partitions[part].Start * SECTOR_SIZE;
482 int ret = DrvUtil_ReadBlock(Offset, Length, Buffer, ATA_ReadRaw, SECTOR_SIZE, disk);
483 Debug_HexDump("ATA_ReadFS", Buffer, Length);
490 * \fn Uint64 ATA_WriteFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
492 Uint64 ATA_WriteFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
494 int disk = Node->Inode >> 8;
495 int part = Node->Inode & 0xFF;
500 if( Offset >= gATA_Disks[disk].Sectors * SECTOR_SIZE )
502 if( Offset + Length > gATA_Disks[disk].Sectors*SECTOR_SIZE )
503 Length = gATA_Disks[disk].Sectors*SECTOR_SIZE - Offset;
508 if( Offset >= gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE )
510 if( Offset + Length > gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE )
511 Length = gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE - Offset;
512 Offset += gATA_Disks[disk].Partitions[part].Start * SECTOR_SIZE;
515 Log("ATA_WriteFS: (Node=%p, Offset=0x%llx, Length=0x%llx, Buffer=%p)", Node, Offset, Length, Buffer);
516 Debug_HexDump("ATA_WriteFS", Buffer, Length);
517 return DrvUtil_WriteBlock(Offset, Length, Buffer, ATA_ReadRaw, ATA_WriteRaw, SECTOR_SIZE, disk);
521 * \fn int ATA_IOCtl(tVFS_Node *Node, int Id, void *Data)
522 * \brief IO Control Funtion
524 int ATA_IOCtl(tVFS_Node *Node, int Id, void *Data)
528 case DRV_IOCTL_TYPE: return DRV_TYPE_DISK;
533 // --- Disk Access ---
535 * \fn Uint ATA_ReadRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk)
537 Uint ATA_ReadRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk)
543 // Pass straight on to ATA_ReadDMAPage if we can
544 if(Count <= MAX_DMA_SECTORS)
546 ret = ATA_ReadDMA(Disk, Address, Count, Buffer);
547 if(ret == 0) return 0;
551 // Else we will have to break up the transfer
553 while(Count > MAX_DMA_SECTORS)
555 ret = ATA_ReadDMA(Disk, Address+offset, MAX_DMA_SECTORS, Buffer+offset);
557 if(ret != 1) return done;
559 done += MAX_DMA_SECTORS;
560 Count -= MAX_DMA_SECTORS;
561 offset += MAX_DMA_SECTORS*SECTOR_SIZE;
564 ret = ATA_ReadDMA(Disk, Address+offset, Count, Buffer+offset);
565 if(ret != 1) return 0;
570 * \fn Uint ATA_WriteRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk)
572 Uint ATA_WriteRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk)
578 // Pass straight on to ATA_WriteDMA, if we can
579 if(Count <= MAX_DMA_SECTORS)
581 ret = ATA_WriteDMA(Disk, Address, Count, Buffer);
582 if(ret == 0) return 0;
586 // Else we will have to break up the transfer
588 while(Count > MAX_DMA_SECTORS)
590 ret = ATA_WriteDMA(Disk, Address+offset, MAX_DMA_SECTORS, Buffer+offset);
592 if(ret != 1) return done;
594 done += MAX_DMA_SECTORS;
595 Count -= MAX_DMA_SECTORS;
596 offset += MAX_DMA_SECTORS*SECTOR_SIZE;
599 ret = ATA_WriteDMA(Disk, Address+offset, Count, Buffer+offset);
600 if(ret != 1) return 0;
605 * \fn int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
607 int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
609 int cont = (Disk>>1)&1; // Controller ID
614 ENTER("iDisk XAddress iCount pBuffer", Disk, Address, Count, Buffer);
616 // Check if the count is small enough
617 if(Count > MAX_DMA_SECTORS) {
618 Warning("Passed too many sectors for a bulk DMA read (%i > %i)",
619 Count, MAX_DMA_SECTORS);
624 // Get exclusive access to the disk controller
625 LOCK( &giaATA_ControllerLock[ cont ] );
628 gATA_PRDTs[ cont ].Bytes = Count * SECTOR_SIZE;
631 base = ATA_GetBasePort(Disk);
634 gaATA_IRQs[cont] = 0;
637 outb(base+0x01, 0x00);
638 if( Address > 0x0FFFFFFF ) // Use LBA48
640 outb(base+0x6, 0x40 | (disk << 4));
641 outb(base+0x2, 0 >> 8); // Upper Sector Count
642 outb(base+0x3, Address >> 24); // Low 2 Addr
643 outb(base+0x4, Address >> 28); // Mid 2 Addr
644 outb(base+0x5, Address >> 32); // High 2 Addr
648 outb(base+0x06, 0xE0 | (disk << 4) | ((Address >> 24) & 0x0F)); // Magic, Disk, High addr
651 outb(base+0x02, (Uint8) Count); // Sector Count
652 outb(base+0x03, (Uint8) Address); // Low Addr
653 outb(base+0x04, (Uint8) (Address >> 8)); // Middle Addr
654 outb(base+0x05, (Uint8) (Address >> 16)); // High Addr
656 LOG("Starting Transfer");
657 if( Address > 0x0FFFFFFF )
658 outb(base+0x07, HDD_DMA_R48); // Read Command (LBA48)
660 outb(base+0x07, HDD_DMA_R28); // Read Command (LBA28)
662 ATA_int_BusMasterWriteByte( cont << 3, 9 ); // Read and start
664 // Wait for transfer to complete
666 while( gaATA_IRQs[cont] == 0 && !(val & 0x4) ) {
667 val = ATA_int_BusMasterReadByte( (cont << 3) + 2 );
668 //LOG("val = 0x%02x", val);
673 ATA_int_BusMasterWriteByte( cont << 3, 8 ); // Read and stop
676 LOG("Status byte = 0x%02x", val);
678 LOG("Transfer Completed & Acknowledged");
680 // Copy to destination buffer
681 memcpy( Buffer, gATA_Buffers[cont], Count*SECTOR_SIZE );
683 // Release controller lock
684 RELEASE( &giaATA_ControllerLock[ cont ] );
691 * \fn int ATA_WriteDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
693 int ATA_WriteDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
695 int cont = (Disk>>1)&1; // Controller ID
699 // Check if the count is small enough
700 if(Count > MAX_DMA_SECTORS) return 0;
702 // Get exclusive access to the disk controller
703 LOCK( &giaATA_ControllerLock[ cont ] );
706 gATA_PRDTs[ cont ].Bytes = Count * SECTOR_SIZE;
709 base = ATA_GetBasePort(Disk);
712 outb(base+0x01, 0x00);
713 if( Address > 0x0FFFFFFF ) // Use LBA48
715 outb(base+0x6, 0x40 | (disk << 4));
716 outb(base+0x2, 0 >> 8); // Upper Sector Count
717 outb(base+0x3, Address >> 24); // Low 2 Addr
718 outb(base+0x3, Address >> 28); // Mid 2 Addr
719 outb(base+0x3, Address >> 32); // High 2 Addr
723 outb(base+0x06, 0xE0 | (disk << 4) | ((Address >> 24) & 0x0F)); //Disk,Magic,High addr
726 outb(base+0x02, (Uint8) Count); // Sector Count
727 outb(base+0x03, (Uint8) Address); // Low Addr
728 outb(base+0x04, (Uint8) (Address >> 8)); // Middle Addr
729 outb(base+0x05, (Uint8) (Address >> 16)); // High Addr
730 if( Address > 0x0FFFFFFF )
731 outb(base+0x07, HDD_DMA_W48); // Write Command (LBA48)
733 outb(base+0x07, HDD_DMA_W28); // Write Command (LBA28)
736 gaATA_IRQs[cont] = 0;
738 // Copy to output buffer
739 memcpy( gATA_Buffers[cont], Buffer, Count*SECTOR_SIZE );
742 ATA_int_BusMasterWriteByte( cont << 3, 1 ); // Write and start
744 // Wait for transfer to complete
745 while( gaATA_IRQs[cont] == 0 ) Threads_Yield();
748 ATA_int_BusMasterWriteByte( cont << 3, 0 ); // Write and stop
750 // Release controller lock
751 RELEASE( &giaATA_ControllerLock[ cont ] );
757 * \fn void ATA_IRQHandlerPri(int unused)
759 void ATA_IRQHandlerPri(int unused)
763 // IRQ bit set for Primary Controller
764 val = ATA_int_BusMasterReadByte( 0x2 );
765 LOG("IRQ val = 0x%x", val);
767 LOG("IRQ hit (val = 0x%x)", val);
768 ATA_int_BusMasterWriteByte( 0x2, 4 );
775 * \fn void ATA_IRQHandlerSec(int unused)
777 void ATA_IRQHandlerSec(int unused)
780 // IRQ bit set for Secondary Controller
781 val = ATA_int_BusMasterReadByte( 0xA );
782 LOG("IRQ val = 0x%x", val);
784 LOG("IRQ hit (val = 0x%x)", val);
785 ATA_int_BusMasterWriteByte( 0xA, 4 );
792 * \fn Uint8 ATA_int_BusMasterReadByte(int Ofs)
794 Uint8 ATA_int_BusMasterReadByte(int Ofs)
796 if( gATA_BusMasterBase & 1 )
797 return inb( (gATA_BusMasterBase & ~1) + Ofs );
799 return *(Uint8*)(gATA_BusMasterBasePtr + Ofs);
803 * \fn void ATA_int_BusMasterWriteByte(int Ofs, Uint8 Value)
804 * \brief Writes a byte to a Bus Master Register
806 void ATA_int_BusMasterWriteByte(int Ofs, Uint8 Value)
808 if( gATA_BusMasterBase & 1 )
809 outb( (gATA_BusMasterBase & ~1) + Ofs, Value );
811 *(Uint8*)(gATA_BusMasterBasePtr + Ofs) = Value;
815 * \fn void ATA_int_BusMasterWriteDWord(int Ofs, Uint32 Value)
816 * \brief Writes a dword to a Bus Master Register
818 void ATA_int_BusMasterWriteDWord(int Ofs, Uint32 Value)
821 if( gATA_BusMasterBase & 1 )
822 outd( (gATA_BusMasterBase & ~1) + Ofs, Value );
824 *(Uint32*)(gATA_BusMasterBasePtr + Ofs) = Value;