2 * Acess2 IDE Harddisk Driver
11 #include <tpl_drv_common.h>
12 #include <tpl_drv_disk.h>
21 } __attribute__ ((packed)) tPRDT_Ent;
25 Uint16 Usused1[9]; // 10
26 char SerialNum[20]; // 20
27 Uint16 Usused2[3]; // 23
28 char FirmwareVer[8]; // 27
29 char ModelNumber[40]; // 47
30 Uint16 SectPerInt; // 48 - AND with 0xFF to get true value;
32 Uint16 Capabilities[2]; // 51
33 Uint16 Unused4[2]; // 53
34 Uint16 ValidExtData; // 54
35 Uint16 Unused5[5]; // 59
36 Uint16 SizeOfRWMultiple; // 60
37 Uint32 Sectors28; // 62
38 Uint16 Unused6[100-62];
40 Uint16 Unused7[256-104];
41 } __attribute__ ((packed)) tIdentify;
44 extern void ATA_ParseMBR(int Disk, tMBR *MBR);
49 void ATA_SetupPartitions();
51 int ATA_ScanDisk(int Disk);
52 void ATA_ParseGPT(int Disk);
53 void ATA_int_MakePartition(tATA_Partition *Part, int Disk, int Num, Uint64 Start, Uint64 Length);
54 Uint16 ATA_GetBasePort(int Disk);
55 // Filesystem Interface
56 char *ATA_ReadDir(tVFS_Node *Node, int Pos);
57 tVFS_Node *ATA_FindDir(tVFS_Node *Node, char *Name);
58 Uint64 ATA_ReadFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer);
59 Uint64 ATA_WriteFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer);
60 int ATA_IOCtl(tVFS_Node *Node, int Id, void *Data);
61 // Read/Write Interface/Quantiser
62 Uint ATA_ReadRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk);
63 Uint ATA_WriteRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk);
65 int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer);
66 int ATA_WriteDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer);
68 void ATA_IRQHandlerPri(int unused);
69 void ATA_IRQHandlerSec(int unused);
71 Uint8 ATA_int_BusMasterReadByte(int Ofs);
72 void ATA_int_BusMasterWriteByte(int Ofs, Uint8 Value);
73 void ATA_int_BusMasterWriteDWord(int Ofs, Uint32 Value);
76 MODULE_DEFINE(0, 0x0032, i386ATA, ATA_Install, NULL, "PCI", NULL);
77 tDevFS_Driver gATA_DriverInfo = {
82 .Flags = VFS_FFLAG_DIRECTORY,
83 .ACLs = &gVFS_ACL_EveryoneRX,
84 .ReadDir = ATA_ReadDir,
85 .FindDir = ATA_FindDir
88 tATA_Disk gATA_Disks[MAX_ATA_DISKS];
90 tVFS_Node **gATA_Nodes;
91 Uint16 gATA_BusMasterBase = 0;
92 Uint8 *gATA_BusMasterBasePtr = 0;
95 int giaATA_ControllerLock[2] = {0}; //!< Spinlocks for each controller
96 Uint8 gATA_Buffers[2][(MAX_DMA_SECTORS+0xFFF)&~0xFFF] __attribute__ ((section(".padata")));
97 volatile int gaATA_IRQs[2] = {0};
98 tPRDT_Ent gATA_PRDTs[2] = {
99 {0, 512, IDE_PRDT_LAST},
100 {0, 512, IDE_PRDT_LAST}
105 * \fn int ATA_Install()
114 ATA_SetupPartitions();
118 if( DevFS_AddDevice( &gATA_DriverInfo ) == 0 )
119 return MODULE_ERR_MISC;
121 return MODULE_ERR_OK;
125 * \fn int ATA_SetupIO()
126 * \brief Sets up the ATA controller's DMA mode
135 // Get IDE Controller's PCI Entry
136 ent = PCI_GetDeviceByClass(0x0101, 0xFFFF, -1);
137 LOG("ent = %i", ent);
138 gATA_BusMasterBase = PCI_GetBAR4( ent );
139 if( gATA_BusMasterBase == 0 ) {
140 Log_Warning("ATA", "It seems that there is no Bus Master Controller on this machine. Get one");
141 // TODO: Use PIO mode instead
142 LEAVE('i', MODULE_ERR_NOTNEEDED);
143 return MODULE_ERR_NOTNEEDED;
147 if( !(gATA_BusMasterBase & 1) )
149 if( gATA_BusMasterBase < 0x100000 )
150 gATA_BusMasterBasePtr = (void*)(KERNEL_BASE | (tVAddr)gATA_BusMasterBase);
152 gATA_BusMasterBasePtr = (void*)( MM_MapHWPages( gATA_BusMasterBase, 1 ) + (gATA_BusMasterBase&0xFFF) );
153 LOG("gATA_BusMasterBasePtr = %p", gATA_BusMasterBasePtr);
156 // Bit 0 is left set as a flag to other functions
157 LOG("gATA_BusMasterBase = 0x%x", gATA_BusMasterBase & ~1);
160 // Register IRQs and get Buffers
161 IRQ_AddHandler( gATA_IRQPri, ATA_IRQHandlerPri );
162 IRQ_AddHandler( gATA_IRQSec, ATA_IRQHandlerSec );
164 gATA_PRDTs[0].PBufAddr = MM_GetPhysAddr( (tVAddr)&gATA_Buffers[0] );
165 gATA_PRDTs[1].PBufAddr = MM_GetPhysAddr( (tVAddr)&gATA_Buffers[1] );
167 LOG("gATA_PRDTs = {PBufAddr: 0x%x, PBufAddr: 0x%x}", gATA_PRDTs[0].PBufAddr, gATA_PRDTs[1].PBufAddr);
169 addr = MM_GetPhysAddr( (tVAddr)&gATA_PRDTs[0] );
170 LOG("addr = 0x%x", addr);
171 ATA_int_BusMasterWriteDWord(4, addr);
172 addr = MM_GetPhysAddr( (tVAddr)&gATA_PRDTs[1] );
173 LOG("addr = 0x%x", addr);
174 ATA_int_BusMasterWriteDWord(12, addr);
176 // Enable controllers
177 outb(IDE_PRI_BASE+1, 1);
178 outb(IDE_SEC_BASE+1, 1);
181 LEAVE('i', MODULE_ERR_OK);
182 return MODULE_ERR_OK;
186 * \fn void ATA_SetupPartitions()
188 void ATA_SetupPartitions()
191 for( i = 0; i < MAX_ATA_DISKS; i ++ )
193 if( !ATA_ScanDisk(i) ) {
194 gATA_Disks[i].Name[0] = '\0'; // Mark as unused
201 * \fn void ATA_SetupVFS()
202 * \brief Sets up the ATA drivers VFS information and registers with DevFS
208 // Count number of nodes needed
210 for( i = 0; i < MAX_ATA_DISKS; i++ )
212 if(gATA_Disks[i].Name[0] == '\0') continue; // Ignore
214 giATA_NumNodes += gATA_Disks[i].NumPartitions;
217 // Allocate Node space
218 gATA_Nodes = malloc( giATA_NumNodes * sizeof(void*) );
222 for( i = 0; i < MAX_ATA_DISKS; i++ )
224 if(gATA_Disks[i].Name[0] == '\0') continue; // Ignore
225 gATA_Nodes[ k++ ] = &gATA_Disks[i].Node;
226 for( j = 0; j < gATA_Disks[i].NumPartitions; j ++ )
227 gATA_Nodes[ k++ ] = &gATA_Disks[i].Partitions[j].Node;
230 gATA_DriverInfo.RootNode.Size = giATA_NumNodes;
234 * \fn int ATA_ScanDisk(int Disk)
236 int ATA_ScanDisk(int Disk)
248 ENTER("iDisk", Disk);
250 base = ATA_GetBasePort( Disk );
252 LOG("base = 0x%x", base);
254 // Send Disk Selector
255 if(Disk == 1 || Disk == 3)
262 val = inb(base+7); // Read status
265 return 0; // Disk does not exist
268 // Poll until BSY clears and DRQ sets or ERR is set
269 while( ((val & 0x80) || !(val & 0x08)) && !(val & 1)) val = inb(base+7);
273 return 0; // Error occured, so return false
277 for(i=0;i<256;i++) data.buf[i] = inw(base);
279 // Populate Disk Structure
280 if(data.identify.Sectors48 != 0)
281 gATA_Disks[ Disk ].Sectors = data.identify.Sectors48;
283 gATA_Disks[ Disk ].Sectors = data.identify.Sectors28;
286 LOG("gATA_Disks[ Disk ].Sectors = 0x%x", gATA_Disks[ Disk ].Sectors);
289 Uint64 val = gATA_Disks[ Disk ].Sectors / 2;
295 else if( val > 4*1024 ) {
299 else if( val > 4*1024 ) {
303 Log_Log("ATA", "Disk %i: 0x%llx Sectors (%i %s)", Disk,
304 gATA_Disks[ Disk ].Sectors, val, units);
308 gATA_Disks[ Disk ].Name[0] = 'A'+Disk;
309 gATA_Disks[ Disk ].Name[1] = '\0';
311 // Get pointer to vfs node and populate it
312 node = &gATA_Disks[ Disk ].Node;
313 node->Size = gATA_Disks[Disk].Sectors * SECTOR_SIZE;
314 node->NumACLs = 0; // Means Superuser only can access it
315 node->Inode = (Disk << 8) | 0xFF;
316 node->ImplPtr = gATA_Disks[ Disk ].Name;
318 node->ATime = node->MTime
319 = node->CTime = now();
321 node->Read = ATA_ReadFS;
322 node->Write = ATA_WriteFS;
323 node->IOCtl = ATA_IOCtl;
325 // --- Scan Partitions ---
328 ATA_ReadDMA( Disk, 0, 1, &data.mbr );
330 // Check for a GPT table
331 if(data.mbr.Parts[0].SystemID == 0xEE)
333 else // No? Just parse the MBR
334 ATA_ParseMBR(Disk, &data.mbr);
336 ATA_ReadDMA( Disk, 1, 1, &data );
337 Debug_HexDump("ATA_ScanDisk", &data, 512);
344 * \fn void ATA_int_MakePartition(tATA_Partition *Part, int Disk, int Num, Uint64 Start, Uint64 Length)
345 * \brief Fills a parition's information structure
347 void ATA_int_MakePartition(tATA_Partition *Part, int Disk, int Num, Uint64 Start, Uint64 Length)
349 ENTER("pPart iDisk iNum XStart XLength", Part, Disk, Num, Start, Length);
351 Part->Length = Length;
352 Part->Name[0] = 'A'+Disk;
354 Part->Name[1] = '1'+Num/10;
355 Part->Name[2] = '1'+Num%10;
356 Part->Name[3] = '\0';
358 Part->Name[1] = '1'+Num;
359 Part->Name[2] = '\0';
361 Part->Node.NumACLs = 0; // Only root can read/write raw block devices
362 Part->Node.Inode = (Disk << 8) | Num;
363 Part->Node.ImplPtr = Part->Name;
365 Part->Node.Read = ATA_ReadFS;
366 Part->Node.Write = ATA_WriteFS;
367 Part->Node.IOCtl = ATA_IOCtl;
368 Log_Notice("ATA", "Note '%s' at 0x%llx, 0x%llx long", Part->Name, Part->Start, Part->Length);
369 LOG("Made '%s' (&Node=%p)", Part->Name, &Part->Node);
374 * \fn void ATA_ParseGPT(int Disk)
375 * \brief Parses the GUID Partition Table
377 void ATA_ParseGPT(int Disk)
379 ///\todo Support GPT Disks
380 Warning("GPT Disks are currently unsupported");
384 * \fn Uint16 ATA_GetPortBase(int Disk)
385 * \brief Returns the base port for a given disk
387 Uint16 ATA_GetBasePort(int Disk)
391 case 0: case 1: return IDE_PRI_BASE;
392 case 2: case 3: return IDE_SEC_BASE;
398 * \fn char *ATA_ReadDir(tVFS_Node *Node, int Pos)
400 char *ATA_ReadDir(tVFS_Node *Node, int Pos)
402 if(Pos >= giATA_NumNodes || Pos < 0) return NULL;
403 return strdup( gATA_Nodes[Pos]->ImplPtr );
407 * \fn tVFS_Node *ATA_FindDir(tVFS_Node *Node, char *Name)
409 tVFS_Node *ATA_FindDir(tVFS_Node *Node, char *Name)
414 // Check first character
415 if(Name[0] < 'A' || Name[0] > 'A'+MAX_ATA_DISKS)
417 disk = &gATA_Disks[Name[0]-'A'];
419 if(Name[1] == '\0') {
420 if( disk->Sectors == 0 && disk->Name[0] == '\0')
426 if(Name[1] < '0' || '9' < Name[1]) return NULL;
427 if(Name[2] == '\0') { // <= 9
428 part = Name[1] - '0';
430 return &disk->Partitions[part].Node;
433 if('0' > Name[2] || '9' < Name[2]) return NULL;
434 if(Name[3] != '\0') return NULL;
436 part = (Name[1] - '0') * 10;
437 part += Name[2] - '0';
439 return &disk->Partitions[part].Node;
444 * \fn Uint64 ATA_ReadFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
446 Uint64 ATA_ReadFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
448 int disk = Node->Inode >> 8;
449 int part = Node->Inode & 0xFF;
451 ENTER("pNode XOffset XLength pBuffer", Node, Offset, Length, Buffer);
456 if( Offset >= gATA_Disks[disk].Sectors * SECTOR_SIZE ) {
460 if( Offset + Length > gATA_Disks[disk].Sectors*SECTOR_SIZE )
461 Length = gATA_Disks[disk].Sectors*SECTOR_SIZE - Offset;
466 if( Offset >= gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE ) {
470 if( Offset + Length > gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE )
471 Length = gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE - Offset;
472 Offset += gATA_Disks[disk].Partitions[part].Start * SECTOR_SIZE;
476 int ret = DrvUtil_ReadBlock(Offset, Length, Buffer, ATA_ReadRaw, SECTOR_SIZE, disk);
477 Debug_HexDump("ATA_ReadFS", Buffer, Length);
484 * \fn Uint64 ATA_WriteFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
486 Uint64 ATA_WriteFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
488 int disk = Node->Inode >> 8;
489 int part = Node->Inode & 0xFF;
494 if( Offset >= gATA_Disks[disk].Sectors * SECTOR_SIZE )
496 if( Offset + Length > gATA_Disks[disk].Sectors*SECTOR_SIZE )
497 Length = gATA_Disks[disk].Sectors*SECTOR_SIZE - Offset;
502 if( Offset >= gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE )
504 if( Offset + Length > gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE )
505 Length = gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE - Offset;
506 Offset += gATA_Disks[disk].Partitions[part].Start * SECTOR_SIZE;
509 Log("ATA_WriteFS: (Node=%p, Offset=0x%llx, Length=0x%llx, Buffer=%p)", Node, Offset, Length, Buffer);
510 Debug_HexDump("ATA_WriteFS", Buffer, Length);
511 return DrvUtil_WriteBlock(Offset, Length, Buffer, ATA_ReadRaw, ATA_WriteRaw, SECTOR_SIZE, disk);
515 * \fn int ATA_IOCtl(tVFS_Node *Node, int Id, void *Data)
516 * \brief IO Control Funtion
518 int ATA_IOCtl(tVFS_Node *Node, int Id, void *Data)
522 case DRV_IOCTL_TYPE: return DRV_TYPE_DISK;
527 // --- Disk Access ---
529 * \fn Uint ATA_ReadRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk)
531 Uint ATA_ReadRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk)
537 // Pass straight on to ATA_ReadDMAPage if we can
538 if(Count <= MAX_DMA_SECTORS)
540 ret = ATA_ReadDMA(Disk, Address, Count, Buffer);
541 if(ret == 0) return 0;
545 // Else we will have to break up the transfer
547 while(Count > MAX_DMA_SECTORS)
549 ret = ATA_ReadDMA(Disk, Address+offset, MAX_DMA_SECTORS, Buffer+offset);
551 if(ret != 1) return done;
553 done += MAX_DMA_SECTORS;
554 Count -= MAX_DMA_SECTORS;
555 offset += MAX_DMA_SECTORS*SECTOR_SIZE;
558 ret = ATA_ReadDMA(Disk, Address+offset, Count, Buffer+offset);
559 if(ret != 1) return 0;
564 * \fn Uint ATA_WriteRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk)
566 Uint ATA_WriteRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk)
572 // Pass straight on to ATA_WriteDMA, if we can
573 if(Count <= MAX_DMA_SECTORS)
575 ret = ATA_WriteDMA(Disk, Address, Count, Buffer);
576 if(ret == 0) return 0;
580 // Else we will have to break up the transfer
582 while(Count > MAX_DMA_SECTORS)
584 ret = ATA_WriteDMA(Disk, Address+offset, MAX_DMA_SECTORS, Buffer+offset);
586 if(ret != 1) return done;
588 done += MAX_DMA_SECTORS;
589 Count -= MAX_DMA_SECTORS;
590 offset += MAX_DMA_SECTORS*SECTOR_SIZE;
593 ret = ATA_WriteDMA(Disk, Address+offset, Count, Buffer+offset);
594 if(ret != 1) return 0;
599 * \fn int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
601 int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
603 int cont = (Disk>>1)&1; // Controller ID
608 ENTER("iDisk XAddress iCount pBuffer", Disk, Address, Count, Buffer);
610 // Check if the count is small enough
611 if(Count > MAX_DMA_SECTORS) {
612 Warning("Passed too many sectors for a bulk DMA read (%i > %i)",
613 Count, MAX_DMA_SECTORS);
618 // Get exclusive access to the disk controller
619 LOCK( &giaATA_ControllerLock[ cont ] );
622 gATA_PRDTs[ cont ].Bytes = Count * SECTOR_SIZE;
625 base = ATA_GetBasePort(Disk);
628 gaATA_IRQs[cont] = 0;
631 outb(base+0x01, 0x00);
632 if( Address > 0x0FFFFFFF ) // Use LBA48
634 outb(base+0x6, 0x40 | (disk << 4));
635 outb(base+0x2, 0 >> 8); // Upper Sector Count
636 outb(base+0x3, Address >> 24); // Low 2 Addr
637 outb(base+0x4, Address >> 28); // Mid 2 Addr
638 outb(base+0x5, Address >> 32); // High 2 Addr
642 outb(base+0x06, 0xE0 | (disk << 4) | ((Address >> 24) & 0x0F)); // Magic, Disk, High addr
645 outb(base+0x02, (Uint8) Count); // Sector Count
646 outb(base+0x03, (Uint8) Address); // Low Addr
647 outb(base+0x04, (Uint8) (Address >> 8)); // Middle Addr
648 outb(base+0x05, (Uint8) (Address >> 16)); // High Addr
650 LOG("Starting Transfer");
651 if( Address > 0x0FFFFFFF )
652 outb(base+0x07, HDD_DMA_R48); // Read Command (LBA48)
654 outb(base+0x07, HDD_DMA_R28); // Read Command (LBA28)
656 ATA_int_BusMasterWriteByte( cont << 3, 9 ); // Read and start
658 // Wait for transfer to complete
660 while( gaATA_IRQs[cont] == 0 && !(val & 0x4) ) {
661 val = ATA_int_BusMasterReadByte( (cont << 3) + 2 );
662 //LOG("val = 0x%02x", val);
667 ATA_int_BusMasterWriteByte( cont << 3, 8 ); // Read and stop
670 LOG("Status byte = 0x%02x", val);
672 LOG("Transfer Completed & Acknowledged");
674 // Copy to destination buffer
675 memcpy( Buffer, gATA_Buffers[cont], Count*SECTOR_SIZE );
677 // Release controller lock
678 RELEASE( &giaATA_ControllerLock[ cont ] );
685 * \fn int ATA_WriteDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
687 int ATA_WriteDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
689 int cont = (Disk>>1)&1; // Controller ID
693 // Check if the count is small enough
694 if(Count > MAX_DMA_SECTORS) return 0;
696 // Get exclusive access to the disk controller
697 LOCK( &giaATA_ControllerLock[ cont ] );
700 gATA_PRDTs[ cont ].Bytes = Count * SECTOR_SIZE;
703 base = ATA_GetBasePort(Disk);
706 outb(base+0x01, 0x00);
707 if( Address > 0x0FFFFFFF ) // Use LBA48
709 outb(base+0x6, 0x40 | (disk << 4));
710 outb(base+0x2, 0 >> 8); // Upper Sector Count
711 outb(base+0x3, Address >> 24); // Low 2 Addr
712 outb(base+0x3, Address >> 28); // Mid 2 Addr
713 outb(base+0x3, Address >> 32); // High 2 Addr
717 outb(base+0x06, 0xE0 | (disk << 4) | ((Address >> 24) & 0x0F)); //Disk,Magic,High addr
720 outb(base+0x02, (Uint8) Count); // Sector Count
721 outb(base+0x03, (Uint8) Address); // Low Addr
722 outb(base+0x04, (Uint8) (Address >> 8)); // Middle Addr
723 outb(base+0x05, (Uint8) (Address >> 16)); // High Addr
724 if( Address > 0x0FFFFFFF )
725 outb(base+0x07, HDD_DMA_W48); // Write Command (LBA48)
727 outb(base+0x07, HDD_DMA_W28); // Write Command (LBA28)
730 gaATA_IRQs[cont] = 0;
732 // Copy to output buffer
733 memcpy( gATA_Buffers[cont], Buffer, Count*SECTOR_SIZE );
736 ATA_int_BusMasterWriteByte( cont << 3, 1 ); // Write and start
738 // Wait for transfer to complete
739 while( gaATA_IRQs[cont] == 0 ) Threads_Yield();
742 ATA_int_BusMasterWriteByte( cont << 3, 0 ); // Write and stop
744 // Release controller lock
745 RELEASE( &giaATA_ControllerLock[ cont ] );
751 * \fn void ATA_IRQHandlerPri(int unused)
753 void ATA_IRQHandlerPri(int unused)
757 // IRQ bit set for Primary Controller
758 val = ATA_int_BusMasterReadByte( 0x2 );
759 LOG("IRQ val = 0x%x", val);
761 LOG("IRQ hit (val = 0x%x)", val);
762 ATA_int_BusMasterWriteByte( 0x2, 4 );
769 * \fn void ATA_IRQHandlerSec(int unused)
771 void ATA_IRQHandlerSec(int unused)
774 // IRQ bit set for Secondary Controller
775 val = ATA_int_BusMasterReadByte( 0xA );
776 LOG("IRQ val = 0x%x", val);
778 LOG("IRQ hit (val = 0x%x)", val);
779 ATA_int_BusMasterWriteByte( 0xA, 4 );
786 * \fn Uint8 ATA_int_BusMasterReadByte(int Ofs)
788 Uint8 ATA_int_BusMasterReadByte(int Ofs)
790 if( gATA_BusMasterBase & 1 )
791 return inb( (gATA_BusMasterBase & ~1) + Ofs );
793 return *(Uint8*)(gATA_BusMasterBasePtr + Ofs);
797 * \fn void ATA_int_BusMasterWriteByte(int Ofs, Uint8 Value)
798 * \brief Writes a byte to a Bus Master Register
800 void ATA_int_BusMasterWriteByte(int Ofs, Uint8 Value)
802 if( gATA_BusMasterBase & 1 )
803 outb( (gATA_BusMasterBase & ~1) + Ofs, Value );
805 *(Uint8*)(gATA_BusMasterBasePtr + Ofs) = Value;
809 * \fn void ATA_int_BusMasterWriteDWord(int Ofs, Uint32 Value)
810 * \brief Writes a dword to a Bus Master Register
812 void ATA_int_BusMasterWriteDWord(int Ofs, Uint32 Value)
815 if( gATA_BusMasterBase & 1 )
816 outd( (gATA_BusMasterBase & ~1) + Ofs, Value );
818 *(Uint32*)(gATA_BusMasterBasePtr + Ofs) = Value;