2 * Acess2 IDE Harddisk Driver
11 #include <tpl_drv_common.h>
12 #include <tpl_drv_disk.h>
16 #define START_BEFORE_CMD 0
24 } __attribute__ ((packed)) tPRDT_Ent;
28 Uint16 Usused1[9]; // 10
29 char SerialNum[20]; // 20
30 Uint16 Usused2[3]; // 23
31 char FirmwareVer[8]; // 27
32 char ModelNumber[40]; // 47
33 Uint16 SectPerInt; // 48 - AND with 0xFF to get true value;
35 Uint16 Capabilities[2]; // 51
36 Uint16 Unused4[2]; // 53
37 Uint16 ValidExtData; // 54
38 Uint16 Unused5[5]; // 59
39 Uint16 SizeOfRWMultiple; // 60
40 Uint32 Sectors28; // 62
41 Uint16 Unused6[100-62];
43 Uint16 Unused7[256-104];
44 } __attribute__ ((packed)) tIdentify;
47 extern void ATA_ParseMBR(int Disk, tMBR *MBR);
52 void ATA_SetupPartitions();
54 int ATA_ScanDisk(int Disk);
55 void ATA_ParseGPT(int Disk);
56 void ATA_int_MakePartition(tATA_Partition *Part, int Disk, int Num, Uint64 Start, Uint64 Length);
57 Uint16 ATA_GetBasePort(int Disk);
58 // Filesystem Interface
59 char *ATA_ReadDir(tVFS_Node *Node, int Pos);
60 tVFS_Node *ATA_FindDir(tVFS_Node *Node, char *Name);
61 Uint64 ATA_ReadFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer);
62 Uint64 ATA_WriteFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer);
63 int ATA_IOCtl(tVFS_Node *Node, int Id, void *Data);
64 // Read/Write Interface/Quantiser
65 Uint ATA_ReadRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk);
66 Uint ATA_WriteRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk);
68 int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer);
69 int ATA_WriteDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer);
71 void ATA_IRQHandlerPri(int unused);
72 void ATA_IRQHandlerSec(int unused);
74 Uint8 ATA_int_BusMasterReadByte(int Ofs);
75 void ATA_int_BusMasterWriteByte(int Ofs, Uint8 Value);
76 void ATA_int_BusMasterWriteDWord(int Ofs, Uint32 Value);
79 MODULE_DEFINE(0, 0x0032, i386ATA, ATA_Install, NULL, "PCI", NULL);
80 tDevFS_Driver gATA_DriverInfo = {
85 .Flags = VFS_FFLAG_DIRECTORY,
86 .ACLs = &gVFS_ACL_EveryoneRX,
87 .ReadDir = ATA_ReadDir,
88 .FindDir = ATA_FindDir
91 tATA_Disk gATA_Disks[MAX_ATA_DISKS];
93 tVFS_Node **gATA_Nodes;
94 Uint16 gATA_BusMasterBase = 0;
95 Uint8 *gATA_BusMasterBasePtr = 0;
98 int giaATA_ControllerLock[2] = {0}; //!< Spinlocks for each controller
99 Uint8 gATA_Buffers[2][4096] __attribute__ ((section(".padata")));
100 volatile int gaATA_IRQs[2] = {0};
101 tPRDT_Ent gATA_PRDTs[2] = {
102 {0, 512, IDE_PRDT_LAST},
103 {0, 512, IDE_PRDT_LAST}
108 * \fn int ATA_Install()
117 ATA_SetupPartitions();
121 if( DevFS_AddDevice( &gATA_DriverInfo ) == 0 )
122 return MODULE_ERR_MISC;
124 return MODULE_ERR_OK;
128 * \fn int ATA_SetupIO()
129 * \brief Sets up the ATA controller's DMA mode
138 // Get IDE Controller's PCI Entry
139 ent = PCI_GetDeviceByClass(0x0101, 0xFFFF, -1);
140 LOG("ent = %i", ent);
141 gATA_BusMasterBase = PCI_GetBAR4( ent );
142 if( gATA_BusMasterBase == 0 ) {
143 Log_Warning("ATA", "It seems that there is no Bus Master Controller on this machine. Get one");
144 // TODO: Use PIO mode instead
145 LEAVE('i', MODULE_ERR_NOTNEEDED);
146 return MODULE_ERR_NOTNEEDED;
150 if( !(gATA_BusMasterBase & 1) )
152 if( gATA_BusMasterBase < 0x100000 )
153 gATA_BusMasterBasePtr = (void*)(KERNEL_BASE | (tVAddr)gATA_BusMasterBase);
155 gATA_BusMasterBasePtr = (void*)( MM_MapHWPages( gATA_BusMasterBase, 1 ) + (gATA_BusMasterBase&0xFFF) );
156 LOG("gATA_BusMasterBasePtr = %p", gATA_BusMasterBasePtr);
159 // Bit 0 is left set as a flag to other functions
160 LOG("gATA_BusMasterBase = 0x%x", gATA_BusMasterBase & ~1);
163 // Register IRQs and get Buffers
164 IRQ_AddHandler( gATA_IRQPri, ATA_IRQHandlerPri );
165 IRQ_AddHandler( gATA_IRQSec, ATA_IRQHandlerSec );
167 gATA_PRDTs[0].PBufAddr = MM_GetPhysAddr( (tVAddr)&gATA_Buffers[0] );
168 gATA_PRDTs[1].PBufAddr = MM_GetPhysAddr( (tVAddr)&gATA_Buffers[1] );
170 LOG("gATA_PRDTs = {PBufAddr: 0x%x, PBufAddr: 0x%x}", gATA_PRDTs[0].PBufAddr, gATA_PRDTs[1].PBufAddr);
172 addr = MM_GetPhysAddr( (tVAddr)&gATA_PRDTs[0] );
173 LOG("addr = 0x%x", addr);
174 ATA_int_BusMasterWriteDWord(4, addr);
175 addr = MM_GetPhysAddr( (tVAddr)&gATA_PRDTs[1] );
176 LOG("addr = 0x%x", addr);
177 ATA_int_BusMasterWriteDWord(12, addr);
179 // Enable controllers
180 outb(IDE_PRI_BASE+1, 1);
181 outb(IDE_SEC_BASE+1, 1);
184 LEAVE('i', MODULE_ERR_OK);
185 return MODULE_ERR_OK;
189 * \fn void ATA_SetupPartitions()
191 void ATA_SetupPartitions()
194 for( i = 0; i < MAX_ATA_DISKS; i ++ )
196 if( !ATA_ScanDisk(i) ) {
197 gATA_Disks[i].Name[0] = '\0'; // Mark as unused
204 * \fn void ATA_SetupVFS()
205 * \brief Sets up the ATA drivers VFS information and registers with DevFS
211 // Count number of nodes needed
213 for( i = 0; i < MAX_ATA_DISKS; i++ )
215 if(gATA_Disks[i].Name[0] == '\0') continue; // Ignore
217 giATA_NumNodes += gATA_Disks[i].NumPartitions;
220 // Allocate Node space
221 gATA_Nodes = malloc( giATA_NumNodes * sizeof(void*) );
225 for( i = 0; i < MAX_ATA_DISKS; i++ )
227 if(gATA_Disks[i].Name[0] == '\0') continue; // Ignore
228 gATA_Nodes[ k++ ] = &gATA_Disks[i].Node;
229 for( j = 0; j < gATA_Disks[i].NumPartitions; j ++ )
230 gATA_Nodes[ k++ ] = &gATA_Disks[i].Partitions[j].Node;
233 gATA_DriverInfo.RootNode.Size = giATA_NumNodes;
237 * \fn int ATA_ScanDisk(int Disk)
239 int ATA_ScanDisk(int Disk)
251 ENTER("iDisk", Disk);
253 base = ATA_GetBasePort( Disk );
255 LOG("base = 0x%x", base);
257 // Send Disk Selector
258 if(Disk == 1 || Disk == 3)
265 val = inb(base+7); // Read status
268 return 0; // Disk does not exist
271 // Poll until BSY clears and DRQ sets or ERR is set
272 while( ((val & 0x80) || !(val & 0x08)) && !(val & 1)) val = inb(base+7);
276 return 0; // Error occured, so return false
280 for(i=0;i<256;i++) data.buf[i] = inw(base);
282 // Populate Disk Structure
283 if(data.identify.Sectors48 != 0)
284 gATA_Disks[ Disk ].Sectors = data.identify.Sectors48;
286 gATA_Disks[ Disk ].Sectors = data.identify.Sectors28;
289 LOG("gATA_Disks[ Disk ].Sectors = 0x%x", gATA_Disks[ Disk ].Sectors);
291 if( gATA_Disks[ Disk ].Sectors / (2048*1024) )
292 Log("Disk %i: 0x%llx Sectors (%i GiB)", Disk,
293 gATA_Disks[ Disk ].Sectors, gATA_Disks[ Disk ].Sectors / (2048*1024));
294 else if( gATA_Disks[ Disk ].Sectors / 2048 )
295 Log("Disk %i: 0x%llx Sectors (%i MiB)", Disk,
296 gATA_Disks[ Disk ].Sectors, gATA_Disks[ Disk ].Sectors / 2048);
298 Log("Disk %i: 0x%llx Sectors (%i KiB)", Disk,
299 gATA_Disks[ Disk ].Sectors, gATA_Disks[ Disk ].Sectors / 2);
302 gATA_Disks[ Disk ].Name[0] = 'A'+Disk;
303 gATA_Disks[ Disk ].Name[1] = '\0';
305 // Get pointer to vfs node and populate it
306 node = &gATA_Disks[ Disk ].Node;
307 node->Size = gATA_Disks[Disk].Sectors * SECTOR_SIZE;
308 node->NumACLs = 0; // Means Superuser only can access it
309 node->Inode = (Disk << 8) | 0xFF;
310 node->ImplPtr = gATA_Disks[ Disk ].Name;
312 node->ATime = node->MTime
313 = node->CTime = now();
315 node->Read = ATA_ReadFS;
316 node->Write = ATA_WriteFS;
317 node->IOCtl = ATA_IOCtl;
319 // --- Scan Partitions ---
322 ATA_ReadDMA( Disk, 0, 1, &data.mbr );
324 // Check for a GPT table
325 if(data.mbr.Parts[0].SystemID == 0xEE)
327 else // No? Just parse the MBR
328 ATA_ParseMBR(Disk, &data.mbr);
330 ATA_ReadDMA( Disk, 1, 1, &data );
331 Debug_HexDump("ATA_ScanDisk", &data, 512);
338 * \fn void ATA_int_MakePartition(tATA_Partition *Part, int Disk, int Num, Uint64 Start, Uint64 Length)
339 * \brief Fills a parition's information structure
341 void ATA_int_MakePartition(tATA_Partition *Part, int Disk, int Num, Uint64 Start, Uint64 Length)
343 ENTER("pPart iDisk iNum XStart XLength", Part, Disk, Num, Start, Length);
345 Part->Length = Length;
346 Part->Name[0] = 'A'+Disk;
348 Part->Name[1] = '1'+Num/10;
349 Part->Name[2] = '1'+Num%10;
350 Part->Name[3] = '\0';
352 Part->Name[1] = '1'+Num;
353 Part->Name[2] = '\0';
355 Part->Node.NumACLs = 0; // Only root can read/write raw block devices
356 Part->Node.Inode = (Disk << 8) | Num;
357 Part->Node.ImplPtr = Part->Name;
359 Part->Node.Read = ATA_ReadFS;
360 Part->Node.Write = ATA_WriteFS;
361 Part->Node.IOCtl = ATA_IOCtl;
362 Log_Notice("ATA", "Note '%s' at 0x%llx, 0x%llx long", Part->Name, Part->Start, Part->Length);
363 LOG("Made '%s' (&Node=%p)", Part->Name, &Part->Node);
368 * \fn void ATA_ParseGPT(int Disk)
369 * \brief Parses the GUID Partition Table
371 void ATA_ParseGPT(int Disk)
373 ///\todo Support GPT Disks
374 Warning("GPT Disks are currently unsupported");
378 * \fn Uint16 ATA_GetPortBase(int Disk)
379 * \brief Returns the base port for a given disk
381 Uint16 ATA_GetBasePort(int Disk)
385 case 0: case 1: return IDE_PRI_BASE;
386 case 2: case 3: return IDE_SEC_BASE;
392 * \fn char *ATA_ReadDir(tVFS_Node *Node, int Pos)
394 char *ATA_ReadDir(tVFS_Node *Node, int Pos)
396 if(Pos >= giATA_NumNodes || Pos < 0) return NULL;
397 return strdup( gATA_Nodes[Pos]->ImplPtr );
401 * \fn tVFS_Node *ATA_FindDir(tVFS_Node *Node, char *Name)
403 tVFS_Node *ATA_FindDir(tVFS_Node *Node, char *Name)
408 // Check first character
409 if(Name[0] < 'A' || Name[0] > 'A'+MAX_ATA_DISKS)
411 disk = &gATA_Disks[Name[0]-'A'];
413 if(Name[1] == '\0') {
414 if( disk->Sectors == 0 && disk->Name[0] == '\0')
420 if(Name[1] < '0' || '9' < Name[1]) return NULL;
421 if(Name[2] == '\0') { // <= 9
422 part = Name[1] - '0';
424 return &disk->Partitions[part].Node;
427 if('0' > Name[2] || '9' < Name[2]) return NULL;
428 if(Name[3] != '\0') return NULL;
430 part = (Name[1] - '0') * 10;
431 part += Name[2] - '0';
433 return &disk->Partitions[part].Node;
438 * \fn Uint64 ATA_ReadFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
440 Uint64 ATA_ReadFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
442 int disk = Node->Inode >> 8;
443 int part = Node->Inode & 0xFF;
445 ENTER("pNode XOffset XLength pBuffer", Node, Offset, Length, Buffer);
450 if( Offset >= gATA_Disks[disk].Sectors * SECTOR_SIZE ) {
454 if( Offset + Length > gATA_Disks[disk].Sectors*SECTOR_SIZE )
455 Length = gATA_Disks[disk].Sectors*SECTOR_SIZE - Offset;
460 if( Offset >= gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE ) {
464 if( Offset + Length > gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE )
465 Length = gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE - Offset;
466 Offset += gATA_Disks[disk].Partitions[part].Start * SECTOR_SIZE;
470 int ret = DrvUtil_ReadBlock(Offset, Length, Buffer, ATA_ReadRaw, SECTOR_SIZE, disk);
471 Debug_HexDump("ATA_ReadFS", Buffer, Length);
478 * \fn Uint64 ATA_WriteFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
480 Uint64 ATA_WriteFS(tVFS_Node *Node, Uint64 Offset, Uint64 Length, void *Buffer)
482 int disk = Node->Inode >> 8;
483 int part = Node->Inode & 0xFF;
488 if( Offset >= gATA_Disks[disk].Sectors * SECTOR_SIZE )
490 if( Offset + Length > gATA_Disks[disk].Sectors*SECTOR_SIZE )
491 Length = gATA_Disks[disk].Sectors*SECTOR_SIZE - Offset;
496 if( Offset >= gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE )
498 if( Offset + Length > gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE )
499 Length = gATA_Disks[disk].Partitions[part].Length * SECTOR_SIZE - Offset;
500 Offset += gATA_Disks[disk].Partitions[part].Start * SECTOR_SIZE;
503 Log("ATA_WriteFS: (Node=%p, Offset=0x%llx, Length=0x%llx, Buffer=%p)", Node, Offset, Length, Buffer);
504 Debug_HexDump("ATA_WriteFS", Buffer, Length);
505 return DrvUtil_WriteBlock(Offset, Length, Buffer, ATA_ReadRaw, ATA_WriteRaw, SECTOR_SIZE, disk);
509 * \fn int ATA_IOCtl(tVFS_Node *Node, int Id, void *Data)
510 * \brief IO Control Funtion
512 int ATA_IOCtl(tVFS_Node *Node, int Id, void *Data)
516 case DRV_IOCTL_TYPE: return DRV_TYPE_DISK;
521 // --- Disk Access ---
523 * \fn Uint ATA_ReadRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk)
525 Uint ATA_ReadRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk)
531 // Pass straight on to ATA_ReadDMAPage if we can
532 if(Count <= MAX_DMA_SECTORS)
534 ret = ATA_ReadDMA(Disk, Address, Count, Buffer);
535 if(ret == 0) return 0;
539 // Else we will have to break up the transfer
541 while(Count > MAX_DMA_SECTORS)
543 ret = ATA_ReadDMA(Disk, Address+offset, MAX_DMA_SECTORS, Buffer+offset);
545 if(ret != 1) return done;
547 done += MAX_DMA_SECTORS;
548 Count -= MAX_DMA_SECTORS;
549 offset += MAX_DMA_SECTORS*SECTOR_SIZE;
552 ret = ATA_ReadDMA(Disk, Address+offset, Count, Buffer+offset);
553 if(ret != 1) return 0;
558 * \fn Uint ATA_WriteRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk)
560 Uint ATA_WriteRaw(Uint64 Address, Uint Count, void *Buffer, Uint Disk)
566 // Pass straight on to ATA_WriteDMA, if we can
567 if(Count <= MAX_DMA_SECTORS)
569 ret = ATA_WriteDMA(Disk, Address, Count, Buffer);
570 if(ret == 0) return 0;
574 // Else we will have to break up the transfer
576 while(Count > MAX_DMA_SECTORS)
578 ret = ATA_WriteDMA(Disk, Address+offset, MAX_DMA_SECTORS, Buffer+offset);
580 if(ret != 1) return done;
582 done += MAX_DMA_SECTORS;
583 Count -= MAX_DMA_SECTORS;
584 offset += MAX_DMA_SECTORS*SECTOR_SIZE;
587 ret = ATA_WriteDMA(Disk, Address+offset, Count, Buffer+offset);
588 if(ret != 1) return 0;
593 * \fn int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
595 int ATA_ReadDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
597 int cont = (Disk>>1)&1; // Controller ID
602 ENTER("iDisk XAddress iCount pBuffer", Disk, Address, Count, Buffer);
604 // Check if the count is small enough
605 if(Count > MAX_DMA_SECTORS) {
606 Warning("Passed too many sectors for a bulk DMA read (%i > %i)",
607 Count, MAX_DMA_SECTORS);
612 // Get exclusive access to the disk controller
613 LOCK( &giaATA_ControllerLock[ cont ] );
616 gATA_PRDTs[ cont ].Bytes = Count * SECTOR_SIZE;
619 base = ATA_GetBasePort(Disk);
622 gaATA_IRQs[cont] = 0;
625 outb(base+0x01, 0x00);
626 if( Address > 0x0FFFFFFF ) // Use LBA48
628 outb(base+0x6, 0x40 | (disk << 4));
629 outb(base+0x2, 0 >> 8); // Upper Sector Count
630 outb(base+0x3, Address >> 24); // Low 2 Addr
631 outb(base+0x4, Address >> 28); // Mid 2 Addr
632 outb(base+0x5, Address >> 32); // High 2 Addr
636 outb(base+0x06, 0xE0 | (disk << 4) | ((Address >> 24) & 0x0F)); // Magic, Disk, High addr
639 outb(base+0x02, (Uint8) Count); // Sector Count
640 outb(base+0x03, (Uint8) Address); // Low Addr
641 outb(base+0x04, (Uint8) (Address >> 8)); // Middle Addr
642 outb(base+0x05, (Uint8) (Address >> 16)); // High Addr
644 LOG("Starting Transfer");
645 if( Address > 0x0FFFFFFF )
646 outb(base+0x07, HDD_DMA_R48); // Read Command (LBA48)
648 outb(base+0x07, HDD_DMA_R28); // Read Command (LBA28)
650 ATA_int_BusMasterWriteByte( cont << 3, 9 ); // Read and start
652 // Wait for transfer to complete
654 while( gaATA_IRQs[cont] == 0 && !(val & 0x4) ) {
655 val = ATA_int_BusMasterReadByte( (cont << 3) + 2 );
656 //LOG("val = 0x%02x", val);
661 ATA_int_BusMasterWriteByte( cont << 3, 8 ); // Read and stop
663 LOG("Transfer Completed & Acknowledged");
665 // Copy to destination buffer
666 memcpy( Buffer, gATA_Buffers[cont], Count*SECTOR_SIZE );
668 // Release controller lock
669 RELEASE( &giaATA_ControllerLock[ cont ] );
676 * \fn int ATA_WriteDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
678 int ATA_WriteDMA(Uint8 Disk, Uint64 Address, Uint Count, void *Buffer)
680 int cont = (Disk>>1)&1; // Controller ID
684 // Check if the count is small enough
685 if(Count > MAX_DMA_SECTORS) return 0;
687 // Get exclusive access to the disk controller
688 LOCK( &giaATA_ControllerLock[ cont ] );
691 gATA_PRDTs[ cont ].Bytes = Count * SECTOR_SIZE;
694 base = ATA_GetBasePort(Disk);
697 outb(base+0x01, 0x00);
698 if( Address > 0x0FFFFFFF ) // Use LBA48
700 outb(base+0x6, 0x40 | (disk << 4));
701 outb(base+0x2, 0 >> 8); // Upper Sector Count
702 outb(base+0x3, Address >> 24); // Low 2 Addr
703 outb(base+0x3, Address >> 28); // Mid 2 Addr
704 outb(base+0x3, Address >> 32); // High 2 Addr
708 outb(base+0x06, 0xE0 | (disk << 4) | ((Address >> 24) & 0x0F)); //Disk,Magic,High addr
711 outb(base+0x02, (Uint8) Count); // Sector Count
712 outb(base+0x03, (Uint8) Address); // Low Addr
713 outb(base+0x04, (Uint8) (Address >> 8)); // Middle Addr
714 outb(base+0x05, (Uint8) (Address >> 16)); // High Addr
715 if( Address > 0x0FFFFFFF )
716 outb(base+0x07, HDD_DMA_W48); // Write Command (LBA48)
718 outb(base+0x07, HDD_DMA_W28); // Write Command (LBA28)
721 gaATA_IRQs[cont] = 0;
723 // Copy to output buffer
724 memcpy( gATA_Buffers[cont], Buffer, Count*SECTOR_SIZE );
727 ATA_int_BusMasterWriteByte( cont << 3, 1 ); // Write and start
729 // Wait for transfer to complete
730 while( gaATA_IRQs[cont] == 0 ) Threads_Yield();
733 ATA_int_BusMasterWriteByte( cont << 3, 0 ); // Write and stop
735 // Release controller lock
736 RELEASE( &giaATA_ControllerLock[ cont ] );
742 * \fn void ATA_IRQHandlerPri(int unused)
744 void ATA_IRQHandlerPri(int unused)
748 // IRQ bit set for Primary Controller
749 val = ATA_int_BusMasterReadByte( 0x2 );
750 LOG("IRQ val = 0x%x", val);
752 LOG("IRQ hit (val = 0x%x)", val);
753 ATA_int_BusMasterWriteByte( 0x2, 4 );
760 * \fn void ATA_IRQHandlerSec(int unused)
762 void ATA_IRQHandlerSec(int unused)
765 // IRQ bit set for Secondary Controller
766 val = ATA_int_BusMasterReadByte( 0xA );
767 LOG("IRQ val = 0x%x", val);
769 LOG("IRQ hit (val = 0x%x)", val);
770 ATA_int_BusMasterWriteByte( 0xA, 4 );
777 * \fn Uint8 ATA_int_BusMasterReadByte(int Ofs)
779 Uint8 ATA_int_BusMasterReadByte(int Ofs)
781 if( gATA_BusMasterBase & 1 )
782 return inb( (gATA_BusMasterBase & ~1) + Ofs );
784 return *(Uint8*)(gATA_BusMasterBasePtr + Ofs);
788 * \fn void ATA_int_BusMasterWriteByte(int Ofs, Uint8 Value)
789 * \brief Writes a byte to a Bus Master Register
791 void ATA_int_BusMasterWriteByte(int Ofs, Uint8 Value)
793 if( gATA_BusMasterBase & 1 )
794 outb( (gATA_BusMasterBase & ~1) + Ofs, Value );
796 *(Uint8*)(gATA_BusMasterBasePtr + Ofs) = Value;
800 * \fn void ATA_int_BusMasterWriteDWord(int Ofs, Uint32 Value)
801 * \brief Writes a dword to a Bus Master Register
803 void ATA_int_BusMasterWriteDWord(int Ofs, Uint32 Value)
806 if( gATA_BusMasterBase & 1 )
807 outd( (gATA_BusMasterBase & ~1) + Ofs, Value );
809 *(Uint32*)(gATA_BusMasterBasePtr + Ofs) = Value;